On Wednesday 18 November 2009, Dean Glazeski wrote: > From what I can tell, dataflash is very similar to NAND except the commands > and data are sent over an SPI interface and there is a different set of > commands.
Atmel would compare it to NOR based on the reliability concerns. AFAICT that's true of all SPI flashes. Another NOR-ish factor is that those chips are relatively small ... no GByte SPI flash. The NAND-ishness is just that the page size isn't always binary, and the sizes are more like small page (or VERY small page) NAND. Newer ones let you (permanently) disable those extra bytes. Something unique to DataFlash compared to other SPI flashes is that most "real" dataflash includes two single-page SRAM buffers. So you can write to one SRAM buffer while the other gets written to flash, then ping-pong. > I don't think I can give you a really good list until I play with > it some more. I only need to do a bit of work to get hardware ECC going on > the at91sam9 NAND driver, so I should (hopefully) start playing in about a > week. At that time I will be more able to let you know what can be done. I think splitting NOR and NAND out better is appropriate. As for SPI ... there'd be two ways to achieve that. One would be just using the JTAG adapter as a SPI adapter. The other is more like I suspect you're doing for the SAM9: use JTAG to talk with an on-chip SPI controller. In either case it'd make sense to have a bit of an abstraction layer around SPI. _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
