On Fri, 2011-12-16 at 09:25 +0100, Olof Kindgren wrote: > 2011/12/16 Matthew Hicks <[email protected]>: > > Yeah, I read that part of the manual before. In my opinion, there should > > probably be a patch to the arch manual as well. It is kind of odd to have a > > special register like r0 that isn't fully defined at the ISA level. Every > > other architecture that has a similar r0 == 0 has r0 hard-wired to zero. > > I agree with Matthews. Sure, we get another multi-purpose register, > but I don't think it's worth the pain of not knowing if it's really > zero
(should have read the whole thread before my previous reply) This brings an incompatibility into the tool chain. Code written for the new processor will not necessarily work on the old processor. Given there are now real users of OpenRISC out there (e.g. Samsung DTV boxes), we need to be very wary of this. It is a dangerous change, because it is useful, so lots of new code will be written assuming this functionality is there, and will break on any older design. Jeremy -- Tel: +44 (1590) 610184 Cell: +44 (7970) 676050 SkypeID: jeremybennett Email: [email protected] Web: www.embecosm.com _______________________________________________ OpenRISC mailing list [email protected] http://lists.openrisc.net/listinfo/openrisc
