At 03:12 PM 2/9/01 -0800, Peter Bennett wrote:

>IMHO, it is important _not_ to reduce the pad size to zero - if you do,
>you'll have shorts between the inner layers.

I'm not arguing for zero size pads -- see my other recent posts on this 
topic -- but it appears that Protel correctly interprets holes as requiring 
clearances *except* when the hole is in a surface pad. This is a bug and 
should be fixed.


Abd ul-Rahman Lomax
LOMAX DESIGN ASSOCIATES
PCB design, consulting, and training
Protel EDA brokering (resale) services
Sonoma, California, USA
(707) 939-7021, efax (419) 730-4777
[EMAIL PROTECTED]
[EMAIL PROTECTED]




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