Hi Everyone,

I have some real strange behavior going on with the dreaded hidden pins.
These are being assigned sub-nets and are showing global netlist behavior
where none exists. That means, a floating terminal of part 1, pin 2, is
shown associated with pin 2 of part 2. I would have suspected that a parts
definitions are held in a 'local' definition and not a global one. I can't
see  an applicable rule affecting this, unless there is a rub in the
protocol of creating a netlist.

I can also report that parts created with multilayer pinning create keep out
zone for components on both sides of the pwb. This means for example, you
cannot place a coupling cap underneath a DIP part without encountering a DRC
component spacing error. At least, that is what I have found. There is a
difference in keep out zone Protel assumes and ones you can actually edit.
This is very much a shortcoming. 

Fabe
Guigne International Limited
Paradise, Newfoundland 

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