At 01:08 PM 3/14/01 -03-30, Fabian Hartery wrote:

>I have some real strange behavior going on with the dreaded hidden pins.
>These are being assigned sub-nets and are showing global netlist behavior
>where none exists. That means, a floating terminal of part 1, pin 2, is
>shown associated with pin 2 of part 2. I would have suspected that a parts
>definitions are held in a 'local' definition and not a global one. I can't
>see  an applicable rule affecting this, unless there is a rub in the
>protocol of creating a netlist.

I'm not sure what is meant here. Hidden pins always create global nets, 
just like power ports. The behavior is not alterable except by unhiding the 
pins. Never hide an unconnected pin. Instead, either delete the pin from 
the symbol (assuming that it is a genuine no-function pin, though some of 
us would say to always show all pins, functional or not), or show it and 
place a No-ERC directive on it to suppress the unconnected warning.

>I can also report that parts created with multilayer pinning create keep out
>zone for components on both sides of the pwb. This means for example, you
>cannot place a coupling cap underneath a DIP part without encountering a DRC
>component spacing error. At least, that is what I have found. There is a
>difference in keep out zone Protel assumes and ones you can actually edit.
>This is very much a shortcoming.

For those of us who have been using Protel for a longer time than the life 
of 99SE, the component clearance rules are an addition, nor a shortcoming. 
Until quite recently, we had no component clearance checking.

It is not a mature feature. For example, it should be possible to define a 
negative clearance, which would allow a defined overlap. If the overlay 
outline of a part is drawn at MMC, DRC will consider the part outline to be 
MMC plus half the track width of the outline. So parts which are butted 
together, which is fine if the outline is MMC, will display a clearance 
error. It should be possible to suppress this easily by allowing a negative 
clearance equal to half the track width.

As to the situation described by Mr. Hartery, I have generally turned off 
component clearance checking. But I would think that if one defines 
component classes for top and bottom components, one could set the 
clearance rule so that top components were checked against top components 
only, etc.

But I have not actually tried it.

There should be a quick way to make top and bottom component classes and 
assign them to already placed parts. Anyone know one?

[EMAIL PROTECTED]
Abdulrahman Lomax
P.O. Box 690
El Verano, CA 95433

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