On 04:26 PM 4/09/2001 -0700, Abd ul-Rahman Lomax said:
><..snip..>
>Don't you hate it when you ask "How do I ..." and someone answers "You 
>shouldn't!" You are trying to control the BOM from the PCB, but the BOM 
>report from PCB is primitive compared to what can be done from the 
>schematic. The BOM -- or the data from which a BOM is prepared, if one 
>uses Excel or some other spreadsheet to make the actual BOM -- should be 
>generated from the schematic. It is simple to place non-PCB parts on the 
>schematic.
>
>I recommend considering the socket as the primary part. The IC, if you 
>want it to be on the PCB, would have a padless footprint. It might have no 
>primitives at all. Such a dummy footprint can be a tad odd in its 
>behavior. I just created one, put a corresponding part on the schematic, 
>and allowed Update to put this empty footprint on the PCB. It ended up 
>outside the workspace. To get it into the workspace, I used the panel to 
>edit it to a location in the workspace. The only things that displayed 
>from this part were the reference designator and comment strings. Those 
>could be hidden. The need to move this part around could have been avoided 
>if I had manually placed it before running Update.

Abd ul-Rahman, I agree with your comment that it can be depressing when you 
are told not to do something rather than how...but...

We take the view that any socketed items are actually part of a higher 
level assembly than the PWA (printed wiring assembly).  The PWA includes 
just the items that are run through the soldering process.  Any extra 
things like ROMs or socketed protection components appear on the next 
higher level assy parts list.  We use the Sch as the primary source for the 
PWA parts list but this has extra bits added, like the PCB.  We usually do 
not try to include all PWA bits in the Sch, but I am aware that some people 
do.  Doing this would certainly be easier if we had Sch symbol and PCB 
footprint attributes to prevent them being involved in synchronization and 
to be ignored during netlist import - as has been discussed recently.

(There may need to be two attributes for a Sch symbol.  One to prevent it 
being included in the netlist and internal netlist produced during 
synchronization.  The other, included with the netlist, to prevent the part 
being included on the PCB if that netlist is imported to a PCB design.)

As for the original question, what about:
1) Create socket footprint with all the pins/pads, but a minimum of overlay
2) Create IC footprint which is just overlay/silkscreen (no pins/pads)
3) Position together on PCB carefully
4) Create a union to ensure they move together
5) Pressure Protel to allow correct handling of negative component 
clearances to allow for overlapping components, I have an yone else want to 
add a voice....

Ian Wilson

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