This question, how to deal with multiple pads for a single schematic pin, 
has been asked many, many times. There are three basic ways to deal with it:

(1) Modify the schematic symbol
        (a) to add a visible extra pin.
        (b) to add another pin in the same position as the first. This *must* not 
be a hidden pin or it will create a global power net. However, its name and 
number may be hidden. It will cause a tie dot to appear, which is 
considered harmless or mildly beneficial.

(2) Name the pads in the footprint, that are to share a single schematic 
pin, the same. The synchronizer correctly handles this, it will assign the 
net to as many pins as share the same refdes and pin name. Netlist load 
*almost* handles this correctly, I won't go into the details because you 
should be using the synchronizer if you can.

(3) Use a non-pad primitive, a via, in the footprint for the extra pin. 
Manually assign it the correct net or use the Update process (under 
Design/Netlist Manager/Menu).

If you are using a non-Protel netlist, it is recommended to process it 
through an update utility that makes controlled substitutions, deletions, 
and additions to the netlist. I wrote such a utility in Quickbasic years 
ago to deal with exactly this problem. So my utility would add the extra 
pin to the net list, and the update control file would be provided to the 
engineer with a recommendation that he modify the schematic. The same 
process was used for gate swaps and the like.

One respondent in this thread suggested that Protel provide a means to 
assign multiple nets to the same pad. I am strongly opposed to this. Every 
pad should have an unambiguous net. What is needed for star grounds and the 
like is a means of allowing a *single* point short between two or more 
nets. We already have two ways of doing this which have elsewhere been 
described in detail.
PCAD has a device called a tienet, which, as I recall, is a polygon 
attribute allowing a polygon to be connected to more than one net. I 
consider the methods we already have to be superior, because they are 
schematic-controlled (through a non-BOM jumper component), which is desireable.
Abdulrahman Lomax
Easthampton, Massachusetts USA

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