At 02:36 PM 11/12/01 -0500, Sean James wrote:
>Has anybody out there ever have to upated a schematic's reference 
>designators based on a PCB layout, when there is NOT a netlist to back 


>  I have to clean up an engineer's schematics, and he refuses to use an 
> inteligent schematic & layout. He just places the parts on the board and 
> wires them up.

Is he aware that his practices result in longer time-to-market? If he 
doesn't want to take the time to learn to use the schematic software 
correctly -- a fairly foolish position since it also ultimately costs time 
and possibly increases other costs -- he should at least provide someone 
like Mr. James a copy of the schematic right off so that it can be cleaned 
up *before* the board is designed.

He is taking longer than necessary to design the board as well, since 
schematic-driven design, once you know how to do it, is much more 
efficient. But, you know, old dog, new tricks.

>Not only does this create a situation where I have to clean up the 
>schematics (Ref Des's; missing or incorrect parts; wrong connections, 
>etc.), it is also difficult and time cosuming to go back through the board 
>and assign our company's part numbers.

Unless you are an investor in the company, consider this a blessing. Not 
all in-house designers are keeping their jobs at this time! But it does not 
bode well for the company that his practices are tolerated unless he is 
*so* good that he is not replaceable. I'd be looking for backup job 

But make sure that the time you spend fixing his mess is documented, or it 
could be your own job at risk. Don't complain about him -- that can 
backfire -- but make sure that management knows what it is costing them. If 
they think that cost is acceptable, once again, they are either right or 
wrong. If they are right then you have job security, relatively speaking, 
and if they are wrong, even errant managers are sometimes successful.

Now, how to recover correspondence between the schematic and the PCB? Here 
is how I would approach it, based on what I've done in the past:

First things first; assuming that the PCB has actual components instead of 
just pads and track -- I've seen that too many times! -- generate a net 
list from connected copper on the board (Design/NetlistManager/Menu).

(If the reference designators on the PCB are completely screwed up, i.e., 
they make no sense at all, with a resistor being called, for example, U27, 
then annotate the PCB first. But I am going to assume, at first, that the 
PCB has rational designators, at least as a starting place.)

There is a net list comparison tool in Schematic under Reports, but if your 
reference designators are not assigned on the schematic, you will need to 
do that first, and the correspondence will be too bad to use at first. So 
identify some component which is, preferably, unique, i.e., there is 
nothing else like it on the PCB. Then trace a connection from this to 
another component, which will thereby be identified. Do this on paper, not 
on screen, it will probably be faster. If a connection is ambiguous, then 
write down all the possibilities for a component; the ambiguity will be 
resolved later by another connection. Keep this up until all components 
have been identified.

You may well find errors, that is, places where the schematic and PCB 
cannot be resolved; for example, there may be a resistor and capacitor in 
series and they are reversed in sequence between the PCB and schematic. 
This is typically a formal error only, but treat it as an error in the list 
that you are going to provide the engineer. Add to the schematic all unused 
gates or amplifier sections and the like, so that every connection and 
no-connect pin, if possible, is documented. You will then query the 
engineer about the unused gates unless he tied them all correctly.

Once you have the reference designators identified on the printed 
schematic, go to the Protel on-line schematic and edit the reference 
designators to the correct values. At this point things will start to get 
easier. Run an ERC on the schematic and fix all errors and warnings.

There is a choice now as to how to proceed. Either synchronize the PCB and 
Schematic and assign nets to connected copper, or run a Schematic net list 
and use the netlist comparison tool to find deviations between them. Any 
error, unless you find they were your errors, should go on the list to 
query the engineer. Even if you know which one was correct, I advise 
putting the change you will need to make on a list of changes and queries 
that will be what you provide the engineer. If you have provided such a 
list and the engineer approves what you have done, you will have CYA, as 
long as you were careful and thorough.

If the engineer says "We don't have time for all this niggling detail," 
which is common for the kind of engineer you are dealing with, try to get 
his approval in writing, and make sure that you have stated in writing that 
your checking process was not complete due to lack of time as defined by 
the engineer. It can help to communicate with the engineer by email 
wherever possible, even if he is just down the hall or even just across the 

In the end, you will have a schematic and PCB that correspond in reference 
designators and net list. Then you can worry about part numbers. The PCB 
"comments" are not a necessary field to make correct, usually, it is what 
is in the schematic that will properly be used to generate a bill of 
materials, and then the type fields from the schematic will automatically 
be stuffed into the PCB unless you refuse to approve the macros.

It may be easiest to generate a spreadsheet from the schematic with the 
fields you need to stuff, then use Excel or the Protel spreadsheet editor 
to enter the correct data. You may have an inventory control program that 
will make this easier, I've never been given that benefit.

Now you will also get correct bills of materials from the schematic, or, 
more accurately, you will have a BOM to provide the engineer for his approval.

Abdulrahman Lomax
Easthampton, Massachusetts USA

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