At 02:53 PM 11/13/01 -0500, Sean James wrote: >OK, Abdul, I got the first part to work and created a *netlist* on the PCB. >Now how do I load that into the schematic and get the Ref Des to come out >correct and not erase the schematic.
You can't just load it in. This would require more software intelligence than I think exists in CAD programming. But it is not difficult for a human. I assumed the worst case: the engineer did not assign reference designators in Protel, so they all may be something like R132 even if the part is an IC, for example. Any reference designators on a PCB will be text only. If the text only designators are there, you can edit the actual designators -- you will need to make them visible -- to match the text and then you can delete the text. (As you edit the designators, shift-click on the free text will highlight it. Then, every so often, you can hit Delete and the ones you have transfered will be gone.) The next part assumes that there was not even free text identifying the components. If there *is* information on the PCB matching the reference designators on the Schematic, you will not start with a net list, you will start from that schematic as shown below. Take the net list and edit it with a word processor to a form that makes it not take a zillion pages to print. I usually edit ")[enter]" to, say, "`" or some other character unlikely to appear in the net list. Then I edit all [return] to [tab]. Then I edit all "`" to ")[enter]. (In the Word replacement dialog, ^p is the CR/LF combo and ^t represents TAB.) With a little adjustment, perhaps, of the tab positions, this makes a very easy-to-read net list. Change all the schematic reference designators to ? if they are not already there. (Of course, if they are already correct, i.e., they match the PCB, you can breathe a sigh of relief and skip this whole step.) Then, identify equivalent parts between the PCB and schematic and edit those parts on the schematic to the PCB reference designators. (If the PCB had no reference designators or seriously weird ones, you can use a combination of global edits keyed on footprint and then the automatic renumbering tool to create rational reference designators quickly.) You could also do this on a paper schematic and transfer the information into the Protel Schematic when you are done. The core of this is "identify equivalent parts." This is much easier to do than to describe. If it were easy to describe, it would be easy to program. Maybe with enough careful examination we could describe the algorithm and thus make it possible to write the program. But the basic idea is to start with something easy to identify, like a connector or unique IC, and then track down parts as they connect to it, and then parts as they connect to those parts, etc. [Start here if you had reference designator information and have moved that information into the Protel reference designator field of each component. Any unidentified component can simply be given a unique rational designator, you will be able to fix it later. If there are *many* unidentifiable components, you should do the netlist from PCB procedure described above.] Once you have the correct corresponding reference designators (or at least something close to that, any remaining errors will fall out of the subsequent steps), you can toss the PCB-generated net list unless you choose the alternate procedure below. Run ERC on the Schematic and fix all errors and warnings. Beware of suppressing warnings instead of fixing them. It's worth doing. Create a net list from the Schematic and load it into the PCB. (At this point I would use the PCB Netlist Load, not the Schematic Update PCB, which is a tad more difficult to control. Otherwise Update PCB is a much better tool.) Run Design/NetlistManager/Assign Nets to Free Primitives from Component Pads. Run a DRC. Track down and fix all deviations on the schematic if the PCB is obviously equivalent, or on the PCB if it is an obvious error. (Be sure to document this for the engineer!) You can swap gates, I'd think, without flagging it for the engineer, or document it anyway just to make it clear how much work this is costing the company. In the end you will have a Schematic that can be used to Update PCB; the second run of this Update should create no macros or changes. (rare conditions can cause oscillation of macros, I won't go into that here, if it doesn't happen, you don't need to worry about it.) You should then be able, also, to generate a clean DRC from the PCB, assuming that the Rules are set appropriately. It is not nearly as difficult as it sounds. Okay, the alternative procedure. You might use one of the netlist comparison tools, comparing a Schematic-generated netlist to a PCB-generated net list. All deviations will be reported; I think this comparison neglects net names, otherwise it would be next to useless. But this procedure, I think, will not be quite as easy or efficient as what I described above. [EMAIL PROTECTED] Abdulrahman Lomax Easthampton, Massachusetts USA * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://email@example.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *