Since it seems to get better over time is it possible that there is a moisture or humidity related problem. I have seen surface mount chips explode if they absorb moisture then get soldered. If the laminate has moisture in it and it changes with the heating it may then relax as it reabsorbs moisture. Try baking a board at a lower temperature and see if you get the same warping. If this is the case it is a material problem.
Larry At 04:04 PM 4/3/02 -0500, you wrote: >At 03:03 PM 4/3/2002 +0100, Jason Morgan wrote: > >>We have a board warping problem and are looking for a PCB expert to help >>resolve it. >>(Preferably located in the UK, but not important) > >Unless it involves looking at the fabbed board itself -- we haven't gone >far enough to know if that would be necessary -- location of the expert >should be irrelevant. > >>When I say expert, I mean *EXPERT*. The problem is quite complex and already >>has baffled two manufacturers. > >This is a tad discouraging. Usually manufacturers *are* the experts. But >the board is warping in reflow/wave solder, so a PCB fabricator might not >be the best source, I'd talk to assembly people. > >This list is also not the prime place to find advice on this, I'd suggest >the IPC Designers Forum. Butyou never can tell... > > From a subsequent post: > >>Details are as follows: >> >>6 Layer 1.6 FR4 >>8" x 10" Board > >Normal. > >>PCB support is a wasted rectangle 10mm wide along all edges, supporting PCB >>at 2 or 3 points along each edge. (First observation is that this should >>have copper layers) > >For the board to warp, especially if it is warping consistently, something >must be out of balance. Or the board material is bad or has been >improperly used, i.e., fabricator error. Fab error would mostly be another >version of "out of balance," such as some issue around warp and weft as >mentioned below. > >>Layer stack up is two cores + two foils (sizes rounded to 1 decimal place) >> >> >>R/P Layer Type thou >>- - Resist 0.4 >>R 1 Ni/Au 0.5oz 1.1 >>R 1 Foil 0.5oz 0.7 >>- - Prepreg 7630 7.0 >>P 2 1oz Copper 1.4 >>- - Core 15.0 >>R 3 1oz Copper 1.4 >>- - Prepreg 1080 5.0 >>- - Prepreg 1080 5.0 >>R 4 1oz Copper 1.4 >>- - Core 15.0 >>P 5 1oz Copper 1.4 >>- - Prepreg 7630 7.0 >>R 6 Foil 0.5oz 0.7 >>R 6 Ni/Au 0.5oz 1.1 >>- - Resist 0.4 >>--------------------------------- >>Total 64 = 1.625mm > >Unstated is the assignment of layers to trace and plane layers. That could >have a major effect on warp. > >What were the design considerations behind this stackup? > > >>Effects are: >>Boards are flat from production, but twist on heating in solder reflow or >>wave solder. > >The components being used could have some effect. Is it wave or reflow or >both? Who is doing the soldering? Are they experts? > >>An analysis of 5 board produced 1 that exceeded the IPC warpage >>specifications. >> >>Trouble is all but one was too twisted to fit into the rack without effort. > >Right off I wonder why boards that meet IPC spec for warpage are difficult >to insert into the rack. Who designed the rack? One would think a rack >would be designed to accommodate a certain level of warp, specifically >that which is within standard production specifications. > >>We had the same problem with the alpha version, but here this was put down >>to an incomplete plane >>on the two plance layers, this has been changed to a full plane - no change >>to warp. > >You don't have enough data to say that with certainty, I'd suggest. The >sample is too small. > >Some precise description of the amount of warp, and the variance over the >sample space, might be useful. > >>Suggestions so far have been to: >>0: Add copper to waste (breakout) parts layers >>1: Change the breakout to a waste part scored along the two long edges. >>2: Use a three core construction >>3: Add copper hash to layers 3 and 4, (other either side of the two >>cores) >>4: Change warp and weft of cores >>5: Increase core thickness and decrease 1080 prepreg thickness. >>6: Use 1.8 FR4 by increasing core thickness (undesireable) > >I'd think that 6 might be ruled out because it could make the board more >difficult to fit into a rack, plus stackup design might be necessarily >controlled by other crucial design considerations, such as impedance and >interplane capacitance. > >>So far we've had no input from the manufacturer as to what (if any) of the >>above will be better, though >>they agree that all should have some affect (positive or negative) on bow >>and twist. > >This is less than helpful! > >The exact geometry of the warping could be interesting. For example, if >the warping is aligned with the division between the waste area and the >main board area, or with some other copper discontinuity, this could point >to the cause. I'd make at least a rough contour map of the most warped >board, and overlay this over the design on a mech layer to see what >associations pop out. > >If I had to do something quickly with this board, I would add hatching to >all empty spaces on the board, such that each layer had roughly the same >copper density over its entire surface, and such that each layer in the >stackup had roughly the same density as the mirrored layer. > >>We've also noticed that over a long period (weeks) the twist gets less. > >Prepreg is more plastic than core. This symptom points toward the fact >that the stackup has prepreg as the outside layer, being build-up >construction. Yes, going to three-core construction might help. > >>We will pay the going rate for any consultation. > >The going rate here is free. Many of us will consult privately for a fee, >certainly I would, but I also wouldn't suggest that you go there yet. >Answering the questions I have raised will help to document the problem >even if you end up going to a consultant. In other words, it will take him >or her less time.... Larry G. Nelson Sr. mailto:[EMAIL PROTECTED] http://www.ultranet.com/~nr * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
