Is that the APDFPR program by Elcomsoft? (for the PDF file)
Anyway, your idea sounds great! > -----Original Message----- > From: Brian Guralnick [mailto:[EMAIL PROTECTED]] > Sent: Friday, September 20, 2002 5:58 AM > To: Protel EDA Forum > Subject: Re: [PEDA] ClientBasic Schematic Library component > synthesiser. WAS -> Making of 956 pin SCH component (boring) > > > Now, this is a useful / valuable client-script to generate. > > OK, here is my planed ClientScript for next week. > > 1. The script generator will take in spread sheet pin name & > data, including multiple pins with using 1 label on the same > entry line. (Sold separately, a PDF document decrypt hack > which will recover the pinout tables. I'm not sure why IC > data sheets are encrypted in the first place.) > > 2. It will make a library schematic component in 3 ways: > a) Pins sorted into an orientation similar to the > device package. > b) Pins sorted by pin numbers. > c) Pins intelligently grouped by pin names. > The order of the pins in the source spread sheet will not matter. > > 3. Generate a report file of all the generated pins for > cross reference & proof reading. > > Comments? Additional things I should add/consider as I > generate the code? > > ____________ > Brian Guralnick > [EMAIL PROTECTED] > (514) 624-4003 > > > ----- Original Message ----- > From: "vincent mail" <[EMAIL PROTECTED]> > To: "Protel EDA Forum" <[EMAIL PROTECTED]> > Sent: Friday, September 20, 2002 8:36 AM > Subject: Re: [PEDA] Making of 956 pin SCH component (boring) > > > > same here . we also make IC's . i once wrote a bonding > extractor that > > spits the output symbol. > > > > > > gimme examples of those files. > > > > > > > >I'm unfamiliar with what it takes to write a generator such as > > >Vincent describes, but if anybody would care to write a > generic one > > >using a defined text file syntax as input, I'd be mighty grateful! > > > > > that is what i want to do. > > > > a simple space delimited textfile > > > > 1 vcc > > 2 gnd > > 3 r\s\t\ > > 4 clk > > ( they can be in random order ) > > > > > > the parser will check how many pins there are attempt to > make a square > > and spit them out. i can give an option to sort pins by > groups as well > > ( like data and address buses ) > > > > this is not hard , couple of hours of coding and it's done. i'm > > familiar with the protel library format. > > > > > > > >John Haddy > > > > > >>-----Original Message----- > > >>From: vincent mail [mailto:[EMAIL PROTECTED]] > > >>Sent: Thursday, 19 September 2002 11:24 PM > > >>To: Protel EDA Forum > > >>Subject: Re: [PEDA] Making of 956 pin SCH component (boring) > > >> > > >> > > >>send me one of those altera txt files . i'll write you a a > > >>generator. > > >> > > >> > > >>Juha Pajunen wrote: > > >> > > >>>Hi, > > >>> > > >>>I am making Altera 956 pin FPGA SCH component, assign > > >>>that many pin is annoying... why not there is component > wizard like > > >>>PCB library editor has, at least I do not know it...? > > >>>It would be nice to have a program that could read > > >>>pin-out information file > > >>>(Altera offers pin-out file, that is in TEXT format) > > >>>and "make" pins to SCH component! > > >>> > > >>>How do you do your huge pin SCH components? > > >>> > > >>>Sincerely, > > >>>Juha Pajunen, Hw Engineer > > >>>Bitboys Oy > > >>>E-mail: [EMAIL PROTECTED] > > >>>------------ > > >>>NOTE: This message, and any attached files, may contain > privileged > > >>>or confidential information. It is intended for use only by the > > >>>designated recipients. Any disclosure, copying or > distribution of, > > >>>or reliance upon, this message by anyone else is strictly > > >>>prohibited. > > >>> > > >>-- > > >>-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- > > >> _____________ > > >> /____________/ Vincent Himpe > > >> // _____ ___/ Lab Manager > > >> / \ \ / / / ST Microelectronics > > >> /___\ \ / / / 5510 Six Forks Road . Suite 200 > > >>/______//_/__/ Raleigh NC 27612 > > >> > > >> Tel : (919) 850 6070 > > >> Fax : (919) 850 6689 > > >> e-mail : [EMAIL PROTECTED] > > >> > > >>-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- > > >> > > >> > > >> > > >> > > >> > > >> > > > > > > > -- > > -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- > > _____________ > > /____________/ Vincent Himpe > > // _____ ___/ Lab Manager > > / \ \ / / / ST Microelectronics > > /___\ \ / / / 5510 Six Forks Road . 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