Hello All,
        Have a PCB design that is completely routed.  The board information report
and DRC report state that everything is 100% routed with no violations.  OK
great.

        In the schematic side I generate a Netlist.  Now  I go to the PCB side and
from Netlist Manager I export the Netlist from PCB.  I then do a Netlist
compare and everything is good.

        I then go to the schematic side again and do a Netlist compare with the
same two files.  The report states that I have 2 Partially Matched Nets.
How can this be?

        What exactly is a Partially Matched Net?  To me it sounds like parts of the
net in question are not completely routed.

        Has anyone out there had this experience?  Do I have a problem with my
design or is this a Protel bug - feature?

        Any information that you can give me will be greatly appreciated.  Thank
you for your time and have a nice day.



John Branthoover            :
Electrical Design Engineer  :
Acutronic  R & D            :Phone  (412) 968-1051
640 Alpha Drive             :Fax    (412) 963-0816
Pittsburgh PA 15238         :Email  [EMAIL PROTECTED]
USA                         :WEB    http://www.acutronic.com



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