What I did just a few days ago, was copy the entire board and then select
'paste special'. Now you have several option with which you can have all
designators to be copied as they are. So in one design you could have more
resistors with the same name (which is what you want with such a panel).

Good luck,


-----Oorspronkelijk bericht-----
Van: Ian Wilson [mailto:[EMAIL PROTECTED]
Verzonden: zaterdag 15 maart 2003 6:01
Aan: Protel EDA Forum
Onderwerp: Re: [PEDA] Incrementing Components

On 06:28 PM 14/03/2003, Z Hylton said:

>I need some help.
>I am panelizing a number of small boards, (5 caps, two SOP16 packages). I'm
>using DXP and when I copy the second board, all the designator's names are
>changed. C1 becomes C1_1, ...the third board has designator's changed from
>C1 to C1_2... and so on.
>Does anyone know how to turn this feature off? Or maybe it's best to move
>everything back to 99SE once again and do the work there?

What I usually do is design just one board but lay up the full panel
(including tooling strips, routs (and breakoff tabs) or v-grooves,
etc).  So my mech layer 1 (renamed Board Outline) is a complex thing
showing 2.4mm routs and break off strips if I am routing the panel, or
lines crossing right across the panel (and tooling strips) if I am
v-grooving.  (In the case of a routed board with break off tabs, I place
all the breakoff holes on all tabs - I then make a note to the PCB maker
that the break off holes and Mech Layer 1 and possibly some dimension
layers etc are not to be stepped and repeated, while everything else should
be.  The breakoff holes are easily identifiable, they are the only 0.75mm
unplated holes on the board).

I fully dimension the step and repeat and then get the PCB maker to do the
actual step and repeat.  This works very well and I always have a fully
checkable design.

This works a treat for me.  (BTW - I set the DXP board shape to just the
size of my single board, not the full panel.  DXP users will know what I

(This method does not work when you are trying to panelise multiple
different boards - in this case I would probably use the Camtastic method.)

Alternatively, use Camtastic to do the panelising.  This is available in

The problem with panelisation in a CAE pkg is the problem of having two
files to maintain - the individual PCB and the panel.  In a fully panelised
design, the panel is not really an editable files.  I gave up on this some
time ago as it was always tiresome and subject to risk. But if you really
have to panelise in DXP use the same technique you have to use in P99SE,
that is Paste Special then check the "Duplicate designator" and possibly
"Keep net name".

There is a forum specifically targeting DXP users.  It has lots of traffic
and lots of Altium involvement.

Good luck,
Ian Wilson

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