Re: [linux-sunxi] [PATCH u-boot (sc)] Cleanups of various clock macro's
On Tue, 2014-03-25 at 11:00 +0100, oliver+l...@schinagl.nl wrote: From: Olliver Schinagl oli...@schinagl.nl This patch cleans up several macro's to remove magic values etc from clock.c and clock.h. Casualties being dragged in are some macro's from dram.c and the i2c driver. This addresses (some of) Marek's review on the upstreaming series, is that right? You mentioned in the cover letter that you had only compile tested, for this sort of cleanup the approach I would take is to make sure that objdump -d before and after is identical, this way you can be absolutely sure you didn't accidentally break something. Any changes which intentionally change something should be split out. Unfortunately the sr32 changes fall into the latter bucket, oh well. I comments on the sr32 transforms already. Some others: /* open the clock for uart */ - sr32(ccm-apb1_gate, 16 + CONFIG_CONS_INDEX - 1, 1, CLK_GATE_OPEN); + clrsetbits_le32(ccm-apb1_clk_div_cfg, + CCM_APB_GATE_UART( + SUNXI_CONS_TO_UART(CONFIG_CONS_INDEX)), Consider a helper which combines CCM_APB_GATE_UART and SUNXI_CONS_TO_UART? @@ -85,9 +108,10 @@ unsigned int clock_get_pll5(void) struct sunxi_ccm_reg *const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; uint32_t rval = readl(ccm-pll5_cfg); - int n = (rval 8) 0x1f; - int k = ((rval 4) 3) + 1; - int p = 1 ((rval 16) 3); + int n = CCM_PLL5_CFG_N_GET(rval); + int k = CCM_PLL5_CFG_K_GET(rval); + int p = CCM_PLL5_CFG_OUT_EXT_DIV_P_GET(rval); + return 2400 * n * k / p; Is 24MHz #defined somewhere? } @@ -96,40 +120,52 @@ int clock_twi_onoff(int port, int state) struct sunxi_ccm_reg *const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - if (port 2) + if (!(port (CCM_APB_GATE_TWI1 | CCM_APB_GATE_TWI2 | + CCM_APB_GATE_TWI3 | CCM_APB_GATE_TWI4))) Maybe #define a TWI_MASK? return -1; /* set the apb1 clock gate for twi */ - sr32(ccm-apb1_gate, 0 + port, 1, state); + if (state) + clrsetbits_le32(ccm-apb1_gate, CCM_APB_GATE_TWI(port), + CCM_APB_GATE_TWI(port)); Shouldn't these macros involve state and nor port, or maybe both? The original code was passing state to sr32. + else + clrbits_le32(ccm-apb1_gate, CCM_APB_GATE_TWI(port)); return 0; } Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH] sunxi: use DIV_ROUND_UP in clock setup instead of custom RDIV
RDIV is lacking a set of brackets compared with DIV_ROUND_UP but due to
precedence rules things work out the same for all callers.
Confirmed with objdump before and after.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/clock.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/clock.c b/arch/arm/cpu/armv7/sunxi/clock.c
index 980fb90..a344971 100644
--- a/arch/arm/cpu/armv7/sunxi/clock.c
+++ b/arch/arm/cpu/armv7/sunxi/clock.c
@@ -109,7 +109,6 @@ int clock_twi_onoff(int port, int state)
#define PLL1_CFG(N, K, M, P) (1 31 | 0 30 | 8 26 | 0 25 | \
16 20 | (P) 16 | 2 13 | (N) 8 | \
(K) 4 | 0 3 | 0 2 | (M) 0)
-#define RDIV(a, b) ((a + (b) - 1) / (b))
struct {
u32 pll1_cfg;
@@ -146,8 +145,8 @@ void clock_set_pll1(int hz)
hz = pll1_para[i].freq;
/* Calculate system clock divisors */
- axi = RDIV(hz, 43200); /* Max 450MHz */
- ahb = RDIV(hz/axi, 20400); /* Max 250MHz */
+ axi = DIV_ROUND_UP(hz, 43200); /* Max 450MHz */
+ ahb = DIV_ROUND_UP(hz/axi, 20400); /* Max 250MHz */
apb0 = 2; /* Max 150MHz */
printf(CPU: %dHz, AXI/AHB/APB: %d/%d/%d\n, hz, axi, ahb, apb0);
--
1.9.0
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[linux-sunxi] [PATCH] sunxi: use clrsetbit in gpio/pinmux code
I was concerned that this would remove some barriers which were previously
implicitly present in the readl/writel calls.
Comparing the preprocessed code shows that the old code had compiler barrers
(not CPU instruction barriers) between the reads and writes while the new code
does everything as a single statement without barriers. I think this is safe.
In any case the generated code is identical (confirmed with objdump).
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/pinmux.c | 21 +++--
1 file changed, 3 insertions(+), 18 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/pinmux.c
b/arch/arm/cpu/armv7/sunxi/pinmux.c
index 8f5cbfe..832545f 100644
--- a/arch/arm/cpu/armv7/sunxi/pinmux.c
+++ b/arch/arm/cpu/armv7/sunxi/pinmux.c
@@ -12,18 +12,13 @@
int sunxi_gpio_set_cfgpin(u32 pin, u32 val)
{
- u32 cfg;
u32 bank = GPIO_BANK(pin);
u32 index = GPIO_CFG_INDEX(pin);
u32 offset = GPIO_CFG_OFFSET(pin);
struct sunxi_gpio *pio =
((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)-gpio_bank[bank];
- cfg = readl(pio-cfg[0] + index);
- cfg = ~(0xf offset);
- cfg |= val offset;
-
- writel(cfg, pio-cfg[0] + index);
+ clrsetbits_le32(pio-cfg[0] + index, 0xf offset, val offset);
return 0;
}
@@ -45,36 +40,26 @@ int sunxi_gpio_get_cfgpin(u32 pin)
int sunxi_gpio_set_drv(u32 pin, u32 val)
{
- u32 drv;
u32 bank = GPIO_BANK(pin);
u32 index = GPIO_DRV_INDEX(pin);
u32 offset = GPIO_DRV_OFFSET(pin);
struct sunxi_gpio *pio =
((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)-gpio_bank[bank];
- drv = readl(pio-drv[0] + index);
- drv = ~(0x3 offset);
- drv |= val offset;
-
- writel(drv, pio-drv[0] + index);
+ clrsetbits_le32(pio-drv[0] + index, 0x3 offset, val);
return 0;
}
int sunxi_gpio_set_pull(u32 pin, u32 val)
{
- u32 pull;
u32 bank = GPIO_BANK(pin);
u32 index = GPIO_PULL_INDEX(pin);
u32 offset = GPIO_PULL_OFFSET(pin);
struct sunxi_gpio *pio =
((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)-gpio_bank[bank];
- pull = readl(pio-pull[0] + index);
- pull = ~(0x3 offset);
- pull |= val offset;
-
- writel(pull, pio-pull[0] + index);
+ clrsetbits_le32(pio-pull[0] + index, 0x3 offset, offset);
return 0;
}
--
1.9.0
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[linux-sunxi] [PATCH] sunxi: remove some unnecesssary ()s from bare numbers
Picked up during upstream review. Signed-off-by: Ian Campbell i...@hellion.org.uk --- include/configs/sunxi-common.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 7b06c99..212b621 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -37,8 +37,8 @@ #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL /* ns16550 reg in the low bits of cpu reg */ -#define CONFIG_SYS_NS16550_REG_SIZE(-4) -#define CONFIG_SYS_NS16550_CLK (2400) +#define CONFIG_SYS_NS16550_REG_SIZE-4 +#define CONFIG_SYS_NS16550_CLK 2400 #define CONFIG_SYS_NS16550_COM1SUNXI_UART0_BASE #define CONFIG_SYS_NS16550_COM2SUNXI_UART1_BASE #define CONFIG_SYS_NS16550_COM3SUNXI_UART2_BASE -- 1.9.0 -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [U-Boot] [PATCH v2 5/9] sunxi: generic sun7i build infrastructure.
On Mon, 2014-03-24 at 22:01 +0100, Marek Vasut wrote: diff --git a/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds b/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds new file mode 100644 index 000..cf02300 --- /dev/null +++ b/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds This file is unreadable. Can you not actually merge it into u-boot-spl.lds with some #ifdef ? They look pretty much entirely different to me. I should sort out the whitespace and stuff though, it is a mess in that regard. Perhaps that will help. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [U-Boot] [PATCH v2 1/9] sunxi: initial sun7i clocks and timer support.
On Mon, 2014-03-24 at 23:42 +0100, Olliver Schinagl wrote: [...] I've got a local cleanup patch set where I fixed this already to clrsetbits_le32 [...] Same here, got that in my local tree too Could you post what you've got please? +#ifdef CONFIG_SPL_BUILD +#define PLL1_CFG(N, K, M, P) (1 31 | 0 30 | 8 26 | 0 25 | \ + 16 20 | (P) 16 | 2 13 | (N) 8 | \ + (K) 4 | 0 3 | 0 2 | (M) 0) Here is well. dito :) +#define RDIV(a, b)((a + (b) - 1) / (b)) This is some kind of DIV_ROUND_UP() from include/common.h ? [...] That one i didn't have; Ian, I guess you can verify that generic macro works for here? Yeah, I'll look into that and all the other feedback from Marek. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [U-Boot] [PATCH v2 2/9] sunxi: initial sun7i pinmux and gpio support
On Mon, 2014-03-24 at 21:54 +0100, Marek Vasut wrote: + cfg = readl(pio-cfg[0] + index); + cfg = ~(0xf offset); + cfg |= val offset; + + writel(cfg, pio-cfg[0] + index); clrsetbits_le32() here. I looked at this transform in a few different contexts and one concern I had was that readl and writel have barriers in them (after the read and before the write respectively) while clrsetbits and friends do not. I don't think this will matter for the read/modify/write bit twiddling itself (since there are register dependencies) but I was slightly concerned that the barriers were hiding the lack of explicit barriers which would be required between the various reads/writes. But I think I am probably being overly cautious here and the obvious transformation can be made. Anyone got any thoughts? Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [U-Boot] [PATCH v2 2/9] sunxi: initial sun7i pinmux and gpio support
On Mon, 2014-03-24 at 21:54 +0100, Marek Vasut wrote: +int sunxi_gpio_set_cfgpin(u32 pin, u32 val); +int sunxi_gpio_get_cfgpin(u32 pin); +int sunxi_gpio_set_drv(u32 pin, u32 val); +int sunxi_gpio_set_pull(u32 pin, u32 val); +int name_to_gpio(const char *name); +#define name_to_gpio name_to_gpio What is this ugly define doing here ? common/cmd_gpio.c uses the #ifndef name_to_gpio pattern to provide (or not) a default fallback implementation. I think this is a reasonably (but not very) common idiom for such cases where the non-default variant is not best expressed as a macro. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [U-Boot] [PATCH v2 2/9] sunxi: initial sun7i pinmux and gpio support
On Wed, 2014-03-26 at 10:03 +0100, Wolfgang Denk wrote: Dear Ian Campbell, In message 1395822781.29683.12.ca...@dagon.hellion.org.uk you wrote: On Mon, 2014-03-24 at 21:54 +0100, Marek Vasut wrote: +int sunxi_gpio_set_cfgpin(u32 pin, u32 val); +int sunxi_gpio_get_cfgpin(u32 pin); +int sunxi_gpio_set_drv(u32 pin, u32 val); +int sunxi_gpio_set_pull(u32 pin, u32 val); +int name_to_gpio(const char *name); +#define name_to_gpio name_to_gpio What is this ugly define doing here ? common/cmd_gpio.c uses the #ifndef name_to_gpio pattern to provide (or not) a default fallback implementation. I think this is a reasonably (but not very) common idiom for such cases where the non-default variant is not best expressed as a macro. Please add a comment to explain that. Unless you object I think I'll do as Marek suggested name the function sunxi_name_to_gpio and make the #define to that, it seems more consistent that way. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [PATCH+GIT 0/9] sunxi: upstream review based cleanups
On Mon, 2014-03-24 at 00:00 +0100, Henrik Nordström wrote: sön 2014-03-16 klockan 19:40 +0100 skrev Hans de Goede: Thanks I've added the 9 patches to the u-boot-sunxi repo sunxi branch, as for the merge with v2014.04-rc2, I would like to wait what HNO has to say about that. Merges from upstream is always welcome. Just make sure it builds and boots on some board before pushing. git://gitorious.org/ijc/u-boot.git sunxi-merge-v2014.04-rc2 should be suitable, I tested it on cubietruck. If not I will be creating an updated version of this branch as part of preparing v3 of the upstreaming patches, so you could wait for that. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] Re: [PATCH 4/9] sunxi: only try to init dram once.
On Mon, 2014-03-24 at 00:21 +0100, Henrik Nordström wrote: sön 2014-03-16 klockan 17:34 + skrev Ian Campbell: As Alex explains in [0] this triple call likely dates back to before the DRAM init code used proper timings. It is not necessary any more. maybe, but not comfortable removing it without some test showing that the problem is indeed solved. Well all I can say is that it Worked For Me(tm) when I removed it. Base on that and upstream's feedback the code upstreamed in my initial attempt will only have a single call. If someone has a platform which requires these triple calls (and it sounds like you have one in mind) and it can't be fixed properly (e.g. by changing the DRAM timings or something similar) then the extra calls could be upstreamed as an independent patch which can come with a concrete rationale (I can't really do that now as the board I'm upstreaming doesn't appear to suffer from the issue). We found it randomly failing on reboot some boards, I think it was OLinuXino A13. Cold boot always worked. Then looked at Allwinner boot0 code and copied retry from there. The code is from Sun Nov 4 22:32:41 2012 (ffe3d4fb) Thanks. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] [PATCH u-boot-sunxi.git] sunxi: dram: checkpatch.pl cleanups
On Mon, 2014-03-24 at 12:55 +0800, Chen-Yu Tsai wrote: Hi, On Mon, Mar 24, 2014 at 4:21 AM, Hans de Goede hdego...@redhat.com wrote: Hi, On 03/23/2014 04:13 PM, Ian Campbell wrote: On Sat, 2014-03-22 at 20:22 +0100, Hans de Goede wrote: One thing that stands out when doing a diff against sunxi-merge-v2014.04-rc2 is this: --- u-boot/drivers/net/designware.c 2014-03-21 16:26:42.229522420 +0100 +++ u-boot-sunxi/drivers/net/designware.c 2014-03-22 17:21:51.907879720 + @@ -249,10 +249,10 @@ rx_descs_init(dev); tx_descs_init(dev); - writel(FIXEDBURST | PRIORXTX_41 | BURST_16, dma_p-busmode); + writel(FIXEDBURST | PRIORXTX_41 | BURST_8, dma_p-busmode); This is required. The GMAC IP does not support DMA burst lengths above 8. Should this be a per-platform option or should it be reduced for everyone? Having to make that call is one of the main reasons I've been leaving it alone since I just don't have the necessary context. - writel(readl(dma_p-opmode) | FLUSHTXFIFO | STOREFORWARD, - dma_p-opmode); + writel(readl(dma_p-opmode) | FLUSHTXFIFO | STOREFORWARD | + TXSECONDFRAME, dma_p-opmode); This is a performance improvement change, What sort of magnitude is it? e.g. I'm not sure how important a few percent would be in a bootloader, but if it were a 200% improvement then well. In any case I think I won't tackle this bit as part of the initial upstreaming attempt. I was under the impression that Wens (or someone else) had this under control WRT upstreaming so I was leaving it for now, I'm not sure wens, or anyone for that matter is actively working on gmac u-boot support. Sorry, no one is actively working on this ATM. If you could do it, that would be nice. Only a oneliner to change the burst length is required. I'll add it (the burst setting) to my list, but I may not do it until after the initial effort has gone upstream. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] [PATCH u-boot-sunxi.git] sunxi: dram: checkpatch.pl cleanups
On Sat, 2014-03-22 at 20:22 +0100, Hans de Goede wrote: One thing that stands out when doing a diff against sunxi-merge-v2014.04-rc2 is this: --- u-boot/drivers/net/designware.c 2014-03-21 16:26:42.229522420 +0100 +++ u-boot-sunxi/drivers/net/designware.c 2014-03-22 17:21:51.907879720 + @@ -249,10 +249,10 @@ rx_descs_init(dev); tx_descs_init(dev); - writel(FIXEDBURST | PRIORXTX_41 | BURST_16, dma_p-busmode); + writel(FIXEDBURST | PRIORXTX_41 | BURST_8, dma_p-busmode); - writel(readl(dma_p-opmode) | FLUSHTXFIFO | STOREFORWARD, - dma_p-opmode); + writel(readl(dma_p-opmode) | FLUSHTXFIFO | STOREFORWARD | + TXSECONDFRAME, dma_p-opmode); writel(readl(dma_p-opmode) | RXSTART | TXSTART, dma_p-opmode); Which we should probably fix given that you've enabled gmac support. Things work for me without. I was under the impression that Wens (or someone else) had this under control WRT upstreaming so I was leaving it for now, it can easily go in as an independent fix AFAICT. I also noticed that in include/configs/sunxi-common.h you've a formatting fix for the CONFIG_PHY_ADDR #define which is not yet in u-boot-sunxi. CONFIG_PHY_ADDR arrived as part of the merge of v2014.04-rc2, so the fix got folded into the merge when I redid it. I might manage a v3, which will be a couple of cleanups and a lot of clarifications about licensing, today, or I might watch game of thrones and do v3 later in the week, lets see how it goes... Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [U-Boot] [PATCH v2 4/9] sunxi: initial generic sun7i cpu, board and start of day support
On Sat, 2014-03-22 at 10:04 +0100, Hans de Goede wrote: Sorry, this is a NAK for these patches. These changes are not useful by themselves but are split out to make the patch sizes more manageable. This is not how we work. Patches have to implement specific features, or fix specific bugs. And they have to maintain bisectability of the code. These patches do implement specific features, like dram init, timer/clk init, etc. They just don't enable them yet as by themselves they are not useful. The patches also maintain bisectability since they don't touch any existing files until the patch 5 and 6 come into play, and the changes in patch 5 keep things compiling just fine. That's correct, the initial 4 patches add specific subsystem support for sunxi but none of it is built until patch 5 at which point things work. FWIW I believe the split-up Ian has done makes sense. But if you insist I guess we can merge patch 1-6 (the minimum set to get something working) into 1 big patch. Personally I think that would hinder review more than help, but if that is what is required I'll do it. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] [PATCH u-boot-sunxi.git] sunxi: use a 4MB malloc pool
On Fri, 2014-03-21 at 20:11 -0300, Emilio López wrote: Hi Ian, El vie 21 mar 2014 18:40:04 ART, Ian Campbell escribió: As advised by Tom. Signed-off-by: Ian Campbell i...@hellion.org.uk Cc: Tom Rini tr...@ti.com --- include/configs/sunxi-common.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index c76cf88..9070462 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -96,9 +96,9 @@ /* * Size of malloc() pool - * 1MB = 0x10, 0x10 = 1024 * 1024 + * 4MB = 0x40, 0x40 = 1024 * 1024 The numbers don't add up on there there :) Oops, should read 4 * 0x10 = 4 * 1024 * 1024 at the end of course! I might just ditch the comment in favour of /* 4MB malloc() pool */, we can all do maths... */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 20)) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 20)) /* Flat Device Tree (FDT/DT) support */ #define CONFIG_OF_LIBFDT Thanks for working on all this! :) My pleasure. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH u-boot-sunxi.git v2] sunxi: use a 4MB malloc pool
As advised by Tom. Signed-off-by: Ian Campbell i...@hellion.org.uk Cc: Tom Rini tr...@ti.com --- v2: Simplify (and make correct) the comment --- include/configs/sunxi-common.h | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index c76cf88..3a31361 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -94,11 +94,8 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ #endif -/* - * Size of malloc() pool - * 1MB = 0x10, 0x10 = 1024 * 1024 - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 20)) +/* 4MB of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 20)) /* Flat Device Tree (FDT/DT) support */ #define CONFIG_OF_LIBFDT -- 1.8.5.3 -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [U-Boot] [PATCH v2 5/9] sunxi: generic sun7i build infrastructure.
On Sat, 2014-03-22 at 16:12 +0100, Hans de Goede wrote: Hi, On 03/22/2014 01:33 PM, Wolfgang Denk wrote: Dear Ian, In message 1395482650.2234.104.ca...@hastur.hellion.org.uk you wrote: What does that mean? I cannot find these names in the SoB lines? I explained the process by which I arrived at these lists in 0/9. It means that they appear as an author for a commit in the history in the u-boot-sunxi.git, but did not supply an S-o-b. However I am adding my own S-o-b under clause (b) of the DCO, which I believe applies here. Please read (again) what the Developer's Certificate of Origin means. It appears that such code would fall under clause (c): The contribution was provided directly to me by some other person who certified (a), (b) or (c) and I have not modified it. No as said before the parts for which we don't have a Signed-off-by for falls under b), since we took it from existing code which has clear GPLv2+ license headers on each and every file. Thanks, this is just what I was just about to say. b) Reads: (b) The contribution is based upon previous work that, to the best of my knowledge, is covered under an appropriate open source license and I have the right under that license to submit that work with modifications, whether created in whole or in part by me, under the same open source license (unless I am permitted to submit under a different license), as indicated in the file; or Did for example j or hehopmajieh provide such certificates to you? It's entirely possible that none of these peoples' contributions still remain in the files being upstreamed, but figuring that out for sure would be a large and manual task. As I explained in 0/9 I prefer to over-credit by mentioning people whose actual contributions no longer remain rather than fail to credit someone whose contribution does The Sob is only partially for crediting; the major purpose is to make sure we really have the full rights to distribute such code under the listed licenses. To guarantee that, the chain of certificates mustnot be interrupted. Right, and we do since the files we're basing our work on is GPLv2+ licensed, the purpose of the listing of extra names other then the Signed-off-by: tags is for solely for attribution. Right. Note in some cases we do have email addresses and Ian has said he will add those in the next version, Actually in every case we have email addresses, I just omitted them up until now (since a credit doesn't strictly need one). -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [U-Boot] [PATCH v2 4/9] sunxi: initial generic sun7i cpu, board and start of day support
On Sat, 2014-03-22 at 13:27 +0100, Wolfgang Denk wrote: Dear Hans de Goede, In message 532d5238.6080...@redhat.com you wrote: These changes are not useful by themselves but are split out to make the patch sizes more manageable. This is not how we work. Patches have to implement specific features, or fix specific bugs. And they have to maintain bisectability of the code. These patches do implement specific features, like dram init, timer/clk init, etc. They just don't enable them yet as by themselves they are not useful. Well, then at least the commit meSsage needs some serious rework. I will add some more description for the next round. The patches also maintain bisectability since they don't touch any existing files until the patch 5 and 6 come into play, and the changes in patch 5 keep things compiling just fine. I think I have seen some interdependencies between the patches - like referring to stuff that gets only added in later patches? I don't believe so, bisectability is maintained because there are no build targets until patch #5 and from that point on every step builds. Obviously at every step (including #1..#5) there is no impact on any other platform. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [PATCH u-boot sunxi 01/12] sunxi: Implement reset_cpu
On Sat, 2014-03-22 at 17:16 +0100, Hans de Goede wrote: Hi, On 03/18/2014 11:25 AM, Ian Campbell wrote: On Tue, 2014-03-18 at 00:00 +0100, Hans de Goede wrote: There is no way to reset the cpu, so use the watchdog for this. Did you see https://www.mail-archive.com/u-boot@lists.denx.de/msg134259.html ? Ah no, but I've read it now. I think it would be better to focus on all the other more important bits for now, and then we can look into adding some sort of generic watchdog support later. OK, I wanted to avoid divergence between the upstreaming effort at u-boot-sunxi.git as much as possible, but in this case I think the impact is small enough to be acceptable. In the mean time I would like to carry this patch, since having reset work can be quite useful, Absolutely! (While I'm here: thanks for applying those other patches) Ian -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] [PATCH u-boot-sunxi.git] sunxi: dram: checkpatch.pl cleanups
On Fri, 2014-03-21 at 16:14 +0100, Hans de Goede wrote: Hi, On 03/20/2014 10:37 PM, Ian Campbell wrote: Mainly whitespace. The main construct which it complains about is: while(POKE THE HARDWARE); which obscures the potentially infinite loop, I've rewritten as: while(POKE THE HARDWARE) ; Signed-off-by: Ian Campbell i...@hellion.org.uk Thanks, added to u-boot-sunxi.git sunxi branch. Thanks, N times over (I lost count of the number of patches). I was planning to resync my mainlining tree this evening so this is very timely. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] [PATCH u-boot-sunxi.git] sunxi: dram: checkpatch.pl cleanups
On Fri, 2014-03-21 at 16:48 +0100, Hans de Goede wrote: Hi, On 03/21/2014 04:45 PM, Ian Campbell wrote: On Fri, 2014-03-21 at 16:14 +0100, Hans de Goede wrote: Hi, On 03/20/2014 10:37 PM, Ian Campbell wrote: Mainly whitespace. The main construct which it complains about is: while(POKE THE HARDWARE); which obscures the potentially infinite loop, I've rewritten as: while(POKE THE HARDWARE) ; Signed-off-by: Ian Campbell i...@hellion.org.uk Thanks, added to u-boot-sunxi.git sunxi branch. Thanks, N times over (I lost count of the number of patches). I was planning to resync my mainlining tree this evening so this is very timely. Actually I'm currently preparing a cleaned up version of your v1 with all the cleanups merged in and on top of v2014.04-rc2 instead of v2014.01 as I need to have a clean base for my own work. If you wait 30 minutes, I should have something for you to test / poke at and we avoid doing double work :) Actually, I already rebased to current sunxi with the first batch of cleanups last night, I just didn't repost because I knew there was more cleanups in the pipeline, but not to worry. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] [PATCH u-boot-sunxi.git] sunxi: dram: checkpatch.pl cleanups
On Fri, 2014-03-21 at 17:11 +0100, Hans de Goede wrote: Hi, On 03/21/2014 04:45 PM, Ian Campbell wrote: On Fri, 2014-03-21 at 16:14 +0100, Hans de Goede wrote: Hi, On 03/20/2014 10:37 PM, Ian Campbell wrote: Mainly whitespace. The main construct which it complains about is: while(POKE THE HARDWARE); which obscures the potentially infinite loop, I've rewritten as: while(POKE THE HARDWARE) ; Signed-off-by: Ian Campbell i...@hellion.org.uk Thanks, added to u-boot-sunxi.git sunxi branch. Thanks, N times over (I lost count of the number of patches). I was planning to resync my mainlining tree this evening so this is very timely. Ok, so as promised I've already done a sync and here I've 2 branches for you at: https://github.com/jwrdegoede/u-boot-sunxi/ The first branch is: sunxi-v2014.04, this is u-boot-sunxi.git sunxi branch with v2014.04-rc2 merged in, essentially this is your sunxi-mainlining-cleanups with all the recent cleanups wens and you did added on top. Thanks, I was really hoping we could pull mainline up to this level too ASAP. I want to avoid the possibility of diverging into two forks with different featuresets. But I guess hno isn't around so this will have to do. This is what I've used as a start for getting a cleaned up version of your v1 on top of v2014.04-rc2. So the 2nd branch I've for you is: v2014.04-sunxi which is v2014.04-rc2 with sunxi support added on top. This contains your v1, with all the cleanups you did, and all the fixups I did merged in. So basically a v2 ready to submit upstream :) Note that your gmac patch is missing as I dropped that initially and I've not re-added it yet, so I guess you may want to re-add that before posting a v2 to the list. On top of a cleaned-up version of your v1 set (minus gmac) are rebased versions of my patches for adding sun4i, sun5i and axp pmic support. Note I still need to address the review comments on the i2c patch. I hope this is useful for you. I think so , thanks. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] [PATCH 2/9] sunxi: define bit shifts for CPU_AHB_APB0_CFG_REG
On Fri, 2014-03-21 at 22:01 +0100, Olliver Schinagl wrote: On 03/16/2014 06:34 PM, Ian Campbell wrote: Signed-off-by: Ian Campbell i...@hellion.org.uk --- arch/arm/cpu/armv7/sunxi/clock.c| 31 +++ arch/arm/include/asm/arch-sunxi/clock.h | 8 ++-- 2 files changed, 29 insertions(+), 10 deletions(-) diff --git a/arch/arm/cpu/armv7/sunxi/clock.c b/arch/arm/cpu/armv7/sunxi/clock.c index f7eb37b..54d801c 100644 --- a/arch/arm/cpu/armv7/sunxi/clock.c +++ b/arch/arm/cpu/armv7/sunxi/clock.c @@ -21,12 +21,18 @@ static void clock_init_safe(void) (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; /* Set safe defaults until PMU is configured */ - writel(AXI_DIV_1 0 | AHB_DIV_2 4 | APB0_DIV_1 8 | - CPU_CLK_SRC_OSC24M 16, ccm-cpu_ahb_apb0_cfg); + writel(AXI_DIV_1 AXI_DIV_SHIFT | + AHB_DIV_2 AHB_DIV_SHIFT | + APB0_DIV_1 APB0_DIV_SHIFT | + CPU_CLK_SRC_OSC24M CPU_CLK_SRC_SHIFT, + ccm-cpu_ahb_apb0_cfg); Is this a pre-patch and should more be done here? I don't think this is making anything more clear/removing magic values is it? It is removing the 0, 4, 8 and 16 magic shifts and replacing them with descriptive named fields, which is what was asked for. This is a pretty common idiom in this sort of code. I don't think any more *needs* to be done (maybe you want to, that's up to you). I probably would have done something like (ignore any stupid mistakes, i'm a little rusty atm :p) (p.s. I didn't think define names completly through either, so forgive me there too :) #define CPU_AXI_CLK_DIV_RATIO(n) n) - 1) 0x3) 0) #define CPU_ATB_APB_CLK_DIV_RATIO(n) n) - 1) 0x3) 2) /* note to self, isn't there some mathematical way to make this better*/ #define CPU_AHB_CLK_DIV_RATIO(n) (((n) 0x3) 4) #define __CPU_AHB_CLK_DIV_RATIO_1 0x0 #define __CPU_AHB_CLK_DIV_RATIO_2 0x1 #define __CPU_AHB_CLK_DIV_RATIO_4 0x2 #define __CPU_AHB_CLK_DIV_RATIO_8 0x3 #define CPU_AHB_CLK_DIV_RATIO_1 \ CPU_AHB_CLK_DIV_RATIO(__CPU_AHB_CLK_DIV_RATIO_1) #define CPU_AHB_CLK_DIV_RATIO_2 \ CPU_AHB_CLK_DIV_RATIO(__CPU_AHB_CLK_DIV_RATIO_2) #define CPU_AHB_CLK_DIV_RATIO_4 \ CPU_AHB_CLK_DIV_RATIO(__CPU_AHB_CLK_DIV_RATIO_4) #define CPU_AHB_CLK_DIV_RATIO_8 \ CPU_AHB_CLK_DIV_RATIO(__CPU_AHB_CLK_DIV_RATIO_8) #define CPU_AHB_CLK_SRC(n) ((n) Personally I don't think that is making an improvement. The VALUE SHIFT pattern is well known. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 6/9] sunxi: add support for Cubietruck booting in FEL mode
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Ian Campbell i...@hellion.org.uk
Reviewed-by: Tom Rini tr...@ti.com
---
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in.
v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in ldscripts vs v2014.01.
---
board/sunxi/dram_cubietruck.c | 31 +++
boards.cfg| 1 +
2 files changed, 32 insertions(+)
create mode 100644 board/sunxi/dram_cubietruck.c
diff --git a/board/sunxi/dram_cubietruck.c b/board/sunxi/dram_cubietruck.c
new file mode 100644
index 000..1e7c94a
--- /dev/null
+++ b/board/sunxi/dram_cubietruck.c
@@ -0,0 +1,31 @@
+/* this file is generated, don't edit it yourself */
+
+#include common.h
+#include asm/arch/dram.h
+
+static struct dram_para dram_para = {
+ .clock = 432,
+ .type = 3,
+ .rank_num = 1,
+ .density = 8192,
+ .io_width = 16,
+ .bus_width = 32,
+ .cas = 9,
+ .zq = 0x7f,
+ .odt_en = 0,
+ .size = 2048,
+ .tpr0 = 0x42d899b7,
+ .tpr1 = 0xa090,
+ .tpr2 = 0x22a00,
+ .tpr3 = 0x0,
+ .tpr4 = 0x1,
+ .tpr5 = 0x0,
+ .emr1 = 0x4,
+ .emr2 = 0x10,
+ .emr3 = 0x0,
+};
+
+unsigned long sunxi_dram_init(void)
+{
+ return dramc_init(dram_para);
+}
diff --git a/boards.cfg b/boards.cfg
index a32f46b..031da3d 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -366,6 +366,7 @@ Active arm armv7 rmobile renesas
lager
Active arm armv7 s5pc1xx samsung goni
s5p_goni -
Mateusz Zalega m.zal...@samsung.com
Active arm armv7 s5pc1xx samsung smdkc100
smdkc100 -
Minkyu Kang mk7.k...@samsung.com
Active arm armv7 socfpga altera socfpga
socfpga_cyclone5 -
-
+Active arm armv7 sunxi - sunxi
Cubietruck_FEL sun7i:CUBIETRUCK,SPL_FEL
-
Active arm armv7 u8500 st-ericsson snowball
snowball -
Mathieu Poirier mathieu.poir...@linaro.org
Active arm armv7 u8500 st-ericsson u8500
u8500_href -
-
Active arm armv7 vf610 freescale vf610twr
vf610twr
vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg
Alison Wang
b18...@freescale.com
--
1.8.5.3
--
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[linux-sunxi] [PATCH v2 7/9] sunxi: add gmac Ethernet support
Signed-off-by: Chen-Yu Tsai w...@csie.org
Signed-off-by: Jens Kuske jensku...@gmail.com
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in:
- drop accidentally doubled hunk
- use gpio setup functions
- moved before mmc patches
v1: Based on u-bootx-sunxi.git#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in ldscripts vs v2014.01.
---
arch/arm/cpu/armv7/sunxi/board.c | 15 +++
boards.cfg | 2 +-
drivers/net/Makefile | 1 +
drivers/net/sunxi_gmac.c | 34 ++
include/configs/sunxi-common.h | 37 +
include/netdev.h | 1 +
6 files changed, 89 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/sunxi_gmac.c
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 4a29b4b..ad9840b 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -11,6 +11,8 @@
*/
#include common.h
+#include netdev.h
+#include miiphy.h
#include serial.h
#ifdef CONFIG_SPL_BUILD
#include spl.h
@@ -86,3 +88,16 @@ void enable_caches(void)
dcache_enable();
}
#endif
+
+#if defined(CONFIG_SUNXI_GMAC)
+/*
+ * Initializes on-chip ethernet controllers.
+ * to override, implement board_eth_init()
+ */
+int cpu_eth_init(bd_t *bis)
+{
+ sunxi_gmac_initialize(bis);
+
+ return 0;
+}
+#endif
diff --git a/boards.cfg b/boards.cfg
index 031da3d..3134e9e 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -366,7 +366,7 @@ Active arm armv7 rmobile renesas
lager
Active arm armv7 s5pc1xx samsung goni
s5p_goni -
Mateusz Zalega m.zal...@samsung.com
Active arm armv7 s5pc1xx samsung smdkc100
smdkc100 -
Minkyu Kang mk7.k...@samsung.com
Active arm armv7 socfpga altera socfpga
socfpga_cyclone5 -
-
-Active arm armv7 sunxi - sunxi
Cubietruck_FEL sun7i:CUBIETRUCK,SPL_FEL
-
+Active arm armv7 sunxi - sunxi
Cubietruck_FEL
sun7i:CUBIETRUCK,SPL_FEL,SUNXI_GMAC,RGMII
-
Active arm armv7 u8500 st-ericsson snowball
snowball -
Mathieu Poirier mathieu.poir...@linaro.org
Active arm armv7 u8500 st-ericsson u8500
u8500_href -
-
Active arm armv7 vf610 freescale vf610twr
vf610twr
vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg
Alison Wang
b18...@freescale.com
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 7f9ce90..2300c00 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_SH_ETHER) += sh_eth.o
obj-$(CONFIG_SMC9) += smc9.o
obj-$(CONFIG_SMC911X) += smc911x.o
obj-$(CONFIG_SUNXI_WEMAC) += sunxi_wemac.o
+obj-$(CONFIG_SUNXI_GMAC) += sunxi_gmac.o
obj-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o
obj-$(CONFIG_TSEC_ENET) += tsec.o fsl_mdio.o
obj-$(CONFIG_DRIVER_TI_CPSW) += cpsw.o
diff --git a/drivers/net/sunxi_gmac.c b/drivers/net/sunxi_gmac.c
new file mode 100644
index 000..13b7d70
--- /dev/null
+++ b/drivers/net/sunxi_gmac.c
@@ -0,0 +1,34 @@
+#include common.h
+#include netdev.h
+#include miiphy.h
+#include asm/gpio.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/gpio.h
+
+int sunxi_gmac_initialize(bd_t *bis)
+{
+ int pin;
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ /* Set up clock gating */
+ setbits_le32(ccm-ahb_gate1, 0x1 AHB_GATE_OFFSET_GMAC
[linux-sunxi] [PATCH v2 2/9] sunxi: initial sun7i pinmux and gpio support
This has been stripped back for mainlining and supports only sun7i. These
changes are not useful by themselves but are split out to make the patch sizes
more manageable.
As well as the following signed-off-by the sunxi branch shows commits to these
files authored by the following:
Carl van Schaik
Henrik Nordstrom
Stefan Roese
Tom Cubie
Signed-off-by: Chen-Yu Tsai w...@csie.org
Signed-off-by: Hans de Goede hdego...@redhat.com
Signed-off-by: Ma Haijun mahaij...@gmail.com
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Ian Campbell i...@hellion.org.uk
Reviewed-by: Tom Rini tr...@ti.com
---
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in:
- Additional pin definitions
v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in ldscripts vs v2014.01.
---
arch/arm/cpu/armv7/sunxi/Makefile | 1 +
arch/arm/cpu/armv7/sunxi/pinmux.c | 80 ++
arch/arm/include/asm/arch-sunxi/gpio.h | 145 +
3 files changed, 226 insertions(+)
create mode 100644 arch/arm/cpu/armv7/sunxi/pinmux.c
create mode 100644 arch/arm/include/asm/arch-sunxi/gpio.h
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile
b/arch/arm/cpu/armv7/sunxi/Makefile
index 787a127..b3ef8a0 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -9,3 +9,4 @@
#
obj-y += timer.o
obj-y += clock.o
+obj-y += pinmux.o
diff --git a/arch/arm/cpu/armv7/sunxi/pinmux.c
b/arch/arm/cpu/armv7/sunxi/pinmux.c
new file mode 100644
index 000..8f5cbfe
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/pinmux.c
@@ -0,0 +1,80 @@
+/*
+ * (C) Copyright 2007-2011
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * Tom Cubie tangli...@allwinnertech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/gpio.h
+
+int sunxi_gpio_set_cfgpin(u32 pin, u32 val)
+{
+ u32 cfg;
+ u32 bank = GPIO_BANK(pin);
+ u32 index = GPIO_CFG_INDEX(pin);
+ u32 offset = GPIO_CFG_OFFSET(pin);
+ struct sunxi_gpio *pio =
+ ((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)-gpio_bank[bank];
+
+ cfg = readl(pio-cfg[0] + index);
+ cfg = ~(0xf offset);
+ cfg |= val offset;
+
+ writel(cfg, pio-cfg[0] + index);
+
+ return 0;
+}
+
+int sunxi_gpio_get_cfgpin(u32 pin)
+{
+ u32 cfg;
+ u32 bank = GPIO_BANK(pin);
+ u32 index = GPIO_CFG_INDEX(pin);
+ u32 offset = GPIO_CFG_OFFSET(pin);
+ struct sunxi_gpio *pio =
+ ((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)-gpio_bank[bank];
+
+ cfg = readl(pio-cfg[0] + index);
+ cfg = offset;
+
+ return cfg 0xf;
+}
+
+int sunxi_gpio_set_drv(u32 pin, u32 val)
+{
+ u32 drv;
+ u32 bank = GPIO_BANK(pin);
+ u32 index = GPIO_DRV_INDEX(pin);
+ u32 offset = GPIO_DRV_OFFSET(pin);
+ struct sunxi_gpio *pio =
+ ((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)-gpio_bank[bank];
+
+ drv = readl(pio-drv[0] + index);
+ drv = ~(0x3 offset);
+ drv |= val offset;
+
+ writel(drv, pio-drv[0] + index);
+
+ return 0;
+}
+
+int sunxi_gpio_set_pull(u32 pin, u32 val)
+{
+ u32 pull;
+ u32 bank = GPIO_BANK(pin);
+ u32 index = GPIO_PULL_INDEX(pin);
+ u32 offset = GPIO_PULL_OFFSET(pin);
+ struct sunxi_gpio *pio =
+ ((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)-gpio_bank[bank];
+
+ pull = readl(pio-pull[0] + index);
+ pull = ~(0x3 offset);
+ pull |= val offset;
+
+ writel(pull, pio-pull[0] + index);
+
+ return 0;
+}
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
new file mode 100644
index 000..802f347
--- /dev/null
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -0,0 +1,145 @@
+/*
+ * (C) Copyright 2007-2012
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * Tom Cubie tangli...@allwinnertech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _SUNXI_GPIO_H
+#define _SUNXI_GPIO_H
+
+#include linux/types.h
+
+/*
+ * sunxi has 9 banks of gpio, they are:
+ * PA0 - PA17 | PB0 - PB23 | PC0 - PC24
+ * PD0 - PD27 | PE0 - PE31 | PF0 - PF5
+ * PG0 - PG9 | PH0 - PH27 | PI0 - PI12
+ */
+
+#define SUNXI_GPIO_A 0
+#define SUNXI_GPIO_B 1
+#define SUNXI_GPIO_C 2
+#define SUNXI_GPIO_D 3
+#define SUNXI_GPIO_E 4
+#define SUNXI_GPIO_F 5
+#define SUNXI_GPIO_G 6
+#define SUNXI_GPIO_H 7
+#define SUNXI_GPIO_I 8
+
+struct sunxi_gpio {
+ u32 cfg[4];
+ u32 dat;
+ u32 drv[2];
+ u32 pull[2];
+};
+
+/* gpio interrupt control */
+struct sunxi_gpio_int {
+ u32 cfg[3];
+ u32 ctl;
+ u32 sta;
+ u32 deb;/* interrupt debounce */
+};
+
+struct sunxi_gpio_reg {
+ struct sunxi_gpio gpio_bank[9];
+ u8 res[0xbc];
+ struct sunxi_gpio_int gpio_int;
+};
+
+#define
[linux-sunxi] [PATCH v2 0/9] sunxi: initial upstreamining effort
This is my second cut at an upstreamable series based upon the https://github.com/linux-sunxi/u-boot-sunxi.git#sunxi tree. The intention is to present a minimal starting point for upstreaming to which support for other processors, peripherals, boards etc can be added in the future. Therefore this has been stripped right back and currently supports only sun7i processors AKA Allwinner A20 and the cubietruck board. Supported peripherals are UART, MMC and Ethernet. The code here is from u-boot-sunxi.git#sunxi[0] changeset d9aa5dd3d15c sunxi: mmc: checkpatch whitespace fixes with v2014.04-rc2 merged in and applies to u-boot v2014.04-rc2. Global changes in v2: - Use SPDX-License-Identifier - Resync with u-boot-sunxi.git - Lot of updates to the individual patches, see the individual commit messages (checkpatch.pl fixes, magic number removal etc). - Pulled the Ethernet stuff before the MMC and non-FEL boot stuff. The MMC stuff (which non-FEL boot needs) still needs some more cleanup, but the reordering means that the initial part of the series could in principal go in. This series can also be found at: git://gitorious.org/ijc/u-boot.git sunxi-mainlining-v2 The merged sunxi tree which it is based on is: git://gitorious.org/ijc/u-boot.git sunxi-merge-v2014.04-rc2 There is no SMP here, since that relies on the PSCI support from Marc Zyngier which has yet to land in mainline AFAIK. I've tried to give corect credit and S-o-b based upon: git log --pretty='%aN' linux-sunxi/sunxi -- [PATHS] | sort -u git log linux-sunxi/sunxi -- [PATHS] | grep -i signed.off.by | sort -u Manual inspection This will tend to over credit, since it will include folks who contributed code which has since been removed as well as those who contributed code which is not included in this patch set, but I think it is better to be conservative and include too many rather than incorrectly exclude people. Doing better than this would be IMHO too hard to be worth it (e.g. git blame would prefer a recent whitespace cleanup to the actual author of the code and prefer someone did code motion over the original author, so it would be a massive manual process). [0] https://github.com/linux-sunxi/u-boot-sunxi.git -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 9/9] sunxi: non-FEL SPL boot support for sun7i
As well as the following signed-off-by the sunxi branch shows commits to these
files authored by the following:
Henrik Nordstrom
Tom Cubie
Signed-off-by: Stefan Roese s...@denx.de
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in:
- mksunxiboot cleanups
- rebase on Kbuild stuff
v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in ldscripts vs v2014.01.
---
Makefile| 10 +++
arch/arm/cpu/armv7/sunxi/config.mk | 8 ++
arch/arm/cpu/armv7/sunxi/u-boot-spl.lds | 52 +++
boards.cfg | 1 +
include/configs/sunxi-common.h | 26 ++
spl/Makefile| 13 +++
tools/.gitignore| 1 +
tools/Makefile | 2 +
tools/mksunxiboot.README| 13 +++
tools/mksunxiboot.c | 153
10 files changed, 279 insertions(+)
create mode 100644 arch/arm/cpu/armv7/sunxi/config.mk
create mode 100644 arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
create mode 100644 tools/mksunxiboot.README
create mode 100644 tools/mksunxiboot.c
diff --git a/Makefile b/Makefile
index b795338..31ea0ab 100644
--- a/Makefile
+++ b/Makefile
@@ -876,6 +876,13 @@ OBJCOPYFLAGS_u-boot.spr = -I binary -O binary
--pad-to=$(CONFIG_SPL_PAD_TO) \
u-boot.spr: spl/u-boot-spl.img u-boot.img FORCE
$(call if_changed,pad_cat)
+ifneq ($(CONFIG_SUNXI),)
+OBJCOPYFLAGS_u-boot-sunxi-with-spl.bin = -I binary -O binary \
+ --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff
+u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img FORCE
+ $(call if_changed,pad_cat)
+endif
+
ifneq ($(CONFIG_TEGRA),)
OBJCOPYFLAGS_u-boot-nodtb-tegra.bin = -O binary
--pad-to=$(CONFIG_SYS_TEXT_BASE)
u-boot-nodtb-tegra.bin: spl/u-boot-spl u-boot.bin FORCE
@@ -1087,6 +1094,9 @@ spl/u-boot-spl.bin: spl/u-boot-spl
spl/u-boot-spl: tools prepare
$(Q)$(MAKE) obj=spl -f $(srctree)/spl/Makefile all
+spl/sunxi-spl.bin: spl/u-boot-spl
+ @:
+
tpl/u-boot-tpl.bin: tools prepare
$(Q)$(MAKE) obj=tpl -f $(srctree)/spl/Makefile all CONFIG_TPL_BUILD=y
diff --git a/arch/arm/cpu/armv7/sunxi/config.mk
b/arch/arm/cpu/armv7/sunxi/config.mk
new file mode 100644
index 000..00f5ffc
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/config.mk
@@ -0,0 +1,8 @@
+# Build a combined spl + u-boot image
+ifdef CONFIG_SPL
+ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_SPL_FEL
+ALL-y += u-boot-sunxi-with-spl.bin
+endif
+endif
+endif
diff --git a/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
new file mode 100644
index 000..5008028
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2012
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * Tom Cubie tangli...@allwinnertech.com
+ *
+ * Based on omap-common/u-boot-spl.lds:
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, ga...@denx.de
+ *
+ * (C) Copyright 2010
+ * Texas Instruments, www.ti.com
+ * Aneesh V ane...@ti.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
+ LENGTH = CONFIG_SPL_MAX_SIZE }
+MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
+ LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
+
+OUTPUT_FORMAT(elf32-littlearm, elf32-littlearm, elf32-littlearm)
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ .text :
+ {
+ __start = .;
+ arch/arm/cpu/armv7/start.o (.text)
+ *(.text*)
+ } .sram
+
+ . = ALIGN(4);
+ .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } .sram
+
+ . = ALIGN(4);
+ .data : { *(SORT_BY_ALIGNMENT(.data*)) } .sram
+
+ . = ALIGN(4);
+ __image_copy_end = .;
+ _end = .;
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start = .;
+ *(.bss*)
+ . = ALIGN(4);
+ __bss_end = .;
+ } .sdram
+}
diff --git a/boards.cfg b/boards.cfg
index 3134e9e..e8cdfbc 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -366,6 +366,7 @@ Active arm armv7 rmobile renesas
lager
Active arm armv7 s5pc1xx samsung goni
s5p_goni -
Mateusz Zalega m.zal...@samsung.com
Active arm armv7 s5pc1xx samsung smdkc100
smdkc100 -
Minkyu Kang mk7.k
[linux-sunxi] [PATCH v2 4/9] sunxi: initial generic sun7i cpu, board and start of day support
This has been stripped back for mainlining and supports only sun7i. These
changes are not useful by themselves but are split out to make the patch sizes
more manageable.
As well as the following signed-off-by the sunxi branch shows commits to these
files authored by the following:
Almo Nito
Carl van Schaik
FUKAUMI Naoki
hehopmajieh
j
Sergey Lapin
Tom Cubie
Signed-off-by: Aleksei Mamlin mamli...@gmail.com
Signed-off-by: Alexandru Gagniuc mr.nuke...@gmail.com
Signed-off-by: Chen-Yu Tsai w...@csie.org
Signed-off-by: Emilio López emi...@elopez.com.ar
Signed-off-by: Hans de Goede hdego...@redhat.com
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Jens Kuske jensku...@gmail.com
Signed-off-by: Luc Verhaegen l...@skynet.be
Signed-off-by: Luke Leighton l...@lkcl.net
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Patrick Wood patrickhw...@gmail.com
Signed-off-by: Stefan Roese s...@denx.de
Signed-off-by: Wills Wang wills.wang.o...@gmail.com
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in:
- just init dram once
- remove clock ramping until power control is implemented
- add CONFIG_SUN7I to simplify future SUN?I support.
- fix a typo
v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in ldscripts vs v2014.01.
---
arch/arm/cpu/armv7/sunxi/Makefile | 11 +++
arch/arm/cpu/armv7/sunxi/board.c | 88
arch/arm/cpu/armv7/sunxi/cpu_info.c | 19 ++
arch/arm/cpu/armv7/sunxi/start.c | 1 +
arch/arm/include/asm/arch-sunxi/cpu.h | 122 ++
board/sunxi/Makefile | 11 +++
board/sunxi/board.c | 57
7 files changed, 309 insertions(+)
create mode 100644 arch/arm/cpu/armv7/sunxi/board.c
create mode 100644 arch/arm/cpu/armv7/sunxi/cpu_info.c
create mode 100644 arch/arm/cpu/armv7/sunxi/start.c
create mode 100644 arch/arm/include/asm/arch-sunxi/cpu.h
create mode 100644 board/sunxi/Makefile
create mode 100644 board/sunxi/board.c
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile
b/arch/arm/cpu/armv7/sunxi/Makefile
index 3485404..d85b647 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -9,5 +9,16 @@
#
obj-y += timer.o
obj-y += dram.o
+obj-y += board.o
obj-y += clock.o
obj-y += pinmux.o
+
+ifndef CONFIG_SPL_BUILD
+obj-y += cpu_info.o
+endif
+
+ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_SPL_FEL
+obj-y += start.o
+endif
+endif
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
new file mode 100644
index 000..4a29b4b
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -0,0 +1,88 @@
+/*
+ * (C) Copyright 2012 Henrik Nordstrom hen...@henriknordstrom.net
+ *
+ * (C) Copyright 2007-2011
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * Tom Cubie tangli...@allwinnertech.com
+ *
+ * Some init for sunxi platform.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include serial.h
+#ifdef CONFIG_SPL_BUILD
+#include spl.h
+#endif
+#include asm/gpio.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/gpio.h
+#include asm/arch/sys_proto.h
+#include asm/arch/timer.h
+
+#ifdef CONFIG_SPL_BUILD
+/* Pointer to the global data structure for SPL */
+DECLARE_GLOBAL_DATA_PTR;
+
+/* The sunxi internal brom will try to loader external bootloader
+ * from mmc0, nand flash, mmc2.
+ * Unfortunately we can't check how SPL was loaded so assume
+ * it's always the first SD/MMC controller
+ */
+u32 spl_boot_device(void)
+{
+ return BOOT_DEVICE_MMC1;
+}
+
+/* No confirmation data available in SPL yet. Hardcode bootmode */
+u32 spl_boot_mode(void)
+{
+ return MMCSD_MODE_RAW;
+}
+#endif
+
+int gpio_init(void)
+{
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUN4I_GPB22_UART0_TX);
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUN4I_GPB23_UART0_RX);
+ sunxi_gpio_set_pull(SUNXI_GPB(23), 1);
+
+ return 0;
+}
+
+void reset_cpu(ulong addr)
+{
+}
+
+/* do some early init */
+void s_init(void)
+{
+#if !defined CONFIG_SPL_BUILD defined CONFIG_SUN7I
+ /* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */
+ asm volatile(
+ mrc p15, 0, r0, c1, c0, 1\n
+ orr r0, r0, #0x40\n
+ mcr p15, 0, r0, c1, c0, 1\n);
+#endif
+
+ clock_init();
+ timer_init();
+ gpio_init();
+
+#ifdef CONFIG_SPL_BUILD
+ gd = gdata;
+ preloader_console_init();
+
+ sunxi_board_init();
+#endif
+}
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+#endif
diff --git a/arch/arm/cpu/armv7/sunxi/cpu_info.c
b/arch/arm/cpu/armv7/sunxi/cpu_info.c
new file mode 100644
index 000..b4c3d5c
--- /dev/null
+++ b
[linux-sunxi] [PATCH v2 1/9] sunxi: initial sun7i clocks and timer support.
This has been stripped back for mainlining and supports only sun7i. These
changes are not useful by themselves but are split out to make the patch sizes
more manageable.
As well as the following signed-off-by the sunxi branch shows commits to these
files authored by the following:
Alejandro Mery
Carl van Schaik
Stefan Roese
Tom Cubie
yemao
Signed-off-by: Alexandru Gagniuc mr.nuke...@gmail.com
Signed-off-by: Chen-Yu Tsai w...@csie.org
Signed-off-by: Emilio López emi...@elopez.com.ar
Signed-off-by: Hans de Goede hdego...@redhat.com
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Jens Kuske jensku...@gmail.com
Signed-off-by: Luke Leighton l...@lkcl.net
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in:
- define magic numbers
- simplify get_tbclk
- correct clock_set_pll1 prototype
- add CONFIG_SUN7I to simplify future SUN?I support.
- defines for MMC AHB clocks
v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in ldscripts vs v2014.01.
---
arch/arm/cpu/armv7/sunxi/Makefile | 11 ++
arch/arm/cpu/armv7/sunxi/clock.c| 180 +
arch/arm/cpu/armv7/sunxi/timer.c| 102
arch/arm/include/asm/arch-sunxi/clock.h | 237
arch/arm/include/asm/arch-sunxi/sys_proto.h | 17 ++
arch/arm/include/asm/arch-sunxi/timer.h | 88 +++
6 files changed, 635 insertions(+)
create mode 100644 arch/arm/cpu/armv7/sunxi/Makefile
create mode 100644 arch/arm/cpu/armv7/sunxi/clock.c
create mode 100644 arch/arm/cpu/armv7/sunxi/timer.c
create mode 100644 arch/arm/include/asm/arch-sunxi/clock.h
create mode 100644 arch/arm/include/asm/arch-sunxi/sys_proto.h
create mode 100644 arch/arm/include/asm/arch-sunxi/timer.h
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile
b/arch/arm/cpu/armv7/sunxi/Makefile
new file mode 100644
index 000..787a127
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -0,0 +1,11 @@
+#
+# (C) Copyright 2012 Henrik Nordstrom hen...@henriknordstrom.net
+#
+# Based on some other Makefile
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+obj-y += timer.o
+obj-y += clock.o
diff --git a/arch/arm/cpu/armv7/sunxi/clock.c b/arch/arm/cpu/armv7/sunxi/clock.c
new file mode 100644
index 000..dd01be6
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/clock.c
@@ -0,0 +1,180 @@
+/*
+ * (C) Copyright 2007-2012
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * Tom Cubie tangli...@allwinnertech.com
+ *
+ * (C) Copyright 2013 Luke Kenneth Casson Leighton l...@lkcl.net
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/gpio.h
+#include asm/arch/sys_proto.h
+
+#ifdef CONFIG_SPL_BUILD
+static void clock_init_safe(void)
+{
+ struct sunxi_ccm_reg * const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ /* Set safe defaults until PMU is configured */
+ writel(AXI_DIV_1 AXI_DIV_SHIFT |
+ AHB_DIV_2 AHB_DIV_SHIFT |
+ APB0_DIV_1 APB0_DIV_SHIFT |
+ CPU_CLK_SRC_OSC24M CPU_CLK_SRC_SHIFT,
+ ccm-cpu_ahb_apb0_cfg);
+ writel(PLL1_CFG_DEFAULT, ccm-pll1_cfg);
+ sdelay(200);
+ writel(AXI_DIV_1 AXI_DIV_SHIFT |
+ AHB_DIV_2 AHB_DIV_SHIFT |
+ APB0_DIV_1 APB0_DIV_SHIFT |
+ CPU_CLK_SRC_PLL1 CPU_CLK_SRC_SHIFT,
+ ccm-cpu_ahb_apb0_cfg);
+#ifdef CONFIG_SUN7I
+ writel(0x1 AHB_GATE_OFFSET_DMA | readl(ccm-ahb_gate0),
+ ccm-ahb_gate0);
+ writel(0x1 PLL6_ENABLE_OFFSET | readl(ccm-pll6_cfg),
+ ccm-pll6_cfg);
+#endif
+}
+#endif
+
+int clock_init(void)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+#ifdef CONFIG_SPL_BUILD
+ clock_init_safe();
+#endif
+
+ /* uart clock source is apb1 */
+ sr32(ccm-apb1_clk_div_cfg, 24, 2, APB1_CLK_SRC_OSC24M);
+ sr32(ccm-apb1_clk_div_cfg, 16, 2, APB1_FACTOR_N);
+ sr32(ccm-apb1_clk_div_cfg, 0, 5, APB1_FACTOR_M);
+
+ /* open the clock for uart */
+ sr32(ccm-apb1_gate, 16 + CONFIG_CONS_INDEX - 1, 1, CLK_GATE_OPEN);
+
+ return 0;
+}
+
+/* Return PLL5 frequency in Hz
+ * Note: Assumes PLL5 reference is 24MHz clock
+ */
+unsigned int clock_get_pll5(void)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ uint32_t rval = readl(ccm-pll5_cfg);
+ int n = (rval 8) 0x1f;
+ int k = ((rval 4) 3) + 1;
+ int p = 1 ((rval 16) 3);
+ return 2400 * n * k / p;
+}
+
+int clock_twi_onoff(int port, int state
[linux-sunxi] [PATCH v2 8/9] sunxi: mmc support
As well as the following signed-off-by the sunxi branch shows commits to these
files authored by the following:
Stefan Roese
Tom Cubie
yemao
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Luke Leighton l...@lkcl.net
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Wills Wang wills.wang.o...@gmail.com
Signed-off-by: Ian Campbell i...@hellion.org.uk
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
---
Pantelis, most of your review comments have been addressed but not all, in
particular the timeout loops aren't sorted yet, but I wanted to get the rest of
the series reposted.
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in:
- use proper gpio interfaces, removing awkward casts and some magic numbers.
- remove magic numbers
- other cleanups
v1: Based on linux-sunxi#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in ldscripts vs v2014.01.
---
arch/arm/include/asm/arch-sunxi/mmc.h | 124 +++
board/sunxi/board.c | 13 +
drivers/mmc/Makefile | 1 +
drivers/mmc/sunxi_mmc.c | 625 ++
include/configs/sunxi-common.h| 11 +
5 files changed, 774 insertions(+)
create mode 100644 arch/arm/include/asm/arch-sunxi/mmc.h
create mode 100644 drivers/mmc/sunxi_mmc.c
diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h
b/arch/arm/include/asm/arch-sunxi/mmc.h
new file mode 100644
index 000..97b14c3
--- /dev/null
+++ b/arch/arm/include/asm/arch-sunxi/mmc.h
@@ -0,0 +1,124 @@
+/*
+ * (C) Copyright 2007-2011
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * Aaron leafy.m...@allwinnertech.com
+ *
+ * MMC register definition for allwinner sunxi platform.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _SUNXI_MMC_H
+#define _SUNXI_MMC_H
+
+#include linux/types.h
+
+struct sunxi_mmc {
+ u32 gctrl; /* (0x00) SMC Global Control Register */
+ u32 clkcr; /* (0x04) SMC Clock Control Register */
+ u32 timeout;/* (0x08) SMC Time Out Register */
+ u32 width; /* (0x0c) SMC Bus Width Register */
+ u32 blksz; /* (0x10) SMC Block Size Register */
+ u32 bytecnt;/* (0x14) SMC Byte Count Register */
+ u32 cmd;/* (0x18) SMC Command Register */
+ u32 arg;/* (0x1c) SMC Argument Register */
+ u32 resp0; /* (0x20) SMC Response Register 0 */
+ u32 resp1; /* (0x24) SMC Response Register 1 */
+ u32 resp2; /* (0x28) SMC Response Register 2 */
+ u32 resp3; /* (0x2c) SMC Response Register 3 */
+ u32 imask; /* (0x30) SMC Interrupt Mask Register */
+ u32 mint; /* (0x34) SMC Masked Interrupt Status Reg */
+ u32 rint; /* (0x38) SMC Raw Interrupt Status Register */
+ u32 status; /* (0x3c) SMC Status Register */
+ u32 ftrglevel; /* (0x40) SMC FIFO Threshold Watermark Reg */
+ u32 funcsel;/* (0x44) SMC Function Select Register */
+ u32 cbcr; /* (0x48) SMC CIU Byte Count Register */
+ u32 bbcr; /* (0x4c) SMC BIU Byte Count Register */
+ u32 dbgc; /* (0x50) SMC Debug Enable Register */
+ u32 res0[11]; /* (0x54~0x7c) */
+ u32 dmac; /* (0x80) SMC IDMAC Control Register */
+ u32 dlba; /* (0x84) SMC IDMAC Descr List Base Addr Reg */
+ u32 idst; /* (0x88) SMC IDMAC Status Register */
+ u32 idie; /* (0x8c) SMC IDMAC Interrupt Enable Register */
+ u32 chda; /* (0x90) */
+ u32 cbda; /* (0x94) */
+ u32 res1[26]; /* (0x98~0xff) */
+ u32 fifo; /* (0x100) SMC FIFO Access Address */
+};
+
+#define SUNXI_MMC_CLK_POWERSAVE(0x1 17)
+#define SUNXI_MMC_CLK_ENABLE (0x1 16)
+#define SUNXI_MMC_CLK_DIVIDER_MASK (0xff)
+
+#define SUNXI_MMC_GCTRL_SOFT_RESET (0x1 0)
+#define SUNXI_MMC_GCTRL_FIFO_RESET (0x1 1)
+#define SUNXI_MMC_GCTRL_DMA_RESET (0x1 2)
+#define SUNXI_MMC_GCTRL_RESET (SUNXI_MMC_GCTRL_SOFT_RESET|\
+SUNXI_MMC_GCTRL_FIFO_RESET|\
+SUNXI_MMC_GCTRL_DMA_RESET)
+#define SUNXI_MMC_GCTRL_DMA_ENABLE (0x1 5)
+#define SUNXI_MMC_GCTRL_ACCESS_BY_AHB (0x1 31)
+
+#define SUNXI_MMC_CMD_RESP_EXPIRE (0x1 6)
+#define SUNXI_MMC_CMD_LONG_RESPONSE(0x1 7)
+#define SUNXI_MMC_CMD_CHK_RESPONSE_CRC (0x1 8)
+#define SUNXI_MMC_CMD_DATA_EXPIRE (0x1 9)
+#define SUNXI_MMC_CMD_WRITE(0x1 10)
+#define SUNXI_MMC_CMD_AUTO_STOP(0x1 12)
+#define SUNXI_MMC_CMD_WAIT_PRE_OVER(0x1 13)
+#define
[linux-sunxi] [PATCH v2 5/9] sunxi: generic sun7i build infrastructure.
This has been stripped back for mainlining and supports only sun7i booting via
FEL mode. These changes are not useful by themselves but are split out to make
the patch sizes more manageable.
As well as the following signed-off-by the sunxi branch shows commits to these
files authored by the following:
Almo Nito
Carl van Schaik
FUKAUMI Naoki
hehopmajieh
j
Sergey Lapin
Tom Cubie
Signed-off-by: Adam Sampson a...@offog.org
Signed-off-by: Aleksei Mamlin mamli...@gmail.com
Signed-off-by: Chen-Yu Tsai w...@csie.org
Signed-off-by: Emilio López emi...@elopez.com.ar
Signed-off-by: Hans de Goede hdego...@redhat.com
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Jens Kuske jensku...@gmail.com
Signed-off-by: Luc Verhaegen l...@skynet.be
Signed-off-by: Luke Leighton l...@lkcl.net
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Patrick Wood patrickhw...@gmail.com
Signed-off-by: Stefan Roese s...@denx.de
Signed-off-by: Wills Wang wills.wang.o...@gmail.com
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in:
- sunxi-common.h updates, including pulling some command additions back
from the non-FEL patch and switchin to bootm_size not BOOTMAPSZ
v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in ldscripts vs v2014.01.
---
arch/arm/cpu/armv7/Makefile | 2 +-
arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds | 59 +++
arch/arm/include/asm/arch-sunxi/spl.h | 20
board/sunxi/Makefile| 1 +
include/configs/sun7i.h | 24 +
include/configs/sunxi-common.h | 153
6 files changed, 258 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds
create mode 100644 arch/arm/include/asm/arch-sunxi/spl.h
create mode 100644 include/configs/sun7i.h
create mode 100644 include/configs/sunxi-common.h
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 119ebb3..ddf00f3 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -12,7 +12,7 @@ obj-y += cache_v7.o
obj-y += cpu.o
obj-y += syslib.o
-ifneq
($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY),)
+ifneq
($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI),)
ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
obj-y += lowlevel_init.o
endif
diff --git a/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds
b/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds
new file mode 100644
index 000..cf02300
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds
@@ -0,0 +1,59 @@
+OUTPUT_FORMAT(elf32-littlearm, elf32-littlearm, elf32-littlearm)
+OUTPUT_ARCH(arm)
+ENTRY(s_init)
+SECTIONS
+{
+ . = 0x2000;
+ . = ALIGN(4);
+ .text :
+ {
+ *(.text.s_init)
+ *(.text*)
+ }
+ . = ALIGN(4);
+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
+ . = ALIGN(4);
+ .data : {
+ *(.data*)
+ }
+ . = ALIGN(4);
+ . = .;
+ . = ALIGN(4);
+ .rel.dyn : {
+ __rel_dyn_start = .;
+ *(.rel*)
+ __rel_dyn_end = .;
+ }
+ .dynsym : {
+ __dynsym_start = .;
+ *(.dynsym)
+ }
+ . = ALIGN(4);
+ .note.gnu.build-id :
+ {
+ *(.note.gnu.build-id)
+ }
+ _end = .;
+ . = ALIGN(4096);
+ .mmutable : {
+ *(.mmutable)
+ }
+ .bss_start __rel_dyn_start (OVERLAY) : {
+ KEEP(*(.__bss_start));
+ __bss_base = .;
+ }
+ .bss __bss_base (OVERLAY) : {
+ *(.bss*)
+ . = ALIGN(4);
+ __bss_limit = .;
+ }
+ .bss_end __bss_limit (OVERLAY) : {
+ KEEP(*(.__bss_end));
+ }
+ /DISCARD/ : { *(.dynstr*) }
+ /DISCARD/ : { *(.dynamic*) }
+ /DISCARD/ : { *(.plt*) }
+ /DISCARD/ : { *(.interp*) }
+ /DISCARD/ : { *(.gnu*) }
+ /DISCARD/ : { *(.note*) }
+}
diff --git a/arch/arm/include/asm/arch-sunxi/spl.h
b/arch/arm/include/asm/arch-sunxi/spl.h
new file mode 100644
index 000..ff871bc
--- /dev/null
+++ b/arch/arm/include/asm/arch-sunxi/spl.h
@@ -0,0 +1,20 @@
+/*
+ * This is a copy of omap3/spl.h:
+ *
+ * (C) Copyright 2012
+ * Texas Instruments, www.ti.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#ifndef_ASM_ARCH_SPL_H_
+#define_ASM_SPL_H_
+
+#define BOOT_DEVICE_NONE 0
+#define BOOT_DEVICE_XIP1
+#define BOOT_DEVICE_NAND 2
+#define BOOT_DEVICE_ONE_NAND 3
+#define BOOT_DEVICE_MMC2 5 /*emmc*/
+#define BOOT_DEVICE_MMC1 6
+#define BOOT_DEVICE_XIPWAIT7
+#define BOOT_DEVICE_MMC2_2 0xff
+#endif
diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile
index 559112e..6483bf4 100644
--- a/board/sunxi/Makefile
+++ b/board/sunxi/Makefile
@@ -9,3 +9,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += board.o
+obj-y += dram_cubietruck.o
diff --git a/include/configs/sun7i.h b
[linux-sunxi] [PATCH v2 3/9] sunxi: initial sun7i dram setup support
This has been stripped back for mainlining and supports only sun7i. These
changes are not useful by themselves but are split out to make the patch sizes
more manageable.
As well as the following signed-off-by the sunxi branch shows commits to these
files authored by the following:
Alejandro Mery
Carl van Schaik
Tom Cubie
Signed-off-by: Alexandru Gagniuc mr.nuke...@gmail.com
Signed-off-by: Emilio López emi...@elopez.com.ar
Signed-off-by: Hans de Goede hdego...@redhat.com
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Luke Leighton l...@lkcl.net
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Stefan Roese s...@denx.de
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in:
- remove redundant braces in mctl_ddr3_reset
- remove incorrect call to mctl_ddr3_reset.
- add CONFIG_SUN7I to simplify future SUN?I support.
- add a comment about the magic numbers from the a/w code dumps
- fix a bunch of checkpatch.pl issues
v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in ldscripts vs v2014.01.
---
arch/arm/cpu/armv7/sunxi/Makefile | 1 +
arch/arm/cpu/armv7/sunxi/dram.c| 548 +
arch/arm/include/asm/arch-sunxi/dram.h | 175 +++
3 files changed, 724 insertions(+)
create mode 100644 arch/arm/cpu/armv7/sunxi/dram.c
create mode 100644 arch/arm/include/asm/arch-sunxi/dram.h
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile
b/arch/arm/cpu/armv7/sunxi/Makefile
index b3ef8a0..3485404 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -8,5 +8,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += timer.o
+obj-y += dram.o
obj-y += clock.o
obj-y += pinmux.o
diff --git a/arch/arm/cpu/armv7/sunxi/dram.c b/arch/arm/cpu/armv7/sunxi/dram.c
new file mode 100644
index 000..f03734d
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/dram.c
@@ -0,0 +1,548 @@
+/*
+ * sunxi DRAM controller initialization
+ * (C) Copyright 2012 Henrik Nordstrom hen...@henriknordstrom.net
+ * (C) Copyright 2013 Luke Kenneth Casson Leighton l...@lkcl.net
+ *
+ * Based on sun4i Linux kernel sources mach-sunxi/pm/standby/dram*.c
+ * and earlier U-Boot Allwiner A10 SPL work
+ *
+ * (C) Copyright 2007-2012
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * Berg Xing bergx...@allwinnertech.com
+ * Tom Cubie tangli...@allwinnertech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/*
+ * Unfortunately the only documentation we have on the sun7i DRAM
+ * controller is Allwinner boot0 + boot1 code, and that code uses
+ * magic numbers shifts with no explanations. Hence this code is
+ * rather undocumented and full of magic.
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/dram.h
+#include asm/arch/timer.h
+#include asm/arch/sys_proto.h
+
+#define CPU_CFG_CHIP_VER(n) ((n) 6)
+#define CPU_CFG_CHIP_VER_MASK CPU_CFG_CHIP_VER(0x3)
+#define CPU_CFG_CHIP_REV_A 0x0
+#define CPU_CFG_CHIP_REV_C1 0x1
+#define CPU_CFG_CHIP_REV_C2 0x2
+#define CPU_CFG_CHIP_REV_B 0x3
+
+static void mctl_ddr3_reset(void)
+{
+ struct sunxi_dram_reg *dram =
+ (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE;
+
+ clrbits_le32(dram-mcr, DRAM_MCR_RESET);
+ udelay(2);
+ setbits_le32(dram-mcr, DRAM_MCR_RESET);
+}
+
+static void mctl_set_drive(void)
+{
+ struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE;
+
+ clrsetbits_le32(dram-mcr, DRAM_MCR_MODE_NORM(0x3) | (0x3 28),
+ DRAM_MCR_MODE_EN(0x3) |
+ 0xffc);
+}
+
+static void mctl_itm_disable(void)
+{
+ struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE;
+
+ clrsetbits_le32(dram-ccr, DRAM_CCR_INIT, DRAM_CCR_ITM_OFF);
+}
+
+static void mctl_itm_enable(void)
+{
+ struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE;
+
+ clrbits_le32(dram-ccr, DRAM_CCR_ITM_OFF);
+}
+
+static void mctl_enable_dll0(u32 phase)
+{
+ struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE;
+
+ clrsetbits_le32(dram-dllcr[0], 0x3f 6,
+ ((phase 16) 0x3f) 6);
+ clrsetbits_le32(dram-dllcr[0], DRAM_DLLCR_NRESET, DRAM_DLLCR_DISABLE);
+ udelay(2);
+
+ clrbits_le32(dram-dllcr[0], DRAM_DLLCR_NRESET | DRAM_DLLCR_DISABLE);
+ udelay(22);
+
+ clrsetbits_le32(dram-dllcr[0], DRAM_DLLCR_DISABLE, DRAM_DLLCR_NRESET);
+ udelay(22);
+}
+
+/*
+ * Note: This differs from pm/standby in that it checks the bus width
+ */
+static void mctl_enable_dllx(u32 phase)
+{
+ struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE;
+ u32 i, n, bus_width;
+
+ bus_width = readl(dram-dcr);
+
+ if ((bus_width DRAM_DCR_BUS_WIDTH_MASK
Re: [linux-sunxi] [PATCH u-boot-sunxi.git] sunxi: dram: checkpatch.pl cleanups
On Fri, 2014-03-21 at 17:11 +0100, Hans de Goede wrote: Hi, On 03/21/2014 04:45 PM, Ian Campbell wrote: On Fri, 2014-03-21 at 16:14 +0100, Hans de Goede wrote: Hi, On 03/20/2014 10:37 PM, Ian Campbell wrote: Mainly whitespace. The main construct which it complains about is: while(POKE THE HARDWARE); which obscures the potentially infinite loop, I've rewritten as: while(POKE THE HARDWARE) ; Signed-off-by: Ian Campbell i...@hellion.org.uk Thanks, added to u-boot-sunxi.git sunxi branch. Thanks, N times over (I lost count of the number of patches). I was planning to resync my mainlining tree this evening so this is very timely. Ok, so as promised I've already done a sync and here I've 2 branches for you at: https://github.com/jwrdegoede/u-boot-sunxi/ The first branch is: sunxi-v2014.04, this is u-boot-sunxi.git sunxi branch with v2014.04-rc2 merged in, essentially this is your sunxi-mainlining-cleanups with all the recent cleanups wens and you did added on top. You've reapplied all the cleanups to the existing merge, which is going to cause confusion when we come to merge this back into u-boot-sunxi.git. I redid the merge on top of the latest clean ups and pushed it to: git://gitorious.org/ijc/u-boot.git sunxi-merge-v2014.04-rc2 That one is suitable for merging back into u-boot-sunxi.git. This is what I've used as a start for getting a cleaned up version of your v1 on top of v2014.04-rc2. So the 2nd branch I've for you is: v2014.04-sunxi which is v2014.04-rc2 with sunxi support added on top. This contains your v1, with all the cleanups you did, and all the fixups I did merged in. So basically a v2 ready to submit upstream :) Note that your gmac patch is missing as I dropped that initially and I've not re-added it yet, so I guess you may want to re-add that before posting a v2 to the list. That's right, you also picked up a spurious change to dram.c (get_ram_size change). Otherwise it looked good. I hope this is useful for you. It was a useful sanity check, thanks. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH u-boot-sunxi.git] sunxi: setup environment so initrd and fdt are relocated to safe addresses
Instead of setting CONFIG_SYS_BOOTMAPSZ instead set bootm_size to 512M in the default environment. This causes boot_start_lmb to use addresses which are covered by the kernels lowmem mapping, which is required by the boot protocol. This should mean that workarounds such as fdt_high= and initrd_high= are no longer required. Signed-off-by: Ian Campbell i...@hellion.org.uk Cc: Tom Rini tr...@ti.com --- include/configs/sunxi-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index efa77f2..2757145 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -102,7 +102,6 @@ /* Flat Device Tree (FDT/DT) support */ #define CONFIG_OF_LIBFDT -#define CONFIG_SYS_BOOTMAPSZ (256 20) /* * Miscellaneous configurable options @@ -170,6 +169,7 @@ #endif #define CONFIG_EXTRA_ENV_SETTINGS \ + bootm_size=0x2000\0 \ console=ttyS0,115200\0 \ panicarg=panic=10\0 \ extraargs=\0 \ -- 1.8.5.3 -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH u-boot-sunxi.git 0/9] sunxi: mmc: removal of magic numbers
The following patches remove the majority of the magic numbers from the mmc driver, as part of the preparation for upstreaming. The names/meanings of the various bits are partially inferred from existing comments and partially from the Linux driver. Also a little refactoring and checkpatch cleanups. Most of the patches have been confirmed with objdump to make no difference the resulting drivers/mmc/sunxi_mmc.o. I've also tested on cubietruck. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH u-boot-sunxi.git 1/9] sunxi: mmc: add braces to remove ambiguity
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
Cleanup due to upstream review.
---
drivers/mmc/sunxi_mmc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 80e4369..b6f2f96 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -279,11 +279,12 @@ static void mmc_set_ios(struct mmc *mmc)
/* Change clock first */
clkdiv = (mmchost-mod_clk + (mmc-clock 1)) / mmc-clock / 2;
- if (mmc-clock)
+ if (mmc-clock) {
if (mmc_config_clock(mmc, clkdiv)) {
mmchost-fatal_err = 1;
return;
}
+ }
/* Change bus width */
if (mmc-bus_width == 8)
--
1.8.5.3
--
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linux-sunxi group.
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to linux-sunxi+unsubscr...@googlegroups.com.
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[linux-sunxi] [PATCH u-boot-sunxi.git 3/9] sunxi: mmc: defines for clock bits
Objdump confirms no difference in the resulting binary.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/include/asm/arch-sunxi/clock.h | 7 +++
drivers/mmc/sunxi_mmc.c | 5 +++--
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/clock.h
b/arch/arm/include/asm/arch-sunxi/clock.h
index b6184dc..ef03d5b 100644
--- a/arch/arm/include/asm/arch-sunxi/clock.h
+++ b/arch/arm/include/asm/arch-sunxi/clock.h
@@ -161,6 +161,7 @@ struct sunxi_ccm_reg {
#define AHB_GATE_OFFSET_MMC2 10
#define AHB_GATE_OFFSET_MMC1 9
#define AHB_GATE_OFFSET_MMC0 8
+#define AHB_GATE_OFFSET_MMC(n) (AHB_GATE_OFFSET_MMC0 + (n))
#define AHB_GATE_OFFSET_BIST 7
#define AHB_GATE_OFFSET_DMA6
#define AHB_GATE_OFFSET_SS 5
@@ -222,6 +223,12 @@ struct sunxi_ccm_reg {
#define CCM_MBUS_CTRL_CLK_SRC_PLL5 0x2
#define CCM_MBUS_CTRL_GATE (0x1 31)
+#define CCM_MMC_CTRL_OSCM24 (0x0 24)
+#define CCM_MMC_CTRL_PLL6 (0x1 24)
+#define CCM_MMC_CTRL_PLL5 (0x2 24)
+
+#define CCM_MMC_CTRL_ENABLE (0x1 31)
+
#define CCM_GMAC_CTRL_TX_CLK_SRC_MII 0x0
#define CCM_GMAC_CTRL_TX_CLK_SRC_EXT_RGMII 0x1
#define CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII 0x2
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index c336c70..73b891d 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -200,7 +200,7 @@ static int mmc_clk_io_on(int sdc_no)
/* config ahb clock */
rval = readl(ccm-ahb_gate0);
- rval |= (1 (8 + sdc_no));
+ rval |= 1 AHB_GATE_OFFSET_MMC(sdc_no);
writel(rval, ccm-ahb_gate0);
/* config mod clock */
@@ -209,7 +209,8 @@ static int mmc_clk_io_on(int sdc_no)
divider = 4;
else
divider = 3;
- writel((0x1 31) | (0x2 24) | divider, mmchost-mclkreg);
+ writel(CCM_MMC_CTRL_ENABLE | CCM_MMC_CTRL_PLL5 | divider,
+ mmchost-mclkreg);
mmchost-mod_clk = pll5_clk / (divider + 1);
dumphex32(ccmu, (char *)SUNXI_CCM_BASE, 0x100);
--
1.8.5.3
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[linux-sunxi] [PATCH u-boot-sunxi.git 2/9] sunxi: mmc: defines for various mmc control bits
Mostly derived from existing comments. There are plenty of undefined bits still
though.
Objdump confirms that the resulting binary is identical.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/include/asm/arch-sunxi/mmc.h | 19 ++
drivers/mmc/sunxi_mmc.c | 49 ---
2 files changed, 36 insertions(+), 32 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h
b/arch/arm/include/asm/arch-sunxi/mmc.h
index 354103d..5690c2c 100644
--- a/arch/arm/include/asm/arch-sunxi/mmc.h
+++ b/arch/arm/include/asm/arch-sunxi/mmc.h
@@ -46,5 +46,24 @@ struct sunxi_mmc {
u32 fifo; /* (0x100) SMC FIFO Access Address */
};
+#define SUNXI_MMC_CLK_POWERSAVE(0x1 17)
+#define SUNXI_MMC_CLK_ENABLE (0x1 16)
+#define SUNXI_MMC_CLK_DIVIDER_MASK (0xff)
+
+#define SUNXI_MMC_GCTRL_SOFT_RESET (0x1 0)
+#define SUNXI_MMC_GCTRL_FIFO_RESET (0x1 1)
+#define SUNXI_MMC_GCTRL_DMA_RESET (0x1 2)
+#define SUNXI_MMC_GCTRL_RESET (SUNXI_MMC_GCTRL_SOFT_RESET|\
+SUNXI_MMC_GCTRL_FIFO_RESET|\
+SUNXI_MMC_GCTRL_DMA_RESET)
+#define SUNXI_MMC_GCTRL_DMA_ENABLE (0x1 5)
+
+#define SUNXI_MMC_IDMAC_RESET (0x1 0)
+#define SUNXI_MMC_IDMAC_FIXBURST (0x1 1)
+#define SUNXI_MMC_IDMAC_ENABLE (0x1 7)
+
+#define SUNXI_MMC_IDIE_TXIRQ (0x1 0)
+#define SUNXI_MMC_IDIE_RXIRQ (0x1 1)
+
int sunxi_mmc_init(int sdc_no);
#endif /* _SUNXI_MMC_H */
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index b6f2f96..c336c70 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -242,25 +242,20 @@ static int mmc_config_clock(struct mmc *mmc, unsigned div)
struct sunxi_mmc_host *mmchost = (struct sunxi_mmc_host *)mmc-priv;
unsigned rval = readl(mmchost-reg-clkcr);
- /*
-* CLKCREG[7:0]: divider
-* CLKCREG[16]: on/off
-* CLKCREG[17]: power save
-*/
/* Disable Clock */
- rval = ~(0x1 16);
+ rval = ~SUNXI_MMC_CLK_ENABLE;
writel(rval, mmchost-reg-clkcr);
if (mmc_update_clk(mmc))
return -1;
/* Change Divider Factor */
- rval = ~(0xff);
+ rval = ~SUNXI_MMC_CLK_DIVIDER_MASK;
rval |= div;
writel(rval, mmchost-reg-clkcr);
if (mmc_update_clk(mmc))
return -1;
/* Re-enable Clock */
- rval |= (0x1 16);
+ rval |= SUNXI_MMC_CLK_ENABLE;
writel(rval, mmchost-reg-clkcr);
if (mmc_update_clk(mmc))
@@ -300,7 +295,7 @@ static int mmc_core_init(struct mmc *mmc)
struct sunxi_mmc_host *mmchost = (struct sunxi_mmc_host *)mmc-priv;
/* Reset controller */
- writel(0x7, mmchost-reg-gctrl);
+ writel(SUNXI_MMC_GCTRL_RESET, mmchost-reg-gctrl);
return 0;
}
@@ -397,32 +392,21 @@ static int mmc_trans_data_by_dma(struct mmc *mmc, struct
mmc_data *data)
flush_cache((unsigned long)pdes,
sizeof(struct sunxi_mmc_des) * (des_idx + 1));
- /*
-* GCTRLREG
-* GCTRL[2] : DMA reset
-* GCTRL[5] : DMA enable
-*
-* IDMACREG
-* IDMAC[0] : IDMA soft reset
-* IDMAC[1] : IDMA fix burst flag
-* IDMAC[7] : IDMA on
-*
-* IDIECREG
-* IDIE[0] : IDMA transmit interrupt flag
-* IDIE[1] : IDMA receive interrupt flag
-*/
rval = readl(mmchost-reg-gctrl);
/* Enable DMA */
- writel(rval | (0x1 5) | (0x1 2), mmchost-reg-gctrl);
+ writel(rval | SUNXI_MMC_GCTRL_DMA_RESET | SUNXI_MMC_GCTRL_DMA_ENABLE,
+ mmchost-reg-gctrl);
/* Reset iDMA */
- writel((0x1 0), mmchost-reg-dmac);
+ writel(SUNXI_MMC_IDMAC_RESET, mmchost-reg-dmac);
/* Enable iDMA */
- writel((0x1 1) | (1 7), mmchost-reg-dmac);
- rval = readl(mmchost-reg-idie) (~3);
+ writel(SUNXI_MMC_IDMAC_FIXBURST | SUNXI_MMC_IDMAC_ENABLE,
+ mmchost-reg-dmac);
+ rval = readl(mmchost-reg-idie)
+ ~(SUNXI_MMC_IDIE_TXIRQ|SUNXI_MMC_IDIE_RXIRQ);
if (data-flags MMC_DATA_WRITE)
- rval |= (0x1 0);
+ rval |= SUNXI_MMC_IDIE_TXIRQ;
else
- rval |= (0x1 1);
+ rval |= SUNXI_MMC_IDIE_RXIRQ;
writel(rval, mmchost-reg-idie);
writel((u32) pdes, mmchost-reg-dlba);
writel((0x2 28) | (0x7 16) | (0x01 3),
@@ -598,15 +582,16 @@ out:
writel(status, mmchost-reg-idst);
writel(0, mmchost-reg-idie);
writel(0, mmchost-reg-dmac);
- writel(readl(mmchost-reg-gctrl) ~(0x1 5),
+ writel(readl(mmchost-reg-gctrl)
~SUNXI_MMC_GCTRL_DMA_ENABLE,
mmchost-reg-gctrl);
}
if (error 0
[linux-sunxi] [PATCH u-boot-sunxi.git 4/9] sunxi: mmc: defines for mmc ctrl and cmd registers
Inferred from Linux driver.
Objdump confirms no change to the resulting binary.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/include/asm/arch-sunxi/mmc.h | 11 ++
drivers/mmc/sunxi_mmc.c | 39 ---
2 files changed, 24 insertions(+), 26 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h
b/arch/arm/include/asm/arch-sunxi/mmc.h
index 5690c2c..1c19f85 100644
--- a/arch/arm/include/asm/arch-sunxi/mmc.h
+++ b/arch/arm/include/asm/arch-sunxi/mmc.h
@@ -58,6 +58,17 @@ struct sunxi_mmc {
SUNXI_MMC_GCTRL_DMA_RESET)
#define SUNXI_MMC_GCTRL_DMA_ENABLE (0x1 5)
+#define SUNXI_MMC_CMD_RESP_EXPIRE (0x1 6)
+#define SUNXI_MMC_CMD_LONG_RESPONSE(0x1 7)
+#define SUNXI_MMC_CMD_CHK_RESPONSE_CRC (0x1 8)
+#define SUNXI_MMC_CMD_DATA_EXPIRE (0x1 9)
+#define SUNXI_MMC_CMD_WRITE(0x1 10)
+#define SUNXI_MMC_CMD_AUTO_STOP(0x1 12)
+#define SUNXI_MMC_CMD_WAIT_PRE_OVER(0x1 13)
+#define SUNXI_MMC_CMD_SEND_INIT_SEQ(0x1 15)
+#define SUNXI_MMC_CMD_UPCLK_ONLY (0x1 21)
+#define SUNXI_MMC_CMD_START(0x1 31)
+
#define SUNXI_MMC_IDMAC_RESET (0x1 0)
#define SUNXI_MMC_IDMAC_FIXBURST (0x1 1)
#define SUNXI_MMC_IDMAC_ENABLE (0x1 7)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 73b891d..d2a82bf 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -227,12 +227,15 @@ static int mmc_update_clk(struct mmc *mmc)
unsigned int cmd;
unsigned timeout = 0xf;
- cmd = (0x1 31) | (0x1 21) | (0x1 13);
+ cmd = SUNXI_MMC_CMD_START |
+ SUNXI_MMC_CMD_UPCLK_ONLY |
+ SUNXI_MMC_CMD_WAIT_PRE_OVER;
writel(cmd, mmchost-reg-cmd);
- while ((readl(mmchost-reg-cmd) (0x1 31)) timeout--);
+ while ((readl(mmchost-reg-cmd) SUNXI_MMC_CMD_START) timeout--);
if (!timeout)
return -1;
+ /* clock update sets various irq status bits, clear these */
writel(readl(mmchost-reg-rint), mmchost-reg-rint);
return 0;
@@ -420,7 +423,7 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
struct mmc_data *data)
{
struct sunxi_mmc_host *mmchost = (struct sunxi_mmc_host *)mmc-priv;
- unsigned int cmdval = 0x8000;
+ unsigned int cmdval = SUNXI_MMC_CMD_START;
signed int timeout = 0;
int error = 0;
unsigned int status = 0;
@@ -434,30 +437,14 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
if (cmd-cmdidx == 12)
return 0;
- /*
-* CMDREG
-* CMD[5:0] : Command index
-* CMD[6] : Has response
-* CMD[7] : Long response
-* CMD[8] : Check response CRC
-* CMD[9] : Has data
-* CMD[10] : Write
-* CMD[11] : Steam mode
-* CMD[12] : Auto stop
-* CMD[13] : Wait previous over
-* CMD[14] : About cmd
-* CMD[15] : Send initialization
-* CMD[21] : Update clock
-* CMD[31] : Load cmd
-*/
if (!cmd-cmdidx)
- cmdval |= (0x1 15);
+ cmdval |= SUNXI_MMC_CMD_SEND_INIT_SEQ;
if (cmd-resp_type MMC_RSP_PRESENT)
- cmdval |= (0x1 6);
+ cmdval |= SUNXI_MMC_CMD_RESP_EXPIRE;
if (cmd-resp_type MMC_RSP_136)
- cmdval |= (0x1 7);
+ cmdval |= SUNXI_MMC_CMD_LONG_RESPONSE;
if (cmd-resp_type MMC_RSP_CRC)
- cmdval |= (0x1 8);
+ cmdval |= SUNXI_MMC_CMD_CHK_RESPONSE_CRC;
if (data) {
if ((u32) data-dest 0x3) {
@@ -465,11 +452,11 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
goto out;
}
- cmdval |= (0x1 9) | (0x1 13);
+ cmdval |= SUNXI_MMC_CMD_DATA_EXPIRE |
SUNXI_MMC_CMD_WAIT_PRE_OVER;
if (data-flags MMC_DATA_WRITE)
- cmdval |= (0x1 10);
+ cmdval |= SUNXI_MMC_CMD_WRITE;
if (data-blocks 1)
- cmdval |= (0x1 12);
+ cmdval |= SUNXI_MMC_CMD_AUTO_STOP;
writel(data-blocksize, mmchost-reg-blksz);
writel(data-blocks * data-blocksize, mmchost-reg-bytecnt);
}
--
1.8.5.3
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[linux-sunxi] [PATCH u-boot-sunxi.git 6/9] sunxi: mmc: defines for rint register bits
Names from Linux driver
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/include/asm/arch-sunxi/mmc.h | 35 +++
drivers/mmc/sunxi_mmc.c | 19 +++
2 files changed, 46 insertions(+), 8 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h
b/arch/arm/include/asm/arch-sunxi/mmc.h
index 6385bc9..10bf214 100644
--- a/arch/arm/include/asm/arch-sunxi/mmc.h
+++ b/arch/arm/include/asm/arch-sunxi/mmc.h
@@ -70,6 +70,41 @@ struct sunxi_mmc {
#define SUNXI_MMC_CMD_UPCLK_ONLY (0x1 21)
#define SUNXI_MMC_CMD_START(0x1 31)
+#define SUNXI_MMC_RINT_RESP_ERROR (0x1 1)
+#define SUNXI_MMC_RINT_COMMAND_DONE(0x1 2)
+#define SUNXI_MMC_RINT_DATA_OVER (0x1 3)
+#define SUNXI_MMC_RINT_TX_DATA_REQUEST (0x1 4)
+#define SUNXI_MMC_RINT_RX_DATA_REQUEST (0x1 5)
+#define SUNXI_MMC_RINT_RESP_CRC_ERROR (0x1 6)
+#define SUNXI_MMC_RINT_DATA_CRC_ERROR (0x1 7)
+#define SUNXI_MMC_RINT_RESP_TIMEOUT(0x1 8)
+#define SUNXI_MMC_RINT_DATA_TIMEOUT(0x1 9)
+#define SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE (0x1 10)
+#define SUNXI_MMC_RINT_FIFO_RUN_ERROR (0x1 11)
+#define SUNXI_MMC_RINT_HARD_WARE_LOCKED(0x1 12)
+#define SUNXI_MMC_RINT_START_BIT_ERROR (0x1 13)
+#define SUNXI_MMC_RINT_AUTO_COMMAND_DONE (0x1 14)
+#define SUNXI_MMC_RINT_END_BIT_ERROR (0x1 15)
+#define SUNXI_MMC_RINT_SDIO_INTERRUPT (0x1 16)
+#define SUNXI_MMC_RINT_CARD_INSERT (0x1 30)
+#define SUNXI_MMC_RINT_CARD_REMOVE (0x1 31)
+#define SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT \
+ (SUNXI_MMC_RINT_RESP_ERROR |\
+SUNXI_MMC_RINT_RESP_CRC_ERROR |\
+SUNXI_MMC_RINT_DATA_CRC_ERROR |\
+SUNXI_MMC_RINT_RESP_TIMEOUT | \
+SUNXI_MMC_RINT_DATA_TIMEOUT | \
+SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE | \
+SUNXI_MMC_RINT_FIFO_RUN_ERROR |\
+SUNXI_MMC_RINT_HARD_WARE_LOCKED | \
+SUNXI_MMC_RINT_START_BIT_ERROR | \
+SUNXI_MMC_RINT_END_BIT_ERROR) /* 0xbfc2 */
+#define SUNXI_MMC_RINT_INTERRUPT_DONE_BIT \
+ (SUNXI_MMC_RINT_AUTO_COMMAND_DONE | \
+SUNXI_MMC_RINT_DATA_OVER | \
+SUNXI_MMC_RINT_COMMAND_DONE | \
+SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE)
+
#define SUNXI_MMC_IDMAC_RESET (0x1 0)
#define SUNXI_MMC_IDMAC_FIXBURST (0x1 1)
#define SUNXI_MMC_IDMAC_ENABLE (0x1 7)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index d520599..e67b3ce 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -505,7 +505,8 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
ret = mmc_trans_data_by_cpu(mmc, data);
}
if (ret) {
- error = readl(mmchost-reg-rint) 0xbfc2;
+ error = readl(mmchost-reg-rint) \
+ SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT;
error = TIMEOUT;
goto out;
}
@@ -514,13 +515,14 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
timeout = 0xf;
do {
status = readl(mmchost-reg-rint);
- if (!timeout-- || (status 0xbfc2)) {
- error = status 0xbfc2;
+ if (!timeout-- ||
+ (status SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT)) {
+ error = status SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT;
debug(cmd timeout %x\n, error);
error = TIMEOUT;
goto out;
}
- } while (!(status 0x4));
+ } while (!(status SUNXI_MMC_RINT_COMMAND_DONE));
if (data) {
unsigned done = 0;
@@ -528,16 +530,17 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
debug(cacl timeout %x\n, timeout);
do {
status = readl(mmchost-reg-rint);
- if (!timeout-- || (status 0xbfc2)) {
- error = status 0xbfc2;
+ if (!timeout-- ||
+ (status SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT)) {
+ error = status
SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT;
debug(data timeout %x\n, error);
error = TIMEOUT;
goto out;
}
if (data-blocks 1)
- done = status (0x1 14);
+ done = status
SUNXI_MMC_RINT_AUTO_COMMAND_DONE;
else
- done = status (0x1 3
[linux-sunxi] [PATCH u-boot-sunxi.git 8/9] sunxi: mmc: refactor similar wait loops
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
drivers/mmc/sunxi_mmc.c | 55 ++---
1 file changed, 29 insertions(+), 26 deletions(-)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 34c4996..a09e021 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -433,6 +433,25 @@ static void mmc_enable_dma_accesses(struct mmc *mmc, int
dma)
writel(gctrl, mmchost-reg-gctrl);
}
+static int mmc_rint_wait(struct mmc *mmc, signed int timeout,
+unsigned int done_bit, const char *what)
+{
+ struct sunxi_mmc_host *mmchost = (struct sunxi_mmc_host *)mmc-priv;
+ unsigned int status;
+
+ do {
+ status = readl(mmchost-reg-rint);
+ if (!timeout-- ||
+ (status SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT)) {
+ debug(%s timeout %x\n, what,
+ status SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT);
+ return TIMEOUT;
+ }
+ } while (!(status done_bit));
+
+ return 0;
+}
+
static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
{
@@ -514,36 +533,20 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
}
}
- timeout = 0xf;
- do {
- status = readl(mmchost-reg-rint);
- if (!timeout-- ||
- (status SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT)) {
- error = status SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT;
- debug(cmd timeout %x\n, error);
- error = TIMEOUT;
- goto out;
- }
- } while (!(status SUNXI_MMC_RINT_COMMAND_DONE));
+ error = mmc_rint_wait(mmc, 0xf, SUNXI_MMC_RINT_COMMAND_DONE, cmd);
+ if (error)
+ goto out;
if (data) {
- unsigned done = 0;
timeout = usedma ? 0x * bytecnt : 0x;
debug(cacl timeout %x\n, timeout);
- do {
- status = readl(mmchost-reg-rint);
- if (!timeout-- ||
- (status SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT)) {
- error = status
SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT;
- debug(data timeout %x\n, error);
- error = TIMEOUT;
- goto out;
- }
- if (data-blocks 1)
- done = status
SUNXI_MMC_RINT_AUTO_COMMAND_DONE;
- else
- done = status SUNXI_MMC_RINT_DATA_OVER;
- } while (!done);
+ error = mmc_rint_wait(mmc, timeout,
+ data-blocks 1 ?
+ SUNXI_MMC_RINT_AUTO_COMMAND_DONE :
+ SUNXI_MMC_RINT_DATA_OVER,
+ data);
+ if (error)
+ goto out;
}
if (cmd-resp_type MMC_RSP_BUSY) {
--
1.8.5.3
--
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[linux-sunxi] [PATCH u-boot-sunxi.git 7/9] sunxi: mmc: defines for status register
Objdump confirms no change to the resulting binary.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/include/asm/arch-sunxi/mmc.h | 8
drivers/mmc/sunxi_mmc.c | 8 +---
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h
b/arch/arm/include/asm/arch-sunxi/mmc.h
index 10bf214..97b14c3 100644
--- a/arch/arm/include/asm/arch-sunxi/mmc.h
+++ b/arch/arm/include/asm/arch-sunxi/mmc.h
@@ -105,6 +105,14 @@ struct sunxi_mmc {
SUNXI_MMC_RINT_COMMAND_DONE | \
SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE)
+#define SUNXI_MMC_STATUS_RXWL_FLAG (0x1 0)
+#define SUNXI_MMC_STATUS_TXWL_FLAG (0x1 1)
+#define SUNXI_MMC_STATUS_FIFO_EMPTY(0x1 2)
+#define SUNXI_MMC_STATUS_FIFO_FULL (0x1 3)
+#define SUNXI_MMC_STATUS_CARD_PRESENT (0x1 8)
+#define SUNXI_MMC_STATUS_CARD_DATA_BUSY(0x1 9)
+#define SUNXI_MMC_STATUS_DATA_FSM_BUSY (0x1 10)
+
#define SUNXI_MMC_IDMAC_RESET (0x1 0)
#define SUNXI_MMC_IDMAC_FIXBURST (0x1 1)
#define SUNXI_MMC_IDMAC_ENABLE (0x1 7)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index e67b3ce..34c4996 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -316,7 +316,8 @@ static int mmc_trans_data_by_cpu(struct mmc *mmc, struct
mmc_data *data)
buff = (unsigned int *)data-dest;
for (i = 0; i (byte_cnt 2); i++) {
while (--timeout
-(readl(mmchost-reg-status) (0x1 2)));
+ (readl(mmchost-reg-status)
+ SUNXI_MMC_STATUS_FIFO_EMPTY));
if (timeout = 0)
goto out;
buff[i] = readl(mmchost-database);
@@ -326,7 +327,8 @@ static int mmc_trans_data_by_cpu(struct mmc *mmc, struct
mmc_data *data)
buff = (unsigned int *)data-src;
for (i = 0; i (byte_cnt 2); i++) {
while (--timeout
-(readl(mmchost-reg-status) (0x1 3)));
+ (readl(mmchost-reg-status)
+ SUNXI_MMC_STATUS_FIFO_FULL));
if (timeout = 0)
goto out;
writel(buff[i], mmchost-database);
@@ -553,7 +555,7 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
error = TIMEOUT;
goto out;
}
- } while (status (1 9));
+ } while (status SUNXI_MMC_STATUS_CARD_DATA_BUSY);
}
if (cmd-resp_type MMC_RSP_136) {
--
1.8.5.3
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[linux-sunxi] [PATCH u-boot-sunxi.git 5/9] sunxi: mmc: refactor enabling/disable DMA accesses
And remove a magic number in the process.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/include/asm/arch-sunxi/mmc.h | 1 +
drivers/mmc/sunxi_mmc.c | 18 ++
2 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h
b/arch/arm/include/asm/arch-sunxi/mmc.h
index 1c19f85..6385bc9 100644
--- a/arch/arm/include/asm/arch-sunxi/mmc.h
+++ b/arch/arm/include/asm/arch-sunxi/mmc.h
@@ -57,6 +57,7 @@ struct sunxi_mmc {
SUNXI_MMC_GCTRL_FIFO_RESET|\
SUNXI_MMC_GCTRL_DMA_RESET)
#define SUNXI_MMC_GCTRL_DMA_ENABLE (0x1 5)
+#define SUNXI_MMC_GCTRL_ACCESS_BY_AHB (0x1 31)
#define SUNXI_MMC_CMD_RESP_EXPIRE (0x1 6)
#define SUNXI_MMC_CMD_LONG_RESPONSE(0x1 7)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index d2a82bf..d520599 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -419,6 +419,18 @@ static int mmc_trans_data_by_dma(struct mmc *mmc, struct
mmc_data *data)
return 0;
}
+static void mmc_enable_dma_accesses(struct mmc *mmc, int dma)
+{
+ struct sunxi_mmc_host *mmchost = (struct sunxi_mmc_host *)mmc-priv;
+
+ unsigned int gctrl = readl(mmchost-reg-gctrl);
+ if (dma)
+ gctrl = ~SUNXI_MMC_GCTRL_ACCESS_BY_AHB;
+ else
+ gctrl |= SUNXI_MMC_GCTRL_ACCESS_BY_AHB;
+ writel(gctrl, mmchost-reg-gctrl);
+}
+
static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
{
@@ -484,13 +496,11 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
if (0) {
#endif
usedma = 1;
- writel(readl(mmchost-reg-gctrl) ~(0x1 31),
- mmchost-reg-gctrl);
+ mmc_enable_dma_accesses(mmc, 1);
ret = mmc_trans_data_by_dma(mmc, data);
writel(cmdval | cmd-cmdidx, mmchost-reg-cmd);
} else {
- writel(readl(mmchost-reg-gctrl) | 0x1 31,
- mmchost-reg-gctrl);
+ mmc_enable_dma_accesses(mmc, 0);
writel(cmdval | cmd-cmdidx, mmchost-reg-cmd);
ret = mmc_trans_data_by_cpu(mmc, data);
}
--
1.8.5.3
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[linux-sunxi] Re: [PATCH u-boot sunxi 01/12] sunxi: Implement reset_cpu
On Tue, 2014-03-18 at 00:00 +0100, Hans de Goede wrote:
There is no way to reset the cpu, so use the watchdog for this.
Did you see
https://www.mail-archive.com/u-boot@lists.denx.de/msg134259.html ?
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/cpu/armv7/sunxi/board.c| 7 +++
arch/arm/include/asm/arch-sunxi/timer.h | 4
2 files changed, 11 insertions(+)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c
b/arch/arm/cpu/armv7/sunxi/board.c
index e95f4e5..4fd5bcc 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -54,6 +54,13 @@ int gpio_init(void)
void reset_cpu(ulong addr)
{
+ static const struct sunxi_wdog *wdog =
+ ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)-wdog;
+
+ /* Set the watchdog for its shortest interval (.5s) and wait */
+ writel(WDT_MODE_RESET_EN | WDT_MODE_EN, wdog-mode);
+ writel(WDT_CTRL_RESTART, wdog-ctl);
+ while (1);
}
/* do some early init */
diff --git a/arch/arm/include/asm/arch-sunxi/timer.h
b/arch/arm/include/asm/arch-sunxi/timer.h
index 6aacfd7..c29d3a0 100644
--- a/arch/arm/include/asm/arch-sunxi/timer.h
+++ b/arch/arm/include/asm/arch-sunxi/timer.h
@@ -11,6 +11,10 @@
#ifndef _SUNXI_TIMER_H_
#define _SUNXI_TIMER_H_
+#define WDT_CTRL_RESTART(0x1 0)
+#define WDT_MODE_EN (0x1 0)
+#define WDT_MODE_RESET_EN (0x1 1)
+
#ifndef __ASSEMBLY__
#include linux/types.h
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[linux-sunxi] [PATCH u-boot-sunxi.git] sunxi: add a comment about the magic numbers in dram.c
Wording mostly stolen from Henrik in http://mid.gmane.org/1394814510.13238.8.camel@localhost Signed-off-by: Ian Campbell i...@hellion.org.uk Cc: Henrik Nordström hen...@henriknordstrom.net --- Cleanup due to upstream review. --- arch/arm/cpu/armv7/sunxi/dram.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/cpu/armv7/sunxi/dram.c b/arch/arm/cpu/armv7/sunxi/dram.c index 25251bb..9348a5e 100644 --- a/arch/arm/cpu/armv7/sunxi/dram.c +++ b/arch/arm/cpu/armv7/sunxi/dram.c @@ -14,6 +14,13 @@ * SPDX-License-Identifier:GPL-2.0+ */ +/* + * Unfortunately the only documentation we have on the sun7i DRAM + * controller is Allwinner boot0 + boot1 code, and that code uses + * magic numbers shifts with no explanations. Hence this code is + * rather undocumented and full of magic. + */ + #include common.h #include asm/io.h #include asm/arch/clock.h -- 1.8.5.3 -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH u-boot-sunxi.git] sunxi: mksunxiboot: be silent unless something goes wrong
Also notice that perror includes the : after the message but before the errno
str, so omit it from the existing calls.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
Not immediately relevant, but these messages stick out like a sore thumb with
the v2014.04-rc2 Kbuild stuff.
---
tools/mksunxiboot.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/tools/mksunxiboot.c b/tools/mksunxiboot.c
index 0364cff..864841e 100644
--- a/tools/mksunxiboot.c
+++ b/tools/mksunxiboot.c
@@ -101,7 +101,7 @@ int main(int argc, char *argv[])
fd_in = open(argv[1], O_RDONLY);
if (fd_in 0) {
- perror(Open input file:);
+ perror(Open input file);
return EXIT_FAILURE;
}
@@ -109,25 +109,26 @@ int main(int argc, char *argv[])
/* get input file size */
file_size = lseek(fd_in, 0, SEEK_END);
- printf(File size: 0x%x\n, file_size);
if (file_size SRAM_LOAD_MAX_SIZE) {
fprintf(stderr, ERROR: File too large!\n);
return EXIT_FAILURE;
} else
load_size = ALIGN(file_size, sizeof(int));
- printf(Load size: 0x%x\n, load_size);
fd_out = open(argv[2], O_WRONLY | O_CREAT, 0666);
if (fd_out 0) {
- perror(Open output file:);
+ perror(Open output file);
return EXIT_FAILURE;
}
/* read file to buffer to calculate checksum */
lseek(fd_in, 0, SEEK_SET);
count = read(fd_in, img.code, load_size);
- printf(Read 0x%x bytes\n, count);
+ if (count != load_size) {
+ perror(Reading input image);
+ return EXIT_FAILURE;
+ }
/* fill the header */
img.header.jump_instruction = /* b instruction */
@@ -140,7 +141,10 @@ int main(int argc, char *argv[])
gen_check_sum((void *)img);
count = write(fd_out, (void *)img, img.header.length);
- printf(Write 0x%x bytes\n, count);
+ if (count != img.header.length) {
+ perror(Writing output);
+ return EXIT_FAILURE;
+ }
close(fd_in);
close(fd_out);
--
1.8.5.3
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[linux-sunxi] [PATCH u-boot-sunxi.git] sunxi: fix a typo
Signed-off-by: Ian Campbell i...@hellion.org.uk --- Cleanup due to upstream review --- arch/arm/cpu/armv7/sunxi/board.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index 0abf27e..94c5cd0 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -31,7 +31,7 @@ DECLARE_GLOBAL_DATA_PTR; /* The sunxi internal brom will try to loader external bootloader - * from mmc0, nannd flash, mmc2. + * from mmc0, nand flash, mmc2. * Unfortunately we can't check how SPL was loaded so assume * it's always the first SD/MMC controller */ -- 1.8.5.3 -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [PATCH u-boot sunxi 5/5] mmc: sunxi: Use sunxi gpio functions to configure pins
On Mon, 2014-03-17 at 12:05 +0800, Chen-Yu Tsai wrote:
@@ -162,40 +151,47 @@ static int mmc_clk_io_on(int sdc_no)
switch (sdc_no) {
case 0:
/* D1-PF0, D0-PF1, CLK-PF2, CMD-PF3, D3-PF4, D4-PF5 */
- writel(0x22, gpio_f-cfg[0]);
- writel(0x555, gpio_f-pull[0]);
- writel(0xaaa, gpio_f-drv[0]);
+ for (pin = SUNXI_GPF(0); pin = SUNXI_GPF(5); pin++) {
+ sunxi_gpio_set_cfgpin(pin, SUNXI_GPF0_SDC0_CMD);
I appreciate that the function is the same for each pin but this still
looks odd. Perhaps just #define SUNXI_GPFx_SDC0 and use that?
I did something similar yesterday and just opencoded the calls.
+ sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
+ sunxi_gpio_set_drv(pin, 2);
I was wondering about these -- do these matter even when the PIN is
configured for a specific function and not as a GPIO?
(same comments for all the others)
Ian.
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[linux-sunxi] Re: [PATCH u-boot sunxi 5/5] mmc: sunxi: Use sunxi gpio functions to configure pins
On Mon, 2014-03-17 at 09:49 +0100, Hans de Goede wrote:
Hi,
On 03/17/2014 09:28 AM, Ian Campbell wrote:
On Mon, 2014-03-17 at 12:05 +0800, Chen-Yu Tsai wrote:
@@ -162,40 +151,47 @@ static int mmc_clk_io_on(int sdc_no)
switch (sdc_no) {
case 0:
/* D1-PF0, D0-PF1, CLK-PF2, CMD-PF3, D3-PF4, D4-PF5 */
- writel(0x22, gpio_f-cfg[0]);
- writel(0x555, gpio_f-pull[0]);
- writel(0xaaa, gpio_f-drv[0]);
+ for (pin = SUNXI_GPF(0); pin = SUNXI_GPF(5); pin++) {
+ sunxi_gpio_set_cfgpin(pin, SUNXI_GPF0_SDC0_CMD);
I appreciate that the function is the same for each pin but this still
looks odd. Perhaps just #define SUNXI_GPFx_SDC0 and use that?
I did something similar yesterday and just opencoded the calls.
+ sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
+ sunxi_gpio_set_drv(pin, 2);
I was wondering about these -- do these matter even when the PIN is
configured for a specific function and not as a GPIO?
Yes, the drive-strength and pull-up also influence the pins when
there multiplexed to some non gpio ip-block. IE with the GMAC the
drive-strength needs to be set according to the PHY type, for
phys which use a DDR type signalling the drive strength must be
3. Likewise for DDR mmc modes (which we don't support atm, but the
ip-block does) drive strength must be set to 3 too.
Thanks for educating me ;-)
Ian.
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[linux-sunxi] Re: [U-Boot] [PATCH v1 5/9] sunxi: generic sun7i build infrastructure.
On Mon, 2014-03-17 at 11:04 -0400, Tom Rini wrote: On Sun, Mar 16, 2014 at 01:25:33PM +, Ian Campbell wrote: On Fri, 2014-03-14 at 10:17 -0400, Tom Rini wrote: On Fri, Mar 14, 2014 at 10:33:47AM +, Ian Campbell wrote: +/* + * Size of malloc() pool + * 1MB = 0x10, 0x10 = 1024 * 1024 + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 20)) This is really really small, and precludes using UBI on NAND for example. What is a suitable value? I see a lots of boards using 128kB or 1MB and only a handful using more. Tegra uses 4MB -- is that a reasonable value? 4MB is reasonable when you start having to worry about 4KB page NAND and UBI. I might have been a little harsh saying really really small and 1MB might be just enough to work with smaller page size NAND. Thanks, I'll go with 4MB then. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [U-Boot] [PATCH v1 0/9] sunxi: initial upstreamining effort
On Fri, 2014-03-14 at 15:17 -0500, Dennis Gilmore wrote: On Fri, 14 Mar 2014 10:16:42 -0400 Tom Rini tr...@ti.com wrote: On Fri, Mar 14, 2014 at 10:33:32AM +, Ian Campbell wrote: Hi, This is my first cut at an upstreamable series based upon the https://github.com/linux-sunxi/u-boot-sunxi.git#sunxi tree. The intention is to present a minimal starting point for upstreaming to which support for other processors, peripherals, boards etc can be added in the future. Therefore this has been stripped right back and currently supports only sun7i processors and the cubietruck board. Supported peripherals are UART, MMC and Ethernet. Some global comments: - If you haven't already, make sure it's all checkpatch clean. - Use the SPDX tags rather than including the GPL boilerplate. - Please re-word the commit messages. The how we got here / where this is from is fine for the cover letter. - Magic numbers need to be defined. I have a quick request also, Please incorporate the ongoing generic distro work as most if not all of the sunxi systems I know of are targets for generic distros. This: http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/180540 ? Sure. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [U-Boot] [PATCH v1 5/9] sunxi: generic sun7i build infrastructure.
On Fri, 2014-03-14 at 10:17 -0400, Tom Rini wrote: On Fri, Mar 14, 2014 at 10:33:47AM +, Ian Campbell wrote: +/* + * Size of malloc() pool + * 1MB = 0x10, 0x10 = 1024 * 1024 + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 20)) This is really really small, and precludes using UBI on NAND for example. What is a suitable value? I see a lots of boards using 128kB or 1MB and only a handful using more. Tegra uses 4MB -- is that a reasonable value? Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [U-Boot] [linux-sunxi] [PATCH v1 9/9] sunxi: add gmac Ethernet support
On Fri, 2014-03-14 at 10:22 -0400, Tom Rini wrote: On Fri, Mar 14, 2014 at 11:28:06AM +, Ian Campbell wrote: On Fri, 2014-03-14 at 19:11 +0800, Chen-Yu Tsai wrote: [snip] I think you should keep them in the same patch. You can then just add the appropriate config options when support of other A20 boards roll in. I don't have any boards which require this, so I cannot test it. I'd prefer to leave it to whoever adds support for the first such board to put this stuff back in, it's a pretty trivial git diff invocation to spot the needed bits. I agree with this as well. With the request to add RGMII here or my reasons for not doing so? (sorry if I'm being dense) Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [U-Boot] [PATCH v1 8/9] sunxi: non-FEL SPL boot support for sun7i
On Sun, 2014-03-16 at 15:19 +, Ian Campbell wrote:
On Fri, 2014-03-14 at 15:03 -0400, Tom Rini wrote:
On 03/14/2014 02:50 PM, Hans de Goede wrote:
Hi,
On 03/14/2014 03:17 PM, Tom Rini wrote:
On Fri, Mar 14, 2014 at 10:33:50AM +, Ian Campbell wrote:
Based linux-sunxi#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in
ldscripts vs v2014.01.
[snip]
+/* Flat Device Tree (FDT/DT) support */
+#define CONFIG_OF_LIBFDT
+#define CONFIG_SYS_BOOTMAPSZ (16 20)
This seems pretty small. This is to keep things from being relocated
into highmem right?
Hmm, this reminds me that we currently need to do a env set fdt_high
in our boot scripts to get ftd to work at all. Would be nice to fix this
for
upstream. I'm afraid I'm clueless as to why we (sunxi) need it, but we do.
You want to be setting bootm_low (even for bootz, it's about the
underlying boot mechanics that bootz and bootelf and ... hook into) to
the amount of lowmem the kernel will have. We do this because we do
want to make sure that the device tree isn't overwritten by the kernel
BSS or similar. Everyone with more DDR than kernel lowmem needs to be
doing something along these lines.
So, I'm confused about what to do here ;-)
AFAICS none of the existing platforms in u-boot.git are setting
bootm_low in their default environment.
README suggests that bootm_low is the lowest address allowed for use by
bootm/z rather than the limit, from the docs it seems that
CONFIG_SYS_BOOTMAPSZ (overridden by env bootm_mapsize) is the limit
bootm_low defaults to CONFIG_SYS_SDRAM_BASE, which sunxi sets, and this
seems logical to me since kernel's lowmem mapping starts at offset 0
into RAM.
I think we probably do want to set BOOTMAPSZ to something like 256MB,
which seems to be the highest in tree (although the vast majority use
8MB...). But I'm not sure that explains why fdt_high is needed today.
I'll have a play.
So setting BOOTMAPSZ to e.g. 256MB limits the fdt load address as you
would expect.
But it seems to not make any difference for the initramfs which still
gets loaded to the top of RAM. This is consistent with README which says
that unless initrd_high is set the ramdisk will be loaded as high as
possible, without reference to BOOTMAPSZ. Supposedly setting initrd_high
to no, off or 0 should cause initrd relocation to obey BOOTMAPSZ
-- but at least in my experiments it does not seem to do so.
boot_ramdisk_high() doesn't seem to make any reference to
bootm_{low,size,etc} like I would expect and with initrd_high==0 it
calls lmb_alloc which allocates anywhere. This is in contrast with
boot_relocate_fdt which uses getenv_bootm_mapsize() and
getenv_bootm_low().
It looks to me like the initrd reloc logic is wrong -- but it's been
that way for such a long time I think I must be mistaken.
Ian.
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[linux-sunxi] [PATCH 2/9] sunxi: define bit shifts for CPU_AHB_APB0_CFG_REG
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/clock.c| 31 +++
arch/arm/include/asm/arch-sunxi/clock.h | 8 ++--
2 files changed, 29 insertions(+), 10 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/clock.c b/arch/arm/cpu/armv7/sunxi/clock.c
index f7eb37b..54d801c 100644
--- a/arch/arm/cpu/armv7/sunxi/clock.c
+++ b/arch/arm/cpu/armv7/sunxi/clock.c
@@ -21,12 +21,18 @@ static void clock_init_safe(void)
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
/* Set safe defaults until PMU is configured */
- writel(AXI_DIV_1 0 | AHB_DIV_2 4 | APB0_DIV_1 8 |
- CPU_CLK_SRC_OSC24M 16, ccm-cpu_ahb_apb0_cfg);
+ writel(AXI_DIV_1 AXI_DIV_SHIFT |
+ AHB_DIV_2 AHB_DIV_SHIFT |
+ APB0_DIV_1 APB0_DIV_SHIFT |
+ CPU_CLK_SRC_OSC24M CPU_CLK_SRC_SHIFT,
+ ccm-cpu_ahb_apb0_cfg);
writel(0xa1005000, ccm-pll1_cfg);
sdelay(200);
- writel(AXI_DIV_1 0 | AHB_DIV_2 4 | APB0_DIV_1 8 |
- CPU_CLK_SRC_PLL1 16, ccm-cpu_ahb_apb0_cfg);
+ writel(AXI_DIV_1 AXI_DIV_SHIFT |
+ AHB_DIV_2 AHB_DIV_SHIFT |
+ APB0_DIV_1 APB0_DIV_SHIFT |
+ CPU_CLK_SRC_PLL1 CPU_CLK_SRC_SHIFT,
+ ccm-cpu_ahb_apb0_cfg);
#ifdef CONFIG_SUN5I
/* Power on reset default for PLL6 is 2400 MHz, which is faster then
* it can reliable do :| Set it to a 600 MHz instead. */
@@ -158,12 +164,18 @@ void clock_set_pll1(int hz)
apb0 = apb0 - 1;
/* Switch to 24MHz clock while changing PLL1 */
- writel(AXI_DIV_1 0 | AHB_DIV_2 4 | APB0_DIV_1 8 |
- CPU_CLK_SRC_OSC24M 16, ccm-cpu_ahb_apb0_cfg);
+ writel(AXI_DIV_1 AXI_DIV_SHIFT |
+ AHB_DIV_2 AHB_DIV_SHIFT |
+ APB0_DIV_1 APB0_DIV_SHIFT |
+ CPU_CLK_SRC_OSC24M CPU_CLK_SRC_SHIFT,
+ ccm-cpu_ahb_apb0_cfg);
sdelay(20);
/* Configure sys clock divisors */
- writel(axi 0 | ahb 4 | apb0 8 | CPU_CLK_SRC_OSC24M 16,
+ writel(axi AXI_DIV_SHIFT |
+ ahb AHB_DIV_SHIFT |
+ apb0 APB0_DIV_SHIFT |
+ CPU_CLK_SRC_OSC24M CPU_CLK_SRC_SHIFT,
ccm-cpu_ahb_apb0_cfg);
/* Configure PLL1 at the desired frequency */
@@ -171,7 +183,10 @@ void clock_set_pll1(int hz)
sdelay(200);
/* Switch CPU to PLL1 */
- writel(axi 0 | ahb 4 | apb0 8 | CPU_CLK_SRC_PLL1 16,
+ writel(axi AXI_DIV_SHIFT |
+ ahb AHB_DIV_SHIFT |
+ apb0 APB0_DIV_SHIFT |
+ CPU_CLK_SRC_PLL1 CPU_CLK_SRC_SHIFT,
ccm-cpu_ahb_apb0_cfg);
sdelay(20);
}
diff --git a/arch/arm/include/asm/arch-sunxi/clock.h
b/arch/arm/include/asm/arch-sunxi/clock.h
index 8ca2066..533f9b5 100644
--- a/arch/arm/include/asm/arch-sunxi/clock.h
+++ b/arch/arm/include/asm/arch-sunxi/clock.h
@@ -98,20 +98,24 @@ struct sunxi_ccm_reg {
#define APB1_FACTOR_N 0
/* clock divide */
-#define CPU_CLK_SRC_OSC24M 1
-#define CPU_CLK_SRC_PLL1 2
+#define AXI_DIV_SHIFT (0)
#define AXI_DIV_1 0
#define AXI_DIV_2 1
#define AXI_DIV_3 2
#define AXI_DIV_4 3
+#define AHB_DIV_SHIFT (4)
#define AHB_DIV_1 0
#define AHB_DIV_2 1
#define AHB_DIV_4 2
#define AHB_DIV_8 3
+#define APB0_DIV_SHIFT (8)
#define APB0_DIV_1 0
#define APB0_DIV_2 1
#define APB0_DIV_4 2
#define APB0_DIV_8 3
+#define CPU_CLK_SRC_SHIFT (16)
+#define CPU_CLK_SRC_OSC24M 1
+#define CPU_CLK_SRC_PLL1 2
#ifdef CONFIG_SUN5I
#define AHB_CLK_SRC_AXI0
--
1.8.5.3
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[linux-sunxi] [PATCH 7/9] sunxi: configuration updates
Based on feedback from Tom Rini:
- drop unnecessary CONFIG_SYS_PROMPT_HUSH_PS2
- drop deprecated mtest settings
- use generic baud rate table
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
include/configs/sunxi-common.h | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 81ac6f7..292a938 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -110,7 +110,6 @@
#define CONFIG_SYS_LONGHELP/* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER /* use hush command parser*/
#define CONFIG_CMD_ECHO
-#define CONFIG_SYS_PROMPT_HUSH_PS2
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
@@ -118,9 +117,6 @@
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZECONFIG_SYS_CBSIZE
-/* memtest works on */
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (256 20))
#define CONFIG_SYS_LOAD_ADDR 0x5000 /* default load address */
/* standalone support */
@@ -128,9 +124,8 @@
#define CONFIG_SYS_HZ 1000
-/* valid baudrates */
+/* baudrate */
#define CONFIG_BAUDRATE115200
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/* The stack sizes are set up in start.S using the settings below */
#define CONFIG_STACKSIZE (256 10) /* 256 KiB */
--
1.8.5.3
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[linux-sunxi] [PATCH 9/9] sunxi: remove key driver
This code hasn't been called since the calls to it randomly disappeared in
71e6be0ccbd5 sunxi: get u-boot mmc spl work and 4d29a5dd7414 sunxi: further
clean sunxi platform. It seems to have only ever been used as test code anyway.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/Makefile | 1 -
arch/arm/cpu/armv7/sunxi/key.c| 54 ---
arch/arm/include/asm/arch-sunxi/key.h | 37
3 files changed, 92 deletions(-)
delete mode 100644 arch/arm/cpu/armv7/sunxi/key.c
delete mode 100644 arch/arm/include/asm/arch-sunxi/key.h
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile
b/arch/arm/cpu/armv7/sunxi/Makefile
index e6d8fa9..83b7c1a 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -21,7 +21,6 @@ obj-$(CONFIG_SYS_SECONDARY_ON)+= secondary_init.o
obj-$(CONFIG_SYS_SECONDARY_ON) += smp.o
ifndef CONFIG_SPL_BUILD
-obj-y += key.o
obj-y += cpu_info.o
ifdef CONFIG_CMD_WATCHDOG
obj-$(CONFIG_CMD_WATCHDOG) += cmd_watchdog.o
diff --git a/arch/arm/cpu/armv7/sunxi/key.c b/arch/arm/cpu/armv7/sunxi/key.c
deleted file mode 100644
index fcdabd3..000
--- a/arch/arm/cpu/armv7/sunxi/key.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * (C) Copyright 2007-2011
- * Allwinner Technology Co., Ltd. www.allwinnertech.com
- * Tom Cubie tangli...@allwinnertech.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include asm/io.h
-#include asm/arch/cpu.h
-#include asm/arch/key.h
-#include asm/arch/sys_proto.h
-
-int sunxi_key_init(void)
-{
- struct sunxi_lradc *sunxi_key_base =
- (struct sunxi_lradc *)SUNXI_LRADC_BASE;
-
- sr32(sunxi_key_base-ctrl, 0, 1, LRADC_EN);
- sr32(sunxi_key_base-ctrl, 2, 2, LRADC_SAMPLE_RATE);
- sr32(sunxi_key_base-ctrl, 4, 2, LEVELB_VOL);
- sr32(sunxi_key_base-ctrl, 6, 1, LRADC_HOLD_EN);
- sr32(sunxi_key_base-ctrl, 12, 2, KEY_MODE_SELECT);
-
- /* disable all key irq */
- writel(0x0, sunxi_key_base-intc);
- /* clear all key pending */
- writel(0x, sunxi_key_base-ints);
-
- return 0;
-}
-
-u32 sunxi_read_key(void)
-{
- u32 ints;
- u32 key = 0;
- struct sunxi_lradc *sunxi_key_base =
- (struct sunxi_lradc *)SUNXI_LRADC_BASE;
-
- ints = readl(sunxi_key_base-ints);
-
- /* if there is already data pending,
-read it */
- if (ints ADC0_DATA_PENDING) {
- key = readl(sunxi_key_base-data0);
-#ifdef DEBUG
- printf(key pressed, value=0x%x\n, key);
-#endif
- }
- /* clear the pending data */
- writel(ints, sunxi_key_base-ints);
- return key;
-}
diff --git a/arch/arm/include/asm/arch-sunxi/key.h
b/arch/arm/include/asm/arch-sunxi/key.h
deleted file mode 100644
index b2e1faa..000
--- a/arch/arm/include/asm/arch-sunxi/key.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * (C) Copyright 2007-2011
- * Allwinner Technology Co., Ltd. www.allwinnertech.com
- * Tom Cubie tangli...@allwinnertech.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#ifndef _SUNXI_KEY_H
-#define _SUNXI_KEY_H
-
-#include linux/types.h
-
-struct sunxi_lradc {
- u32 ctrl; /* lradc control */
- u32 intc; /* interrupt control */
- u32 ints; /* interrupt status */
- u32 data0;/* lradc 0 data */
- u32 data1;/* lradc 1 data */
-};
-
-#define LRADC_EN 0x1/* LRADC enable */
-#define LRADC_SAMPLE_RATE 0x2/* 32.25 Hz */
-#define LEVELB_VOL0x2/* 0x33(~1.6v) */
-#define LRADC_HOLD_EN 0x1/* sample hold enable */
-#define KEY_MODE_SELECT 0x0/* normal mode */
-
-#define ADC0_DATA_PENDING (0x1 0)/* adc0 has data */
-#define ADC0_KEYDOWN_PENDING (0x1 1)/* key down */
-#define ADC0_HOLDKEY_PENDING (0x1 2)/* key hold */
-#define ADC0_ALRDY_HOLD_PENDING (0x1 3)/* key already hold */
-#define ADC0_KEYUP_PENDING(0x1 4)/* key up */
-
-int sunxi_key_init(void);
-u32 sunxi_read_key(void);
-
-#endif
--
1.8.5.3
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[linux-sunxi] [PATCH 1/9] sunxi: simplify get_tbclk
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/timer.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/timer.c b/arch/arm/cpu/armv7/sunxi/timer.c
index d21289a..d0d9953 100644
--- a/arch/arm/cpu/armv7/sunxi/timer.c
+++ b/arch/arm/cpu/armv7/sunxi/timer.c
@@ -98,7 +98,5 @@ unsigned long long get_ticks(void)
*/
ulong get_tbclk(void)
{
- ulong tbclk;
- tbclk = CONFIG_SYS_HZ;
- return tbclk;
+ return CONFIG_SYS_HZ;
}
--
1.8.5.3
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[linux-sunxi] [PATCH 8/9] sunxi: Increase CONFIG_SYS_BOOTMAPSZ to 256MB
This value is supposed to reflect the lowmem mapping of the kernel. The existing 16MB is clearly much to small for this. 256MB is likely to still be an underestimate but is a reasonable, if conservative, value. Signed-off-by: Ian Campbell i...@hellion.org.uk --- include/configs/sunxi-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 292a938..2cd169a 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -102,7 +102,7 @@ /* Flat Device Tree (FDT/DT) support */ #define CONFIG_OF_LIBFDT -#define CONFIG_SYS_BOOTMAPSZ (16 20) +#define CONFIG_SYS_BOOTMAPSZ (256 20) /* * Miscellaneous configurable options -- 1.8.5.3 -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH 5/9] sunxi: clock_set_pll1 takes Hz not MHz
This was only wrong in the prototype.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/include/asm/arch-sunxi/clock.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-sunxi/clock.h
b/arch/arm/include/asm/arch-sunxi/clock.h
index dc8c371..b6184dc 100644
--- a/arch/arm/include/asm/arch-sunxi/clock.h
+++ b/arch/arm/include/asm/arch-sunxi/clock.h
@@ -232,7 +232,7 @@ struct sunxi_ccm_reg {
#ifndef __ASSEMBLY__
int clock_init(void);
int clock_twi_onoff(int port, int state);
-void clock_set_pll1(int mhz);
+void clock_set_pll1(int hz);
unsigned int clock_get_pll5(void);
#endif
--
1.8.5.3
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[linux-sunxi] [PATCH 3/9] sunxi: #define default values and shifts for pll cfg registers
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/clock.c| 10 ++
arch/arm/include/asm/arch-sunxi/clock.h | 9 +
2 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/clock.c b/arch/arm/cpu/armv7/sunxi/clock.c
index 54d801c..980fb90 100644
--- a/arch/arm/cpu/armv7/sunxi/clock.c
+++ b/arch/arm/cpu/armv7/sunxi/clock.c
@@ -26,7 +26,7 @@ static void clock_init_safe(void)
APB0_DIV_1 APB0_DIV_SHIFT |
CPU_CLK_SRC_OSC24M CPU_CLK_SRC_SHIFT,
ccm-cpu_ahb_apb0_cfg);
- writel(0xa1005000, ccm-pll1_cfg);
+ writel(PLL1_CFG_DEFAULT, ccm-pll1_cfg);
sdelay(200);
writel(AXI_DIV_1 AXI_DIV_SHIFT |
AHB_DIV_2 AHB_DIV_SHIFT |
@@ -36,11 +36,13 @@ static void clock_init_safe(void)
#ifdef CONFIG_SUN5I
/* Power on reset default for PLL6 is 2400 MHz, which is faster then
* it can reliable do :| Set it to a 600 MHz instead. */
- writel(0x21009911, ccm-pll6_cfg);
+ writel(PLL6_CFG_DEFAULT, ccm-pll6_cfg);
#endif
#ifdef CONFIG_SUN7I
- writel(0x1 6 | readl(ccm-ahb_gate0), ccm-ahb_gate0);
- writel(0x1 31 | readl(ccm-pll6_cfg), ccm-pll6_cfg);
+ writel(0x1 AHB_GATE_OFFSET_DMA | readl(ccm-ahb_gate0),
+ ccm-ahb_gate0);
+ writel(0x1 PLL6_ENABLE_OFFSET | readl(ccm-pll6_cfg),
+ ccm-pll6_cfg);
#endif
}
#endif
diff --git a/arch/arm/include/asm/arch-sunxi/clock.h
b/arch/arm/include/asm/arch-sunxi/clock.h
index 533f9b5..dc8c371 100644
--- a/arch/arm/include/asm/arch-sunxi/clock.h
+++ b/arch/arm/include/asm/arch-sunxi/clock.h
@@ -117,6 +117,15 @@ struct sunxi_ccm_reg {
#define CPU_CLK_SRC_OSC24M 1
#define CPU_CLK_SRC_PLL1 2
+#define PLL1_CFG_DEFAULT 0xa1005000
+
+#ifdef CONFIG_SUN5I
+#define PLL6_CFG_DEFAULT 0x21009911
+#endif
+#ifdef CONFIG_SUN7I
+#define PLL6_ENABLE_OFFSET 31
+#endif
+
#ifdef CONFIG_SUN5I
#define AHB_CLK_SRC_AXI0
#endif
--
1.8.5.3
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[linux-sunxi] Re: [PATCH u-boot sunxi 2/4] sunxi: FIXUP: sunxi: initial sun7i dram setup support
On Sun, 2014-03-16 at 14:53 +0100, Hans de Goede wrote: mctl_ddr3_reset() should not be called here for sun7i, at least the u-boot-sunxi sources don't do this. oops, I misread an ifndef. I'll fold in, thanks. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [PATCH u-boot sunxi 3/4] sunxi: Implement reset_cpu
On Sun, 2014-03-16 at 14:53 +0100, Hans de Goede wrote:
There is no way to reset the cpu, so use the watchdog for this.
The sunxi.git tree does this by calling watchdog_set(0). I think it
would be better to introduce the generic watchdog support and the add
this a patch to use it for reset. Unless we don't plan to upstream the
watchdog stuff for some reason?
Not sure why cmd_watchdog.c is sunxi, seems like in principal it could
be generic.
Ian.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/cpu/armv7/sunxi/board.c| 7 +++
arch/arm/include/asm/arch-sunxi/timer.h | 4
2 files changed, 11 insertions(+)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c
b/arch/arm/cpu/armv7/sunxi/board.c
index 98cad43..2668d52 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -70,6 +70,13 @@ int gpio_init(void)
void reset_cpu(ulong addr)
{
+ static const struct sunxi_wdog *wdog =
+ ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)-wdog;
+
+ /* Set the watchdog for its shortest interval (.5s) and wait */
+ writel(WDT_MODE_RESET_EN | WDT_MODE_EN, wdog-mode);
+ writel(WDT_CTRL_RESTART, wdog-ctl);
+ while (1);
}
/* do some early init */
diff --git a/arch/arm/include/asm/arch-sunxi/timer.h
b/arch/arm/include/asm/arch-sunxi/timer.h
index f9d4f4f..1489b2e 100644
--- a/arch/arm/include/asm/arch-sunxi/timer.h
+++ b/arch/arm/include/asm/arch-sunxi/timer.h
@@ -27,6 +27,10 @@
#ifndef _SUNXI_TIMER_H_
#define _SUNXI_TIMER_H_
+#define WDT_CTRL_RESTART(0x1 0)
+#define WDT_MODE_EN (0x1 0)
+#define WDT_MODE_RESET_EN (0x1 1)
+
#ifndef __ASSEMBLY__
#include linux/types.h
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[linux-sunxi] Re: [PATCH+GIT 0/9] sunxi: upstream review based cleanups
On Sun, 2014-03-16 at 19:40 +0100, Hans de Goede wrote: Thanks I've added the 9 patches to the u-boot-sunxi repo sunxi branch, Thanks. as for the merge with v2014.04-rc2, I would like to wait what HNO has to say about that. I've rebased onto what you've now applied and force pushed the branch to make this easier to pull if desired. The branch is still: git://gitorious.org/ijc/u-boot.git sunxi-mainlining-cleanups Post v2014.04-rc2 I think there are two worthwhile updates which I've noticed (but not implemented yet): * make mksunxiboot silent in the common case, with the new Kbuild stuff it's output stands out a bit and isn't all that helpful anyway. * Reenable DCACHE, now that the designware driver apparently no longer conflicts. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [U-Boot] [PATCH v1 7/9] sunxi: mmc support
On Fri, 2014-03-14 at 17:36 +0200, Pantelis Antoniou wrote:
[...]
Thanks for your review. It seems there are still quite a few issues
dating back to the original allwinner dumps here.
@linux-sunxi: if anyone wants to volunteer to help cleanup this
particular driver I'd be very happy -- there's a lot of it!
+
+static void dumpmmcreg(struct sunxi_mmc *reg)
+{
+ debug(dump mmc registers:\n);
+ debug(gctrl 0x%08x\n, reg-gctrl);
+ debug(clkcr 0x%08x\n, reg-clkcr);
+ debug(timeout 0x%08x\n, reg-timeout);
+ debug(width 0x%08x\n, reg-width);
+ debug(blksz 0x%08x\n, reg-blksz);
[...] lots more debug(foo)
+}
^^^ #ifdef DEBUG here?
I can if you prefer but debug() itself effectively includes the same
ifdef so the end result is already the same.
[...]
+/* support 4 mmc hosts */
+struct mmc mmc_dev[4];
+struct sunxi_mmc_host mmc_host[4];
+
^ hosts mmc structs can be allocated even for SPL now
Can be or must be?
+ struct sunxi_mmc_host *mmchost = mmc_host[sdc_no];
+ static struct sunxi_gpio *gpio_c =
+ ((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)-gpio_bank[SUNXI_GPIO_C];
+ static struct sunxi_gpio *gpio_f =
+ ((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)-gpio_bank[SUNXI_GPIO_F];
+#if CONFIG_MMC1_PG
+ static struct sunxi_gpio *gpio_g =
+ ((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)-gpio_bank[SUNXI_GPIO_G];
+#endif
+ static struct sunxi_gpio *gpio_h =
+ ((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)-gpio_bank[SUNXI_GPIO_H];
+ static struct sunxi_gpio *gpio_i =
+ ((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)-gpio_bank[SUNXI_GPIO_I];
+ struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
^ Castings are ugly; rework with a temporary variable.
Ack.
The static's here are odd too and date back to the original alwinner
code dumps. I'll get rid of them too.
[...]
+ case 3:
+ /* PI4-CMD, PI5-CLK, PI6~9-D0~D3 : 2 */
+ writel(0x 16, gpio_i-cfg[0]);
+ writel(0x22, gpio_i-cfg[1]);
+ writel(0x555 8, gpio_i-pull[0]);
+ writel(0x555 8, gpio_i-drv[0]);
+ break;
+
+ default:
+ return -1;
+ }
+
Lots of magic constants. I have no idea what's going on here.
Use a few defines.
Right. These came from the original allwinner dumps so I was worried
that they might be undocumented magic, but actually since the are gpio
frobbing I reckon I can figure them out.
[...] + cmd = (0x1 31) | (0x1 21) | (0x1 13);
+ writel(cmd, mmchost-reg-cmd);
+ while ((readl(mmchost-reg-cmd) (0x1 31)) timeout--);
+ if (!timeout)
+ return -1;
+
^ Eeek! Use udelay and a time based timeout.
Ack.
+ writel(readl(mmchost-reg-rint), mmchost-reg-rint);
+
^ Same here - Not even a timeout?
No loop here though?
[...]
+ rval |= (0x1 16);
#define ?
Ack
[...]
Ambiguous formatting. Use { }
Ack
[...]
+ /* Reset controller */
+ writel(0x7, mmchost-reg-gctrl);
+
Magic value again.
The sum total of the docs for this one are:
* GCTRLREG
* GCTRL[2] : DMA reset
* GCTRL[5] : DMA enable
But I'll see what I can do.
[...]
+ } else {
+ buff = (unsigned int *)data-src;
+ for (i = 0; i (byte_cnt 2); i++) {
+ while (--timeout
+(readl(mmchost-reg-status) (0x1 3)));
+ if (timeout = 0)
+ goto out;
+ writel(buff[i], mmchost-database);
+ timeout = 0xf;
+ }
+ }
+
^ Timeouts using time values? udelay? See above.
Ack.
[]
+ writel(rval, mmchost-reg-idie);
+ writel((u32) pdes, mmchost-reg-dlba);
+ writel((0x2 28) | (0x7 16) | (0x01 3),
+ mmchost-reg-ftrglevel);
+
^ #define again?
Some of these (ftrgllevel) have no docs whatsoever, but I'll do what I
can.
[...]
+ timeout = 0xf;
+ do {
+ status = readl(mmchost-reg-rint);
+ if (!timeout-- || (status 0xbfc2)) {
+ error = status 0xbfc2;
+ debug(cmd timeout %x\n, error);
+ error = TIMEOUT;
+ goto out;
+ }
^ Again timeouts without using time values.
I'm getting the picture ;-)
[...]
+int sunxi_mmc_init(int sdc_no)
+{
+ struct mmc *mmc;
+
+ memset(mmc_dev[sdc_no], 0, sizeof(struct mmc));
+ memset(mmc_host[sdc_no], 0, sizeof(struct sunxi_mmc_host));
+ mmc = mmc_dev[sdc_no];
+
+ sprintf(mmc-name, SUNXI SD/MMC);
+ mmc-priv = mmc_host[sdc_no];
+ mmc-send_cmd = mmc_send_cmd;
+ mmc-set_ios = mmc_set_ios;
+ mmc-init = mmc_core_init;
+
+ mmc-voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
+ mmc-host_caps = MMC_MODE_4BIT;
+ mmc-host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
+
+
[linux-sunxi] [PATCH v1 0/9] sunxi: initial upstreamining effort
Hi, This is my first cut at an upstreamable series based upon the https://github.com/linux-sunxi/u-boot-sunxi.git#sunxi tree. The intention is to present a minimal starting point for upstreaming to which support for other processors, peripherals, boards etc can be added in the future. Therefore this has been stripped right back and currently supports only sun7i processors and the cubietruck board. Supported peripherals are UART, MMC and Ethernet. The code here is from sunxi.git#sunxi[0] changeset d854c4de2f57 arm: Handle .gnu.hash section in ldscripts and applied to u-boot v2014.01. This series can also be found at: git://gitorious.org/ijc/u-boot.git sunxi-mainlining-v1 There is no SMP here, since that relies on the PSCI support from Marc Zyngier which has yet to land in mainline AFAIK. I've tried to give corect credit and S-o-b based upon: git log --pretty='%aN' linux-sunxi/sunxi -- [PATHS] | sort -u git log linux-sunxi/sunxi -- [PATHS] | grep -i signed.off.by | sort -u Manual inspection This will tend to over credit, since it will include folks who contributed code which has since been removed as well as those who contributed code which is not included in this patch set, but I think it is better to be conservative and include too many rather than incorrectly exclude people. Doing better than this would be IMHO too hard to be worth it (e.g. git blame would prefer a recent whitespace cleanup to the actual author of the code and prefer someone did code motion over the original author, so it would be a massive manual process). I considered using the sunxi.git#sunxi-patchqueue branch but it was 151 patches and there didn't seem to be a small enough set of prefix patches which I was comfortable starting from. Cheers, Ian. [0] https://github.com/linux-sunxi/u-boot-sunxi.git -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v1 4/9] sunxi: initial generic sun7i cpu, board and start of day support
Based linux-sunxi#sunxi commit d854c4de2f57 arm: Handle .gnu.hash section in
ldscripts vs v2014.01.
This has been stripped back for mainlining and supports only sun7i. These
changes are not useful by themselves but are split out to make the patch sizes
more manageable.
As well as the following signed-off-by the sunxi branch shows commits to these
files authored by the following:
Almo Nito
Carl van Schaik
FUKAUMI Naoki
hehopmajieh
j
Sergey Lapin
Tom Cubie
Signed-off-by: Aleksei Mamlin mamli...@gmail.com
Signed-off-by: Alexandru Gagniuc mr.nuke...@gmail.com
Signed-off-by: Chen-Yu Tsai w...@csie.org
Signed-off-by: Emilio López emi...@elopez.com.ar
Signed-off-by: Hans de Goede hdego...@redhat.com
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Ian Campbell i...@hellion.org.uk
Signed-off-by: Jens Kuske jensku...@gmail.com
Signed-off-by: Luc Verhaegen l...@skynet.be
Signed-off-by: Luke Leighton l...@lkcl.net
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Patrick Wood patrickhw...@gmail.com
Signed-off-by: Stefan Roese s...@denx.de
Signed-off-by: Wills Wang wills.wang.o...@gmail.com
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/Makefile | 11 +++
arch/arm/cpu/armv7/sunxi/board.c | 104 +
arch/arm/cpu/armv7/sunxi/cpu_info.c | 35 +
arch/arm/cpu/armv7/sunxi/start.c | 1 +
arch/arm/include/asm/arch-sunxi/cpu.h | 138 ++
board/sunxi/Makefile | 28 +++
board/sunxi/board.c | 91 ++
7 files changed, 408 insertions(+)
create mode 100644 arch/arm/cpu/armv7/sunxi/board.c
create mode 100644 arch/arm/cpu/armv7/sunxi/cpu_info.c
create mode 100644 arch/arm/cpu/armv7/sunxi/start.c
create mode 100644 arch/arm/include/asm/arch-sunxi/cpu.h
create mode 100644 board/sunxi/Makefile
create mode 100644 board/sunxi/board.c
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile
b/arch/arm/cpu/armv7/sunxi/Makefile
index 41d843f..3e8a36c 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -26,5 +26,16 @@
obj-y += timer.o
obj-y += dram.o
+obj-y += board.o
obj-y += clock.o
obj-y += pinmux.o
+
+ifndef CONFIG_SPL_BUILD
+obj-y += cpu_info.o
+endif
+
+ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_SPL_FEL
+obj-y += start.o
+endif
+endif
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
new file mode 100644
index 000..98cad43
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -0,0 +1,104 @@
+/*
+ * (C) Copyright 2012 Henrik Nordstrom hen...@henriknordstrom.net
+ *
+ * (C) Copyright 2007-2011
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * Tom Cubie tangli...@allwinnertech.com
+ *
+ * Some init for sunxi platform.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include serial.h
+#ifdef CONFIG_SPL_BUILD
+#include spl.h
+#endif
+#include asm/gpio.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/gpio.h
+#include asm/arch/sys_proto.h
+#include asm/arch/timer.h
+
+#ifdef CONFIG_SPL_BUILD
+/* Pointer to the global data structure for SPL */
+DECLARE_GLOBAL_DATA_PTR;
+
+/* The sunxi internal brom will try to loader external bootloader
+ * from mmc0, nannd flash, mmc2.
+ * Unfortunately we can't check how SPL was loaded so assume
+ * it's always the first SD/MMC controller
+ */
+u32 spl_boot_device(void)
+{
+ return BOOT_DEVICE_MMC1;
+}
+
+/* No confirmation data available in SPL yet. Hardcode bootmode */
+u32 spl_boot_mode(void)
+{
+ return MMCSD_MODE_RAW;
+}
+#endif
+
+int gpio_init(void)
+{
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUN4I_GPB22_UART0_TX);
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUN4I_GPB23_UART0_RX);
+ sunxi_gpio_set_pull(SUNXI_GPB(23), 1);
+
+ return 0;
+}
+
+void reset_cpu(ulong addr)
+{
+}
+
+/* do some early init */
+void s_init(void)
+{
+#if !defined CONFIG_SPL_BUILD
+ /* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */
+ asm volatile(
+ mrc p15, 0, r0, c1, c0, 1\n
+ orr r0, r0, #0x40\n
+ mcr p15, 0, r0, c1
[linux-sunxi] [PATCH v1 9/9] sunxi: add gmac Ethernet support
Based linux-sunxi#sunxi commit d854c4de2f57 arm: Handle .gnu.hash section in
ldscripts vs v2014.01.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Signed-off-by: Jens Kuske jensku...@gmail.com
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/board.c | 15 +
boards.cfg | 4 +--
drivers/net/Makefile | 1 +
drivers/net/sunxi_gmac.c | 34
include/configs/sunxi-common.h | 68
5 files changed, 120 insertions(+), 2 deletions(-)
create mode 100644 drivers/net/sunxi_gmac.c
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 98cad43..73b4cf0 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -27,6 +27,8 @@
*/
#include common.h
+#include netdev.h
+#include miiphy.h
#include serial.h
#ifdef CONFIG_SPL_BUILD
#include spl.h
@@ -102,3 +104,16 @@ void enable_caches(void)
dcache_enable();
}
#endif
+
+#if defined(CONFIG_SUNXI_GMAC)
+/*
+ * Initializes on-chip ethernet controllers.
+ * to override, implement board_eth_init()
+ */
+int cpu_eth_init(bd_t *bis)
+{
+ sunxi_gmac_initialize(bis);
+
+ return 0;
+}
+#endif
diff --git a/boards.cfg b/boards.cfg
index a513376..090e956 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -353,8 +353,8 @@ Active arm armv7 rmobile renesas
koelsch
Active arm armv7 s5pc1xx samsung goni
s5p_goni -
Mateusz Zalega m.zal...@samsung.com
Active arm armv7 s5pc1xx samsung smdkc100
smdkc100 -
Minkyu Kang mk7.k...@samsung.com
Active arm armv7 socfpga altera socfpga
socfpga_cyclone5 -
-
-Active arm armv7 sunxi - sunxi
Cubietruck sun7i:CUBIETRUCK,SPL
-
-Active arm armv7 sunxi - sunxi
Cubietruck_FEL sun7i:CUBIETRUCK,SPL_FEL
-
+Active arm armv7 sunxi - sunxi
Cubietruck sun7i:CUBIETRUCK,SPL,SUNXI_GMAC,RGMII
-
+Active arm armv7 sunxi - sunxi
Cubietruck_FEL
sun7i:CUBIETRUCK,SPL_FEL,SUNXI_GMAC,RGMII
-
Active arm armv7 u8500 st-ericsson snowball
snowball -
Mathieu Poirier mathieu.poir...@linaro.org
Active arm armv7 u8500 st-ericsson u8500
u8500_href -
-
Active arm armv7 vf610 freescale vf610twr
vf610twr
vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg
Alison Wang
b18...@freescale.com
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 7f9ce90..2300c00 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_SH_ETHER) += sh_eth.o
obj-$(CONFIG_SMC9) += smc9.o
obj-$(CONFIG_SMC911X) += smc911x.o
obj-$(CONFIG_SUNXI_WEMAC) += sunxi_wemac.o
+obj-$(CONFIG_SUNXI_GMAC) += sunxi_gmac.o
obj-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o
obj-$(CONFIG_TSEC_ENET) += tsec.o fsl_mdio.o
obj-$(CONFIG_DRIVER_TI_CPSW) += cpsw.o
diff --git a/drivers/net/sunxi_gmac.c b/drivers/net/sunxi_gmac.c
new file mode 100644
index 000..432d7b2
--- /dev/null
+++ b/drivers/net/sunxi_gmac.c
@@ -0,0 +1,34 @@
+#include common.h
+#include netdev.h
+#include miiphy.h
+#include asm/gpio.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/gpio.h
+
+int sunxi_gmac_initialize(bd_t *bis
Re: [linux-sunxi] [PATCH v1 9/9] sunxi: add gmac Ethernet support
On Fri, 2014-03-14 at 19:11 +0800, Chen-Yu Tsai wrote:
Thanks for working on this!
No problem.
I see you left out all the CONFIG_RGMII ifdefs from this file. Not
sure if it's because you're aiming to support only the Cubietruck
first.
Yes, exactly.
I think you should keep them in the same patch. You can then
just add the appropriate config options when support of other A20
boards roll in.
I don't have any boards which require this, so I cannot test it. I'd
prefer to leave it to whoever adds support for the first such board to
put this stuff back in, it's a pretty trivial git diff invocation to
spot the needed bits.
There are 3 changes to the designware driver since u-boot-sunxi's
last merge (2014.1-rc1):
50b0df8 net/designware: make driver compatible with data cache
92a190a net/designware - switch driver to phylib usage
74cb708 net/designware: add explicit reset of {tx|rx}_currdescnum
The move to phylib will likely break the current code. Maybe we could
merge 2014.4-rc1 in to fix it first.
I'm happy to track any merges updates etc, sounds like at least this
patch will need some rebasing. Since this one is last I think it needn't
stop the rest going in (although I anticipate at least some review and
rebasing for all of it).
Also, GMAC support depends on
5a51af3 net/designware: Reduce DMA burst length
by Jens Kuske (jemk). Neither of us bothered to send this upstream yet.
I think I saw that in the sunxi tree but since it touched core code I
punted on it for now since I wasn't sure how to reconcile it with
non-sunxi platforms (i.e. what is the downside for other boards? Worse
performance?)
Thanks for your feedback.
Ian.
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[linux-sunxi] Re: [U-Boot] [PATCH v1 0/9] sunxi: initial upstreamining effort
On Fri, 2014-03-14 at 08:55 -0400, Tom Rini wrote: On Fri, Mar 14, 2014 at 10:33:32AM +, Ian Campbell wrote: Hi, This is my first cut at an upstreamable series based upon the https://github.com/linux-sunxi/u-boot-sunxi.git#sunxi tree. The intention is to present a minimal starting point for upstreaming to which support for other processors, peripherals, boards etc can be added in the future. Therefore this has been stripped right back and currently supports only sun7i processors and the cubietruck board. Supported peripherals are UART, MMC and Ethernet. First of all, yay. Second, how hard would it be to add sun5i / a13-olinuxino-micro support on top of this? I ask since I've got one of those sitting around here. Would we be talking just board level things or is sun5i vs sun7i a big deal? Thanks! I think it would be pretty small, if you fetch my tree and git diff it against the sunxi.git tree the diff bits with sun5i in them stand out reasonably clearly. I don't have such a platform myself though which is why I've not just done it. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [U-Boot] [PATCH v1 0/9] sunxi: initial upstreamining effort
On Fri, 2014-03-14 at 10:16 -0400, Tom Rini wrote: On Fri, Mar 14, 2014 at 10:33:32AM +, Ian Campbell wrote: Hi, This is my first cut at an upstreamable series based upon the https://github.com/linux-sunxi/u-boot-sunxi.git#sunxi tree. The intention is to present a minimal starting point for upstreaming to which support for other processors, peripherals, boards etc can be added in the future. Therefore this has been stripped right back and currently supports only sun7i processors and the cubietruck board. Supported peripherals are UART, MMC and Ethernet. Some global comments: - If you haven't already, make sure it's all checkpatch clean. I hadn't realised u-boot had a checkpatch. I shall do this. - Use the SPDX tags rather than including the GPL boilerplate. Agreed, I already sent out a patch to sunxi.git to make this happen there so I could sync it to this tree (so sunxi guys consider this a ping on 1394161088-9835-1-git-send-email-...@hellion.org.uk ;-)) I suppose I don't need to wait, but it was convenient to have a diff which always shrank... - Please re-word the commit messages. The how we got here / where this is from is fine for the cover letter. OK, that was mostly for my own reference. Mind if I put it at the end after --- so git am will strip it? - Magic numbers need to be defined. Will do. Thanks, Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] [PATCH v3 0/4] uboot sata support for sunxi platform
On Wed, 2014-03-12 at 14:17 +0100, Koen Kooi wrote: Op 12 mrt. 2014, om 13:56 heeft Ian Campbell i...@hellion.org.uk het volgende geschreven: On Wed, 2014-03-12 at 05:43 -0700, Ezaul Zillmer wrote: I'm afraid much of your mail was incomprehensible to me. setenv bootargs console = tty0 console = ttyS0, 115200 = hdmi.audio EDID: 0 = disp.screen0_output_mode EDID: 1280x800p60 root = / dev/sda1 rootfstype = ext4 rootwait panic = 10 ext4load 0 0x4300 scsi boot / script.bin ext4load 0 0x4600 scsi boot / uImage ext4load scsi 0 0x4900 boot/cubie2.dtb The first two and the last one are using a totally different syntax, only one of them can be correct, I suggest you check the uboot help/docs and experiment by hand on the uboot console before trying to construct a boot.scr. I've noticed 'ext4load' twice today, once in the mail above and once in the 'fedora on panda' blog post. What's stopping people from using the generic 'fsload' commands? Personally because I'd never heard of it ;-) Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] [PATCH v3 0/4] uboot sata support for sunxi platform
On Wed, 2014-03-12 at 06:53 -0700, Ezaul Zillmer wrote: Nothing appears scsi info Perhaps try increasing WAIT_MS_LINKUP some more (as per patch 3/4)? Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] [PATCH u-boot] cmd_gpio: fix warning with GPIO_OSCILLATE
On Sun, 2014-03-09 at 20:10 +0100, Olliver Schinagl wrote: Ian, sorry for not replying earlier, but isn't that a bug-fix against the generic U-Boot? In that case, it's probably wise to post it on the u-boot mailing list :) As Henrik says it's actually sunxi functionality. This particular fix is already in the sunxi tree I think. Ian. signature.asc Description: This is a digitally signed message part
Default initrd and fdt load behaviour on ARM (Was: Re: [linux-sunxi] Re: Not able to boot ramdisk on cubietruck)
Adding u-boot list since I think this is a general issue/question. On Sun, 2014-03-09 at 20:00 +0100, Olliver Schinagl wrote: On 03/09/14 16:18, tyler.ba...@linaro.org wrote: On Sunday, March 9, 2014 8:06:27 AM UTC-7, tyler...@linaro.org wrote: Hello, I am trying to boot the cubietruck with a minimal ramdisk. However, it seems to hang at Starting kernel... whenever I pass bootz a ramdisk load address. [...] Turl help me solve this in IRC. Needed to setenv initrd_high '0x' in case anyone else runs into this. The http://linux-sunxi.org/Mainline_Kernel_Howto did mention this ;) but thanks for helping remind people! Actually it mentions fdt_high but not initrd_high. But what is the reason for the default behaviour of bootz doing things which do not conform to linux/Documentation/arm/Booting and therefore is not going to boot? The docs recommend that DTB and initrd go just after the 128MB boundary. If either are loaded too high then the kernel will crash on boot, often in a tricky to diagnose way (I've chased it down more than once). It's especially annoying when one has carefully loaded everything at a suitable address in the first place ;-) Should the global default be changed to either 0x (no relocation) or to start-of-ram+256MB (which should satisfy the kernels requirements without needing logic changes to handle just after the 128MB boundary as a concept). Or is it intended that each board should opt-in to a sensible default via their default environment? Does bootm suffer the same? I suspect it does, at least for fdt (since initrd has a load addr in the u-boot header). Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] [PATCH v3 0/4] uboot sata support for sunxi platform
On Fri, 2014-03-07 at 08:44 -0800, Ezaul Zillmer wrote: You would have a repository with these updates where I could play with git, compile and test my cubieboard2 using kernel 3.14.rc5 git://gitorious.org/ijc/u-boot.git ahci-sunxi It is based on jwrdegoede/sunxi-next. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v3 0/4] uboot sata support for sunxi platform
This is the third version of my series to add support for AHCI to the sunxi platform. This uses the existing ahci platform support already present in u-boot. Most of the sunxi specific code comes from the Linux platform patches. Since last time I've cut out all the unused register #defines and made the Calxeda midway platform use the scsi_init hook (new patch). I've tested this only on cubietruck, but it is enabled for Olinino Micro, cubieboard and cubieboard2 based on inspection of the Linux DTS files. I have also now tested on Calxeda midway. Once again as requested I am also cross posting to the main uboot mailing list since the first two patches are generic and don't rely on sunxi stuff and so could go into mainline now. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v3 1/4] ahci-plat: Provide a weak scsi_init hook
This allow the platform to register the platform ahci device.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
In theory this could perhaps be used by highbank. I have access to a
Midway system (close enough for testing purposes, I think) but since
Calxeda has folded I'm not sure it is worth it, and I am not entirely
keen on reflashing firmware on the system I have access too (no safety
net)...
---
arch/arm/lib/board.c | 6 ++
drivers/block/ahci.c | 5 +
2 files changed, 11 insertions(+)
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 34f50b0..fe381a3 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -33,6 +33,7 @@
#include nand.h
#include onenand_uboot.h
#include mmc.h
+#include scsi.h
#include libfdt.h
#include fdtdec.h
#include post.h
@@ -593,6 +594,11 @@ void board_init_r(gd_t *id, ulong dest_addr)
mmc_initialize(gd-bd);
#endif
+#ifdef CONFIG_CMD_SCSI
+ puts(SCSI: );
+ scsi_init();
+#endif
+
#ifdef CONFIG_HAS_DATAFLASH
AT91F_DataflashInit();
dataflash_print_info();
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 0daad36..d5370fa 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -924,6 +924,11 @@ int ahci_init(u32 base)
err_out:
return rc;
}
+
+void __weak scsi_init(void)
+{
+}
+
#endif
/*
--
1.8.5.3
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[linux-sunxi] [PATCH v3 2/4] highbank: use scsi_init hook
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
board/highbank/highbank.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/board/highbank/highbank.c b/board/highbank/highbank.c
index 4b272c7..d42447d 100644
--- a/board/highbank/highbank.c
+++ b/board/highbank/highbank.c
@@ -51,17 +51,23 @@ int board_eth_init(bd_t *bis)
return rc;
}
-#ifdef CONFIG_MISC_INIT_R
-int misc_init_r(void)
+#ifdef CONFIG_SCSI_AHCI_PLAT
+void scsi_init(void)
{
- char envbuffer[16];
- u32 boot_choice;
u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
if (reg PWRDOM_STAT_SATA) {
ahci_init(HB_AHCI_BASE);
scsi_scan(1);
}
+}
+#endif
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+ char envbuffer[16];
+ u32 boot_choice;
boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) 0xff;
sprintf(envbuffer, bootcmd%d, boot_choice);
--
1.8.5.3
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[linux-sunxi] [PATCH v3 3/4] ahci: wait longer for link.
I have observed timeouts on a cubietruck.
The increase to 40ms is completely arbitrary and Works For Me(tm). I
couldn't find a good reference for how long you are supposed to wait,
although googling around it seems like tens of ms rather than single
digits is more common. I don't think there is any harm in waiting a bit
longer.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
drivers/block/ahci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index d5370fa..90a0719 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -41,7 +41,7 @@ u16 *ataid[AHCI_MAX_PORTS];
#define WAIT_MS_SPINUP 2
#define WAIT_MS_DATAIO 5000
#define WAIT_MS_FLUSH 5000
-#define WAIT_MS_LINKUP 4
+#define WAIT_MS_LINKUP 40
static inline u32 ahci_port_base(u32 base, u32 port)
{
--
1.8.5.3
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[linux-sunxi] [PATCH v3 4/4] ahci: provide sunxi SATA driver using AHCI platform framework
This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done for sun7i only since I don't have access to any other sunxi platforms with sata included. The bulk of the code is taken from the Linux ahci sunxi platform driver patches, adjusted for u-boot. This adds the PORT_DMA tweaks to the core driver, under a suitable ifdef. This option is enabled for Cubieboard, Cubieboard2, Cubietruck and Olinuxino Micro based on contents of Linux DTS files, including SATA power pin config taken from the DTS. All build tested, but runtime tested on cubietruck (FEL) only. Signed-off-by: Ian Campbell i...@hellion.org.uk --- v3: Drop unused register definitions v2: make AHCI configurable per board, enabled for cubieboard, cubieboard2, cubietruck and Olinuxino Micro. --- arch/arm/cpu/armv7/sunxi/clock.c | 4 +++ boards.cfg | 18 +- drivers/block/Makefile | 1 + drivers/block/ahci.c | 15 +++- drivers/block/ahci_sunxi.c | 77 include/ahci.h | 9 + include/configs/sunxi-common.h | 12 +++ 7 files changed, 126 insertions(+), 10 deletions(-) create mode 100644 drivers/block/ahci_sunxi.c diff --git a/arch/arm/cpu/armv7/sunxi/clock.c b/arch/arm/cpu/armv7/sunxi/clock.c index 06bc283..2cc274b 100644 --- a/arch/arm/cpu/armv7/sunxi/clock.c +++ b/arch/arm/cpu/armv7/sunxi/clock.c @@ -51,6 +51,10 @@ static void clock_init_safe(void) #ifdef CONFIG_SUN7I writel(0x1 6 | readl(ccm-ahb_gate0), ccm-ahb_gate0); writel(0x1 31 | readl(ccm-pll6_cfg), ccm-pll6_cfg); +#ifdef CONFIG_SCSI_AHCI_SUNXI + writel(0x1 25 |readl(ccm-ahb_gate0), ccm-ahb_gate0); + writel(0x1 14 | readl(ccm-pll6_cfg), ccm-pll6_cfg); +#endif #endif } #endif diff --git a/boards.cfg b/boards.cfg index 100acc8..987bc54 100644 --- a/boards.cfg +++ b/boards.cfg @@ -354,8 +354,8 @@ Active arm armv7 sunxi - sunxi Active arm armv7 sunxi - sunxi A13-OLinuXinoM sun5i:A13_OLINUXINOM,SPL,NO_AXP,STATUSLED=201,CONS_INDEX=2 - Active arm armv7 sunxi - sunxi A13-OLinuXinoM_FEL sun5i:A13_OLINUXINOM,SPL_FEL,NO_AXP,STATUSLED=201,CONS_INDEX=2 - Active arm armv7 sunxi - sunxi A13_MID sun5i:A13_MID,SPL,CONS_INDEX=2 - -Active arm armv7 sunxi - sunxi A20-OLinuXino_MICRO sun7i:A20_OLINUXINO_M,CONS_INDEX=1,STATUSLED=226,SPL,SUNXI_EMAC - -Active arm armv7 sunxi - sunxi A20-OLinuXino_MICRO_FEL sun7i:A20_OLINUXINO_M,CONS_INDEX=1,STATUSLED=226,SPL_FEL,SUNXI_EMAC - +Active arm armv7 sunxi - sunxi A20-OLinuXino_MICRO sun7i:A20_OLINUXINO_M,CONS_INDEX=1,STATUSLED=226,SPL,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPB(8) - +Active arm armv7 sunxi - sunxi A20-OLinuXino_MICRO_FEL sun7i:A20_OLINUXINO_M,CONS_INDEX=1,STATUSLED=226,SPL_FEL,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPB(8) - Active arm armv7 sunxi - sunxi Auxtek-T003 sun5i:AUXTEK_T003,SPL,AXP152_POWER,STATUSLED=34 - Active arm armv7 sunxi - sunxi Auxtek-T004 sun5i:AUXTEK_T004,SPL,AXP152_POWER,STATUSLED=34 - Active arm armv7 sunxi - sunxi ba10_tv_box sun4i:BA10_TV_BOX,SPL,SUNXI_EMAC - @@ -363,13 +363,13 @@ Active arm armv7 sunxi - sunxi Active arm armv7 sunxi - sunxi Coby_MID8042 sun4i:COBY_MID8042,SPL - Active arm armv7
Re: [linux-sunxi] [PATCH v3 0/4] uboot sata support for sunxi platform
On Fri, 2014-03-07 at 01:19 +, Ian Campbell wrote: This is the third version of my series to add support for AHCI to the sunxi platform. This uses the existing ahci platform support already present in u-boot. Most of the sunxi specific code comes from the Linux platform patches. Since last time I've cut out all the unused register #defines and made the Calxeda midway platform use the scsi_init hook (new patch). I've tested this only on cubietruck, but it is enabled for Olinino Micro, cubieboard and cubieboard2 based on inspection of the Linux DTS files. I have also now tested on Calxeda midway. Once again as requested I am also cross posting to the main uboot mailing list since the first two patches are generic and don't rely on Oops: ^three That is: ahci-plat: Provide a weak scsi_init hook highbank: use scsi_init hook ahci: wait longer for link. are all suitable for main line. sunxi stuff and so could go into mainline now. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 0/3] uboot sata support for sunxi platform
This is the second version of my series to add support for AHCI to the sunxi platform. This uses the existing ahci platform support already present in u-boot. Most of the sunxi specific code comes from the Linux platform patches. As requested I am also cross posting to the main uboot mailing list since the first two patches are generic and don't rely on sunxi stuff and so could go into mainline now. I've tested this only on cubietruck, but it is enabled for Olinino Micro, cubieboard and cubieboard2 based on inspection of the Linux DTS files. Since last time I've made this a per-board option rather than enabling for all sunxi platforms, some of which may not have a SATA connector, or even an AHCI controller in the processor at all. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
[linux-sunxi] [PATCH v2 1/3] ahci-plat: Provide a weak scsi_init hook
This allow the platform to register the platform ahci device.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
In theory this could perhaps be used by highbank. I have access to a
Midway system (close enough for testing purposes, I think) but since
Calxeda has folded I'm not sure it is worth it, and I am not entirely
keen on reflashing firmware on the system I have access too (no safety
net)...
---
arch/arm/lib/board.c | 6 ++
drivers/block/ahci.c | 5 +
2 files changed, 11 insertions(+)
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 34f50b0..fe381a3 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -33,6 +33,7 @@
#include nand.h
#include onenand_uboot.h
#include mmc.h
+#include scsi.h
#include libfdt.h
#include fdtdec.h
#include post.h
@@ -593,6 +594,11 @@ void board_init_r(gd_t *id, ulong dest_addr)
mmc_initialize(gd-bd);
#endif
+#ifdef CONFIG_CMD_SCSI
+ puts(SCSI: );
+ scsi_init();
+#endif
+
#ifdef CONFIG_HAS_DATAFLASH
AT91F_DataflashInit();
dataflash_print_info();
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 0daad36..d5370fa 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -924,6 +924,11 @@ int ahci_init(u32 base)
err_out:
return rc;
}
+
+void __weak scsi_init(void)
+{
+}
+
#endif
/*
--
1.8.5.3
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[linux-sunxi] [PATCH v2 2/3] ahci: wait longer for link.
I have observed timeouts on a cubietruck.
The increase to 40ms is completely arbitrary and Works For Me(tm). I
couldn't find a good reference for how long you are supposed to wait,
although googling around it seems like tens of ms rather than single
digits is more common. I don't think there is any harm in waiting a bit
longer.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
drivers/block/ahci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index d5370fa..90a0719 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -41,7 +41,7 @@ u16 *ataid[AHCI_MAX_PORTS];
#define WAIT_MS_SPINUP 2
#define WAIT_MS_DATAIO 5000
#define WAIT_MS_FLUSH 5000
-#define WAIT_MS_LINKUP 4
+#define WAIT_MS_LINKUP 40
static inline u32 ahci_port_base(u32 base, u32 port)
{
--
1.8.5.3
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Re: [linux-sunxi] [PATCH u-boot 2/3] ahci: wait longer for link.
On Wed, 2014-02-12 at 11:41 +0100, Marek Vasut wrote: Just make sure you don't bring in another DWC AHCI driver ;-) I think we have three already and someone should start looking into cleaning this up too. FWIW I was just reusing the existing platform AHCI stuff, no new driver here ;-). Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
Re: [linux-sunxi] [PATCH u-boot 2/3] ahci: wait longer for link.
On Wed, 2014-02-12 at 14:19 +0100, Henrik Nordström wrote: ons 2014-02-12 klockan 10:29 + skrev Ian Campbell: What I've thought of doing is creating a rebasing git branch based on the current mainline base used in the sunxi branch. The contents of the mainlining branch would be a series of cleaned up commits suitable for sending upstream. We do have a sunxi-patchqueu branch in the u-boot-sunxi repository where the changes are being bundled up in suitable chunks. I wasn't aware of that branch. I'll check it out. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
Re: [linux-sunxi] [PATCH 0/3] uboot sata support
On Fri, 2014-02-07 at 17:36 +0100, Hans de Goede wrote: Hi, On 02/07/2014 05:14 PM, Ian Campbell wrote: This is the result of my afternoons hacking at the urlab hacklab in Brussels before FOSDEM, thanks for hosting us guys! This uses the existing ahci platform support in u-boot. Most of the siunxi specific code comes from the Linux platform patches. I've tested this only on cubietruck. Hmm, I notice that you unconditionally define CONFIG_SUNXI_AHCI for all sunxi boards. This is very wrong for sun5i since there never is an AHCI controller there, wrong for sun4i since you've not added any sata clock setup for sun4i, and somewhat wrong for sun7i since there enabling it only makes sense on boards which have a sata connector. Damn, I knew there was something else I meant to go back and cleanup. Can you please respin this patch-set and make the enabling of AHCI done something through boards.cfg ? Sure! Ian. With that fixed I think it looks good, and if there are no objections I'll happily merge a fixed version into u-boot-sunxi. Thanks, Hans -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
Re: [linux-sunxi] [PATCH 2/3] ahci: wait longer for link.
On Sun, 2014-02-09 at 13:50 +0100, Oliver Schinagl wrote:
On 02/07/14 17:15, Ian Campbell wrote:
-#define WAIT_MS_LINKUP 4
+#define WAIT_MS_LINKUP 40
wont this affect every platform?
Yes. I figured that since this was a timeout it was pretty harmless to
increase it, the only downside seems to be that if the AHCI is actually
broken you wait a bit longer before figuring that out.
Although I didn't find a good reference 4ms did seem short compared with
what I think Linux was doing (but it's all a bit async as well as
abstracted into common infra there so I may not be following it
correctly) and what other google'd up bits and bobs showed -- they seems
to be more in the 100-150ms range.
I don't know what u-boot's rules are
with regards to that, as it will come as 'a' patch in a big series when
we upstream it ...
I was a bit torn over what to do with this and the first patch (Provide
a weak scsi_init hook) since they are both essentially upstream fodder
already _except_ that they wouldn't be being presented at the same time
as a consumer of the change.
I have a feeling that for upstreaming these sorts of changes might need
to be cherry-picked into their own changeset, the massive patch approach
doesn't seem likely to succeed even if it only touches sunxi code, but
including random changes to the common code in that patch is sure to
fail IMHO. I was looking at the mainline vs sunxi diff and there are a
few other similar changes which would need pulling out too.
oliver
P.S. Awesome job :D and was nice to meet you! even though it was very
briefly.
Likewise!
static inline u32 ahci_port_base(u32 base, u32 port)
{
--
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[linux-sunxi] [PATCH 0/3] uboot sata support
This is the result of my afternoons hacking at the urlab hacklab in Brussels before FOSDEM, thanks for hosting us guys! This uses the existing ahci platform support in u-boot. Most of the siunxi specific code comes from the Linux platform patches. I've tested this only on cubietruck. Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
[linux-sunxi] [PATCH 1/3] ahci-plat: Provide a weak scsi_init hook
This allow the platform to register the platform ahci device.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
In theory this could go into mainline now and perhaps be used by
highbank.
---
arch/arm/lib/board.c | 6 ++
drivers/block/ahci.c | 5 +
2 files changed, 11 insertions(+)
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 34f50b0..fe381a3 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -33,6 +33,7 @@
#include nand.h
#include onenand_uboot.h
#include mmc.h
+#include scsi.h
#include libfdt.h
#include fdtdec.h
#include post.h
@@ -593,6 +594,11 @@ void board_init_r(gd_t *id, ulong dest_addr)
mmc_initialize(gd-bd);
#endif
+#ifdef CONFIG_CMD_SCSI
+ puts(SCSI: );
+ scsi_init();
+#endif
+
#ifdef CONFIG_HAS_DATAFLASH
AT91F_DataflashInit();
dataflash_print_info();
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 0daad36..d5370fa 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -924,6 +924,11 @@ int ahci_init(u32 base)
err_out:
return rc;
}
+
+void __weak scsi_init(void)
+{
+}
+
#endif
/*
--
1.8.5.3
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[linux-sunxi] [PATCH 3/3] ahci: provide sunxi SATA driver using AHCI platform framework
This enables the necessary clocks, in AHB0 and in PLL6_CFG. The bulk of the code is taken from the Linux ahci sunxi platform driver patches, adjusted for u-boot. This adds the PORT_DMA tweaks to the core driver, under a suitable ifdef. Tested on and enabled for the cubietruck. Signed-off-by: Ian Campbell i...@hellion.org.uk --- arch/arm/cpu/armv7/sunxi/clock.c | 4 ++ boards.cfg | 4 +- drivers/block/Makefile | 1 + drivers/block/ahci.c | 15 ++- drivers/block/ahci_sunxi.c | 95 include/ahci.h | 9 include/configs/sunxi-common.h | 10 + 7 files changed, 135 insertions(+), 3 deletions(-) create mode 100644 drivers/block/ahci_sunxi.c diff --git a/arch/arm/cpu/armv7/sunxi/clock.c b/arch/arm/cpu/armv7/sunxi/clock.c index 06bc283..2cc274b 100644 --- a/arch/arm/cpu/armv7/sunxi/clock.c +++ b/arch/arm/cpu/armv7/sunxi/clock.c @@ -51,6 +51,10 @@ static void clock_init_safe(void) #ifdef CONFIG_SUN7I writel(0x1 6 | readl(ccm-ahb_gate0), ccm-ahb_gate0); writel(0x1 31 | readl(ccm-pll6_cfg), ccm-pll6_cfg); +#ifdef CONFIG_SCSI_AHCI_SUNXI + writel(0x1 25 |readl(ccm-ahb_gate0), ccm-ahb_gate0); + writel(0x1 14 | readl(ccm-pll6_cfg), ccm-pll6_cfg); +#endif #endif } #endif diff --git a/boards.cfg b/boards.cfg index 100acc8..c94d3f2 100644 --- a/boards.cfg +++ b/boards.cfg @@ -366,8 +366,8 @@ Active arm armv7 sunxi - sunxi Active arm armv7 sunxi - sunxi Cubieboard sun4i:CUBIEBOARD,SPL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245 - Active arm armv7 sunxi - sunxi Cubieboard2 sun7i:CUBIEBOARD2,SPL,SUNXI_GMAC,STATUSLED=244,STATUSLED1=245,FAST_MBUS - Active arm armv7 sunxi - sunxi Cubieboard2_FEL sun7i:CUBIEBOARD2,SPL_FEL,SUNXI_GMAC,STATUSLED=244,STATUSLED1=245,FAST_MBUS - -Active arm armv7 sunxi - sunxi Cubietruck sun7i:CUBIETRUCK,SPL,SUNXI_GMAC,RGMII,STATUSLED=245,STATUSLED1=244,STATUSLED2=235,STATUSLED3=231,FAST_MBUS - -Active arm armv7 sunxi - sunxi Cubietruck_FEL sun7i:CUBIETRUCK,SPL_FEL,SUNXI_GMAC,RGMII,STATUSLED=245,STATUSLED1=244,STATUSLED2=235,STATUSLED3=231,FAST_MBUS - +Active arm armv7 sunxi - sunxi Cubietruck sun7i:CUBIETRUCK,SPL,SUNXI_GMAC,RGMII,STATUSLED=245,STATUSLED1=244,STATUSLED2=235,STATUSLED3=231,FAST_MBUS,SATAPWR=SUNXI_GPH(12) - +Active arm armv7 sunxi - sunxi Cubietruck_FEL sun7i:CUBIETRUCK,SPL_FEL,SUNXI_GMAC,RGMII,STATUSLED=245,STATUSLED1=244,STATUSLED2=235,STATUSLED3=231,FAST_MBUS,SATAPWR=SUNXI_GPH(12) - Active arm armv7 sunxi - sunxi Cubieboard_512 sun4i:CUBIEBOARD_512,SPL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245 - Active arm armv7 sunxi - sunxi Cubieboard_FEL sun4i:CUBIEBOARD,SPL_FEL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245 - Active arm armv7 sunxi - sunxi DNS_M82 sun4i:DNS_M82,SPL - diff --git a/drivers/block/Makefile b/drivers/block/Makefile index 4e94378..e77188b 100644 --- a/drivers/block/Makefile +++ b/drivers/block/Makefile @@ -6,6 +6,7 @@ # obj-$(CONFIG_SCSI_AHCI) += ahci.o +obj-$(CONFIG_SCSI_AHCI_SUNXI) += ahci_sunxi.o obj-$(CONFIG_ATA_PIIX) += ata_piix.o obj-$(CONFIG_DWC_AHSATA) += dwc_ahsata.o obj-$(CONFIG_FSL_SATA) += fsl_sata.o diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c index 90a0719..32be726 100644 --- a/drivers/block/ahci.c +++ b/drivers/block/ahci.c @@ -213,6 +213,13 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent) msleep(500); } +#ifdef CONFIG_SCSI_AHCI_SUNXI + tmp = readl(port_mmio + PORT_DMA); + tmp = ~PORT_DMA_SETUP_MASK; + tmp |= PORT_DMA_SETUP_INIT; + writel_with_flush(tmp
[linux-sunxi] [PATCH 2/3] ahci: wait longer for link.
I have observed timeouts on a cubietruck.
The increase to 40ms is completely arbitrary and Works For Me(tm). I
couldn't find a good reference for how long you are supposed to wait.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
drivers/block/ahci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index d5370fa..90a0719 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -41,7 +41,7 @@ u16 *ataid[AHCI_MAX_PORTS];
#define WAIT_MS_SPINUP 2
#define WAIT_MS_DATAIO 5000
#define WAIT_MS_FLUSH 5000
-#define WAIT_MS_LINKUP 4
+#define WAIT_MS_LINKUP 40
static inline u32 ahci_port_base(u32 base, u32 port)
{
--
1.8.5.3
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[linux-sunxi] [PATCH u-boot] sunxi: correct CLK_DLY configuration loop
It seems that the intention was to index the dqs_dly array with dqs_i and not
clk_i. Using clk_i means that dqs_i is unused in the loop and also causes us to
run off the end of the dqs_dly array resulting in:
In file included from dram.c:34:0:
dram.c: In function ‘dramc_init’:
dram.c:314:15: warning: iteration 7u invokes undefined behavior
[-Waggressive-loop-optimizations]
(dqs_dly[clk_i] 0x4f) 14);
(clk_i runs to 15, dqs_i to 7 and dqs_dly[] has 8 entries)
I have not run this on actual hardware. I'm not sure when it is even used
because it is gated on para-tpr3 (0x1 31) and AFAICT all
board/sunxi/dram_* files currently in the tree set trp3 to zero.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/dram.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/dram.c b/arch/arm/cpu/armv7/sunxi/dram.c
index 94a3657..4d570a0 100644
--- a/arch/arm/cpu/armv7/sunxi/dram.c
+++ b/arch/arm/cpu/armv7/sunxi/dram.c
@@ -311,7 +311,7 @@ static int dramc_scan_dll_para(void)
for (cr_i = 1; cr_i 5; cr_i++) {
clrsetbits_le32(dram-dllcr[cr_i],
0x4f 14,
- (dqs_dly[clk_i] 0x4f) 14);
+ (dqs_dly[dqs_i] 0x4f) 14);
}
udelay(2);
if (dramc_scan_readpipe() == 0)
--
1.8.5.3
--
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[linux-sunxi] [PATCH u-boot] cmd_gpio: fix warning with GPIO_OSCILLATE
In do_gpio value is not initialised in the GPIO_OSCILLATE case:
cmd_gpio.c: In function ‘do_gpio’:
cmd_gpio.c:92:2: warning: ‘value’ may be used uninitialized in this function
[-Wmaybe-uninitialized]
return value;
^
Returning 0 in this case seems fairly logical.
Signed-off-by: Ian Campbell i...@hellion.org.uk
Cc: Henrik Nordstrom hen...@henriknordstrom.net
---
common/cmd_gpio.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/common/cmd_gpio.c b/common/cmd_gpio.c
index d551415..a43e89e 100644
--- a/common/cmd_gpio.c
+++ b/common/cmd_gpio.c
@@ -75,6 +75,7 @@ static int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char
* const argv[])
gpio_set_value(gpio, i1);
}
gpio_direction_input(gpio);
+ value = 0;
} else {
switch (sub_cmd) {
case GPIO_SET:value = 1; break;
--
1.8.5.3
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Re: [linux-sunxi] [PATCH] tools: correct proftool build rule
On Fri, 2014-01-31 at 17:07 +, Ian Campbell wrote: The incorrect substitution made it rebuild every time. I sent this to linux-sunxi@ instead of the u-boot list by mistake. Sorry! Will resend to the correct place shortly... -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
[linux-sunxi] [PATCH] sunxi: dts: add a note that memory size is adjusted by boot loader.
I had to spend a couple of minutes proving to myself that this was the case on
cubietruck, so add a comment to save the next guy some effort.
Signed-off-by: Ian Campbell i...@hellion.org.uk
Cc: Maxime Ripard maxime.rip...@free-electrons.com
Cc: Hans de Goede hdego...@redhat.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-sunxi@googlegroups.com
---
This patch applies cleanly against v3.13 and Hans' sunxi-devel branch.
A plausible alternative would be to pull the memory node out of the dtsi files
and into the board specific files. I didn't go straight to that since I'd have
to research all the various boards ;-)
I considered maing it reg = 0 0 but decided that having some sort of least
common denominator would let things work even if the bootloader were broken.
---
arch/arm/boot/dts/sun4i-a10.dtsi |1 +
arch/arm/boot/dts/sun5i-a10s.dtsi |1 +
arch/arm/boot/dts/sun5i-a13.dtsi |1 +
arch/arm/boot/dts/sun6i-a31.dtsi |1 +
arch/arm/boot/dts/sun7i-a20.dtsi |1 +
5 files changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 3e60883..9ba0beb 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -30,6 +30,7 @@
};
memory {
+ /* 1GB by default, will be updated by U-Boot */
reg = 0x4000 0x8000;
};
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi
b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 0376c50..d12ed7e 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -27,6 +27,7 @@
};
memory {
+ /* 512MB by default, will be updated by U-Boot */
reg = 0x4000 0x2000;
};
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index b81aeb9..6f8bfd9 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -27,6 +27,7 @@
};
memory {
+ /* 512MB by default, will be updated by U-Boot */
reg = 0x4000 0x2000;
};
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 3f6f07b..bcbef9a 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -46,6 +46,7 @@
};
memory {
+ /* 2GB by default, will be updated by U-Boot */
reg = 0x4000 0x8000;
};
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 907cfcc..658e74b 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -38,6 +38,7 @@
};
memory {
+ /* 1GB by default, will be updated by U-Boot */
reg = 0x4000 0x8000;
};
--
1.7.10.4
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[linux-sunxi] Re: [PATCH] sunxi: dts: add a note that memory size is adjusted by boot loader.
On Fri, 2014-01-24 at 16:31 +0100, Hans de Goede wrote:
Hi,
On 01/24/2014 03:14 PM, Ian Campbell wrote:
I had to spend a couple of minutes proving to myself that this was the case
on
cubietruck, so add a comment to save the next guy some effort.
Seems like a good idea to me, one small nitpick though see comments inline.
Signed-off-by: Ian Campbell i...@hellion.org.uk
Cc: Maxime Ripard maxime.rip...@free-electrons.com
Cc: Hans de Goede hdego...@redhat.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-sunxi@googlegroups.com
---
This patch applies cleanly against v3.13 and Hans' sunxi-devel branch.
A plausible alternative would be to pull the memory node out of the dtsi
files
and into the board specific files. I didn't go straight to that since I'd
have
to research all the various boards ;-)
That won't help, some boards ie the original cubieboard and the mele-a1000
come
in both 512 MB and 1024 MB versions, and I don't think we want to start
maintaining
2 different dts files just for that.
I didn't mean to suggest that u-boot should stop updating the dtb, so
e.g. I would have put a 512MB reg in the cubieboard dts, with a similar
comment.
But in cases where there is only one variant (e.g. the cubietruck) I'd
have put a 2GB reg and no comment, even though u-boot would in reality
rewrite the 2GB there.
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi
b/arch/arm/boot/dts/sun4i-a10.dtsi
index 3e60883..9ba0beb 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -30,6 +30,7 @@
};
memory {
+ /* 1GB by default, will be updated by U-Boot */
reg = 0x4000 0x8000;
};
The comment says 1GB, but the range says 2GB, note 2GB is consistent with
what the
datasheet claims as max RAM.
Oops, I must have missed that.
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi
b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 0376c50..d12ed7e 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -27,6 +27,7 @@
};
memory {
+ /* 512MB by default, will be updated by U-Boot */
reg = 0x4000 0x2000;
};
This seems wrong (copy paste from A13 error) I've a10s boards with 1G, and
the data
sheet claims 2GB max RAM.
I had expected these values to contain the minimum -- i.e. the one which
would work everywhere, so it would work if for some reason u-boot wasn't
updating correctly. Better to boot with only some of the RAM than to
crash randomly.
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi
b/arch/arm/boot/dts/sun7i-a20.dtsi
index 907cfcc..658e74b 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -38,6 +38,7 @@
};
memory {
+ /* 1GB by default, will be updated by U-Boot */
reg = 0x4000 0x8000;
};
The comment says 1GB, but the range says 2GB, note 2GB is consistent with
what the
datasheet claims as max RAM.
Huh, that's the second time I got the wrong one, and I swear I was
paying attention to it as well!
Ian.
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Re: [linux-sunxi] Doing some sunxi hacking in Brussels the Friday before Fosdem ?
On Wed, 2014-01-22 at 20:16 +0100, Hans de Goede wrote: I will be at the urlab at around 12:00 (if I make my train connection otherwise 13:00), it is fine if you decide to show up announced, I plan to stay till 20:00 and then go out for dinner. I hope to see you there. I think I should be there mid-late afternoon, my other potential commitments aren't happening AFAICT. I was thinking about hacking on SATA support for u-boot, it doesn't seem to exist yet -- do you know of anyone who is working on that? Since there is already a libahci in u-boot it ought to be something which can be achieved in a few hours on the train + a few hours of hack session in Brussels. At least I hope it doesn't turn out to be quite so epic as the upstream Linux support ;-) Ian. -- You received this message because you are subscribed to the Google Groups linux-sunxi group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
