ailable on dwc3-improve-isoc-endpoints in my k.org
tree. Test reports would be VERY, VERY, VERY welcome. Please give this a
go so we avoid regressions on v4.18.
Cheers
Felipe Balbi (38):
usb: dwc3: gadget: pre-issue Start Transfer for Interrupt EPs too
usb: dwc3: gadget: XferNotReady is Isoc-
We don't use XferNotReady for anything other than Default Control
Pipe, which is handled in ep0.c, and Isochronous endpoints. Let's make
that clear in the code.
Signed-off-by: Felipe Balbi
---
drivers/usb/dwc3/gadget.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
Interrupt endpoints behave much like Bulk endpoints with the exception
that they are periodic. We can pre-issue Start Transfer exactly as we
do for Bulk endpoints.
While at that, remove one trailing blank line which is unnecessary.
Signed-off-by: Felipe Balbi
---
drivers/usb/dwc3/gadget.c | 4
Now that we're making sure we don't have XferComplete events, we can
rename this function to what it actually handles:
dwc3_gadget_endpoint_transfer_in_progress()
Signed-off-by: Felipe Balbi
---
drivers/usb/dwc3/gadget.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
Hi,
shubhrajyoti.da...@gmail.com writes:
> From: Shubhrajyoti Datta
>
> Currently the driver depends on the bootloader to enable the clocks.
> Add support for clocking. The patch enables the clock at probe and
> disables them at remove.
>
> Signed-off-by: Shubhrajyoti Datta
which platform us
Hi again,
Felipe Balbi writes:
> Krzysztof Opasiak writes:
>>>>>>>> A few advantages over a couple options I've considered are that this
>>>>>>>> mostly
>>>>>>>> reuses existing functionalities and won'
Hi,
Krzysztof Opasiak writes:
>>> A few advantages over a couple options I've considered are that this
>>> mostly
>>> reuses existing functionalities and won't affect users that haven't
>>> enabled
>>> it. Please let me know of any feedback on the design or any possible
>>>
Hi,
Krzysztof Opasiak writes:
> On 06.04.2018 12:18, Felipe Balbi wrote:
>>
>> Hi,
>>
>> Krzysztof Opasiak writes:
>>
>>
>>
>>>>> A few advantages over a couple options I've considered are that this
>>>>>
Hi,
Krzysztof Opasiak writes:
>>> A few advantages over a couple options I've considered are that this mostly
>>> reuses existing functionalities and won't affect users that haven't enabled
>>> it. Please let me know of any feedback on the design or any possible
>>> implementation issues.
>>
Hi Jerry,
Jerry Zhang writes:
> Hi all,
>
> I've been looking for a way to handle custom device targeted control
> requests from userspace. This would allow us to move away from needing
> kernel patches to implement
> https://source.android.com/devices/accessories/aoa. It seems like we are
> clo
Hi,
tnim...@codeaurora.org writes:
> On 2018-04-05 11:24, Felipe Balbi wrote:
>> Hi,
>>
>> Greg KH writes:
>>> On Wed, Apr 04, 2018 at 05:14:50PM +0530, tnim...@codeaurora.org
>>> wrote:
>>>> Hi Oliver/Greg,
>>>>
>>>&g
Hi,
it would help if you would Cc XHCI's maintainer :-)
tnim...@codeaurora.org writes:
> On 2018-04-04 19:28, Greg KH wrote:
>> On Wed, Apr 04, 2018 at 06:41:41PM +0530, tnim...@codeaurora.org wrote:
>>> On 2018-04-04 18:07, Greg KH wrote:
>>> > On Wed, Apr 04, 2018 at 05:14:50PM +0530, tnim...
Hi,
Greg KH writes:
> On Wed, Apr 04, 2018 at 05:14:50PM +0530, tnim...@codeaurora.org wrote:
>> Hi Oliver/Greg,
>>
>> I am able to duplicated the UAS issue on 4.16 as well.
>> The behavior is same new usb device detects and reset after aprox 30
>> sec(SD_TIMEOUT)
>> Logs are already shared bel
Hi,
Masahiro Yamada writes:
>>> Each DWC3 instance is connected with
>>> multiple HS PHYs and multiple SS PHYs,
>>> depending on the number of ports.
>>
>> in that case, you shouldn't need dwc3 at all. A Host-only dwc3 is xHCI
>> compliant. If you really don't have the gadget block, there's no n
Hi,
Masahiro Yamada writes:
>>> Each DWC3 instance is connected with
>>> multiple HS PHYs and multiple SS PHYs,
>>> depending on the number of ports.
>>
>> in that case, you shouldn't need dwc3 at all. A Host-only dwc3 is xHCI
>> compliant. If you really don't have the gadget block, there's no n
Hi,
Masahiro Yamada writes:
> 2018-04-04 14:36 GMT+09:00 Felipe Balbi :
>>
>> Hi,
>>
>> Masahiro Yamada writes:
>>> Currently, DWC3 core IP (drivers/usb/dwc3/core.c)
>>> can take only one PHY phandle for each of SS, HS.
>>> (phy-names DT pr
Hi,
Masahiro Yamada writes:
> 2018-04-04 14:36 GMT+09:00 Felipe Balbi :
>>
>> Hi,
>>
>> Masahiro Yamada writes:
>>> Currently, DWC3 core IP (drivers/usb/dwc3/core.c)
>>> can take only one PHY phandle for each of SS, HS.
>>> (phy-names DT pr
Hi,
Masahiro Yamada writes:
> Currently, DWC3 core IP (drivers/usb/dwc3/core.c)
> can take only one PHY phandle for each of SS, HS.
> (phy-names DT property is "usb2-phy" and "usb3-phy" for each)
We never had any other requirements :-)
> The DWC3 core IP is provided by Synopsys,
> but some SoC
Hi,
Masahiro Yamada writes:
> Currently, DWC3 core IP (drivers/usb/dwc3/core.c)
> can take only one PHY phandle for each of SS, HS.
> (phy-names DT property is "usb2-phy" and "usb3-phy" for each)
We never had any other requirements :-)
> The DWC3 core IP is provided by Synopsys,
> but some SoC
Hi,
Alan Stern writes:
>> Alan Stern writes:
>> > On Mon, 26 Mar 2018, Felipe Balbi wrote:
>> >
>> >> Mention that ->complete() should never be called from within
>> >> usb_ep_queue().
>> >>
>> >> Signed-off-by: Fe
ted, and this has always been the
> intention for the gadget API. But until now, documentation seems to
> have been lacking.
>
> Signed-off-by: Alan Stern
>
> ---
Greg, I have this queued up for v4.18 already, but if you wanna take it
forward on v4.17 it's fine by me.
Acked-by:
Hi,
Benjamin Herrenschmidt writes:
> +static int ast_vhub_rep_desc(struct ast_vhub_ep *ep,
> + u8 desc_type, u16 len)
> +{
> + const void *desc;
> + size_t dsize;
> +
> + EPDBG(ep, "GET_DESCRIPTOR(type:%d)\n", desc_type);
> + switch(desc_type) {
> +
Hi,
Alan Stern writes:
>> I agree with Alan that the spinlock must be dropped before calling
>> usb_ep_queue. An example can be found in the ep0_queue function of
>> the f_mass_storage driver.
>
> Thanks for the note of support, but you must be looking at a different
> version of the f_mass_sto
Hi,
Alan Stern writes:
> On Mon, 26 Mar 2018, Felipe Balbi wrote:
>
>> Mention that ->complete() should never be called from within
>> usb_ep_queue().
>>
>> Signed-off-by: Felipe Balbi
>> ---
>> drivers/usb/gadget/udc/core.c | 3 +++
>>
e to failed Start Transfer command. This is,
anyway, a theoretical situation because dwc3 currently uses "No
Response Update Transfer" command for Bulk and Interrupt endpoints.
It's still good to make this case impossible to happen even if the "No
Reponse Update Transfer&
Mention that ->complete() should never be called from within
usb_ep_queue().
Signed-off-by: Felipe Balbi
---
drivers/usb/gadget/udc/core.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/usb/gadget/udc/core.c b/drivers/usb/gadget/udc/core.c
index 50988b21a21b..842814bc0e4f 100
Hi,
Greg KH writes:
> For some reason, Tuba can't seem to post to linux-usb@vger, so I'm
> forwarding on his message below.
>
> Felipe, sorry if you have seen this 3+ times already :(
>
> thanks,
>
> greg k-h
>
> On Fri, Mar 23, 2018 at 01:05:28PM +, Yavuz, Tuba wrote:
>>
>> Hello,
>>
>> I
(please configure your email client to break lines at 80 columns ;-)
Hi,
Anurag Kumar Vulisha writes:
> Hi Felipe,
>
> Thanks for reviewing the patch , please find my comments inline
no issues :-)
>>Anurag Kumar Vulisha writes:
>>> This patch fixes two issues
>>>
>>> 1. The code logic in dwc
(please configure your email client to break lines at 80 columns ;-)
Hi,
Anurag Kumar Vulisha writes:
> Hi Felipe,
>
> Thanks for reviewing the patch , please find my comments inline
no issues :-)
>>Anurag Kumar Vulisha writes:
>>> This patch fixes two issues
>>>
>>> 1. The code logic in dwc
;genereted" -> "generated"
Dmitry Osipenko (1):
usb: phy: tegra: Increase PHY clock stabilization timeout
Fabio Estevam (1):
usb: phy: mxs: Staticize mxs_charger_secondary_detection()
Felipe Balbi (2):
usb: dwc3: debugfs: Re-use DEFINE_SHOW_ATTRIBUTE() macro
Hi,
Benjamin Herrenschmidt writes:
> The Aspeed BMC SoCs support a "virtual hub" function. It provides some
> HW support for a top-level USB2 hub behind which sit 5 gadget "ports".
>
> This driver adds support for the full functionality, emulating the
> hub standard requests and exposing 5 UDC
Hi,
Greg Kroah-Hartman writes:
> On Thu, Mar 22, 2018 at 11:22:24AM +0100, Linus Walleij wrote:
>> The AB8540 was an evolved version of the AB8500, but it was never
>> mass produced or put into products, only reference designs exist.
>> The upstream support was never completed and it is unlikely
Minas Harutyunyan writes:
> Hi Filipe,
>
> On 3/17/2018 1:08 PM, Minas Harutyunyan wrote:
>> This series fully update existing ISOC DDMA flow which initially based on
>> 2 descriptor chains. Switching between desc chains performing based on BNA
>> interrupt. Because of BNA interrupt few packets c
Hi,
Benjamin Herrenschmidt writes:
> On Mon, 2018-03-19 at 12:56 +0200, Felipe Balbi wrote:
>> >> do you really need this to be safe? You don't seem to be modifying
>> >> ep_list here.
>> >
>> > Yes, ep->dispose() may do just that. In my Aspe
Hi,
Joel Pepper writes:
> - Add bFrameIndex as a UVCG_FRAME_ATTR_RO for each frame size.
> - Automatically assign ascending bFrameIndex to each frame in a format.
>
> Before all "bFrameindex" attributes were set to "1" with no way to
> configure the gadget otherwise. This resulted in the host al
If building a kernel without FTRACE but with TRACING, dwc3.ko fails to
link due to missing trace events. Fix this by using the correct
Kconfig symbol on Makefile.
Reported-by: Randy Dunlap
Signed-off-by: Felipe Balbi
---
drivers/usb/dwc3/Makefile | 2 +-
1 file changed, 1 insertion(+), 1
Hi,
Randy Dunlap writes:
> On 03/21/2018 01:25 AM, Stephen Rothwell wrote:
>> Hi all,
>>
>> Changes since 20180320:
>>
>
>
> on i386:
>
> ERROR: "__tracepoint_dwc3_gadget_generic_cmd" [drivers/usb/dwc3/dwc3.ko]
> undefined!
> ERROR: "__tracepoint_dwc3_ep_queue" [drivers/usb/dwc3/dwc3.ko] unde
Hi,
Randy Dunlap writes:
> On 03/21/2018 01:25 AM, Stephen Rothwell wrote:
>> Hi all,
>>
>> Changes since 20180320:
>>
>
>
> on i386:
>
> ERROR: "__tracepoint_dwc3_gadget_generic_cmd" [drivers/usb/dwc3/dwc3.ko]
> undefined!
> ERROR: "__tracepoint_dwc3_ep_queue" [drivers/usb/dwc3/dwc3.ko] unde
Hi,
Tom Rini writes:
> On Wed, Mar 21, 2018 at 03:44:45PM +0200, Felipe Balbi wrote:
>> The following warnings are fixed:
>>
>> arch/arm/dts/am43x-epos-evm.dtb: Warning (interrupts_property): interrupts
>> size is (8), expected multiple of 12 in /ocp/mcasp@48038000
is (8), expected multiple of 12 in /ocp/mcasp@48038000
arch/arm/dts/am437x-sk-evm.dtb: Warning (interrupts_property): interrupts size
is (8), expected multiple of 12 in /ocp/mcasp@4803C000
The fix was basically to copy the missing data from mainline linux.
Signed-off-by: Felipe Balbi
---
arch
Hi,
Bin Liu writes:
>> Bin Liu writes:
>> >> >> > > BTY, the issue I am trying to debug is when reading bulk IN data
>> >> >> > > from a
>> >> >> > > USB2.0 device, if the device doesn't have data to transmit and
>> >> >> > > NAKs the
>> >> >> > > IN packet, after 4 pairs of IN-NAK transactio
Hi,
Bin Liu writes:
>> >> > > BTY, the issue I am trying to debug is when reading bulk IN data from
>> >> > > a
>> >> > > USB2.0 device, if the device doesn't have data to transmit and NAKs
>> >> > > the
>> >> > > IN packet, after 4 pairs of IN-NAK transactions, xhci stops sending
>> >> > > fu
Hi,
Bin Liu writes:
> On Mon, Mar 05, 2018 at 01:21:42PM -0600, Bin Liu wrote:
>> On Mon, Mar 05, 2018 at 10:16:49AM +0200, Felipe Balbi wrote:
>> >
>> > Hi,
>> >
>> > Bin Liu writes:
>> > > I am relatively new to xhci and its drive
Hi,
Benjamin Herrenschmidt writes:
> On Fri, 2018-03-16 at 13:02 +0200, Felipe Balbi wrote:
>> Hi,
>>
>> Benjamin Herrenschmidt writes:
>> > Some UDC may want to allocate endpoints dynamically, either because
>> > the HW supports an arbitrary large numb
Hi,
Thinh Nguyen writes:
> Platform device is allocated before adding resources. Make sure to
> properly cleanup on error case.
>
> Fixes: f1c7e7108109 ("usb: dwc3: convert to pcim_enable_device()")
this commit is from way back in 3.16, please resend with a "Cc:
" tag before this fixes line.
-
Hi,
Minas Harutyunyan writes:
>> Thanks for picking this for -next.
>> Is it better to have this in v4.16-rc fixes?
>> and also stable? v4.12+
>
> Well, there was no "Fixes: foobar" or "Cc: stable" lines in the commit
> log ;-)
>
> The best we can do now, is wait
Hi,
Minas Harutyunyan writes:
>> Thanks for picking this for -next.
>> Is it better to have this in v4.16-rc fixes?
>> and also stable? v4.12+
>
> Well, there was no "Fixes: foobar" or "Cc: stable" lines in the commit
> log ;-)
>
> The best we can do now, is wait
Hi,
Anurag Kumar Vulisha writes:
> This patch fixes two issues
>
> 1. The code logic in dwc3_prepare_one_trb() incorrectly uses the address
> and length given in req packet even for scattergather lists. This patch
> correct's the code to use sg->address and sg->length when scattergather
> lists
Hi,
Anurag Kumar Vulisha writes:
> This patch fixes two issues
>
> 1. The code logic in dwc3_prepare_one_trb() incorrectly uses the address
> and length given in req packet even for scattergather lists. This patch
> correct's the code to use sg->address and sg->length when scattergather
> lists
Hi,
Minas Harutyunyan writes:
On 09/03/18 14:47, Roger Quadros wrote:
> In the following test we get stuck by sleeping forever in _dwc3_set_mode()
> after which dual-role switching doesn't work.
>
> On dra7-evm's dual-role port,
> - Load g_zero gadget driver and enumerat
Hi,
Minas Harutyunyan writes:
On 09/03/18 14:47, Roger Quadros wrote:
> In the following test we get stuck by sleeping forever in _dwc3_set_mode()
> after which dual-role switching doesn't work.
>
> On dra7-evm's dual-role port,
> - Load g_zero gadget driver and enumerat
Hi,
Benjamin Herrenschmidt writes:
> Some UDC may want to allocate endpoints dynamically, either because
> the HW supports an arbitrary large number or because (like the Aspeed
> BMC SoCs), the pool of HW endpoints is shared between multiple gadgets.
>
> The allocation side can be done rather ea
Hi,
Roger Quadros writes:
> Hi Felipe,
>
> On 09/03/18 14:47, Roger Quadros wrote:
>> In the following test we get stuck by sleeping forever in _dwc3_set_mode()
>> after which dual-role switching doesn't work.
>>
>> On dra7-evm's dual-role port,
>> - Load g_zero gadget driver and enumerate to
Hi,
Roger Quadros writes:
> Hi Felipe,
>
> On 09/03/18 14:47, Roger Quadros wrote:
>> In the following test we get stuck by sleeping forever in _dwc3_set_mode()
>> after which dual-role switching doesn't work.
>>
>> On dra7-evm's dual-role port,
>> - Load g_zero gadget driver and enumerate to
Hi,
Thinh Nguyen writes:
>>> Thank you for reviewing the patches. I'll make the change to this patch
>>> for the next merge window. However, can you cherry-pick the other
>>> patches in this series for this merge window? If they also need more
>>> work, please let me know.
>>
>> I don't think i
Hi,
Benjamin Herrenschmidt writes:
> On Thu, 2018-03-15 at 08:03 +1100, Benjamin Herrenschmidt wrote:
>> > > Do you have more comments for the rest of the driver or that's it ?
>> >
>> > so far, that's it.
>>
>> Ok. I'll re-send.
>
> So I'll resend in a minute, doing a few more tests, however,
Hi,
"Greg Kroah-Hartman (gre...@linuxfoundation.org)"
writes:
> On Thu, Mar 15, 2018 at 04:00:25AM +, John Youn wrote:
>> Hi Felipe, Greg,
>>
>> I won't be able to continue maintainership of dwc2.
>>
>> Minas Harutyunyan, has been doing most of the communication on
>> linux-usb lately and
Hi,
Colin King writes:
> From: Colin Ian King
>
> Trivial fix to spelling mistake in dev_warn warning message text.
>
> Signed-off-by: Colin Ian King
seems like we need a patch to fix your subject ;-) I'll fix it when applying
--
balbi
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Description: PGP signature
Hi,
Colin King writes:
> From: Colin Ian King
>
> Trivial fix to spelling mistake in dev_warn warning message text.
>
> Signed-off-by: Colin Ian King
seems like we need a patch to fix your subject ;-) I'll fix it when applying
--
balbi
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Description: PGP signature
Hi,
Thinh Nguyen writes:
>> Thinh Nguyen writes:
>>> In DWC_usb31 version 1.70a-ea06 and prior, for highspeed and fullspeed
>>> isochronous IN, BIT[15:14] of the 16-bit microframe number reported by
>>> the XferNotReady event are invalid. The driver uses this number to
>>> schedule the isochron
Hi,
Benjamin Herrenschmidt writes:
> On Tue, 2018-03-13 at 09:35 +1100, Benjamin Herrenschmidt wrote:
>> On Fri, 2018-03-09 at 11:20 +0200, Felipe Balbi wrote:
>> >
>> > > diff --git a/drivers/usb/gadget/udc/aspeed-vhub/core.c
>> > > b/drivers/usb/gad
Hi,
Manu Gautam writes:
> Hi,
>
>
> On 3/13/2018 4:38 PM, Felipe Balbi wrote:
>> Hi,
>>
>> +Andy
>>
>> Manu Gautam writes:
>>> DWC3 controller on Qualcomm SOCs has a Qscratch wrapper.
>>> Some of its uses are described below resulting
Hi,
Manu Gautam writes:
> Hi,
>
>
> On 3/13/2018 4:38 PM, Felipe Balbi wrote:
>> Hi,
>>
>> +Andy
>>
>> Manu Gautam writes:
>>> DWC3 controller on Qualcomm SOCs has a Qscratch wrapper.
>>> Some of its uses are described below resulting
Hi,
Mathias Nyman writes:
> USB 3.2 specification adds Dual-lane support, doubling the maximum
> SuperSpeedPlus data rate from 10Gbps to 20Gbps.
>
> Dual-lane takes into use a second set of rx and tx wires/pins in the
> Type-C cable and connector.
>
> Add a "lanes" variable to struct usb_device
Hi,
Mathias Nyman writes:
> USB 3.2 specification adds a Gen XxY notion for USB3 devices where
> X is the signaling rate on the wire. Gen 1xY is 5Gbps Superspeed
> and Gen 2xY is 10Gbps SuperSpeedPlus. Y is the lane count.
> USB 3.2 supports dual lane Gen Xx2
>
> Gen 1x1 5Gbps single lane
> Gen
Hi,
Mathias Nyman writes:
> The USB 3.2 specification adds support for Dual-lane, doubling the
> maximum rate to 20Gbps by taking into use another set of rx and tx
> wires and pins in the Type-C cable and connector.
>
> The changes to support this in USB core and xhci driver seems to be minor.
Hi,
+Andy
Manu Gautam writes:
> DWC3 controller on Qualcomm SOCs has a Qscratch wrapper.
> Some of its uses are described below resulting in need to
> have a separate glue driver instead of using dwc3-of-simple:
> - It exposes register interface to override vbus-override
>and lane0-pwr-pre
Hi,
+Andy
Manu Gautam writes:
> DWC3 controller on Qualcomm SOCs has a Qscratch wrapper.
> Some of its uses are described below resulting in need to
> have a separate glue driver instead of using dwc3-of-simple:
> - It exposes register interface to override vbus-override
>and lane0-pwr-pre
Hi,
Thinh Nguyen writes:
> In DWC_usb31 version 1.70a-ea06 and prior, for highspeed and fullspeed
> isochronous IN, BIT[15:14] of the 16-bit microframe number reported by
> the XferNotReady event are invalid. The driver uses this number to
> schedule the isochronous transfer and passes it to the
d have Cc:ed Greg for this one. FWIW:
"This descriptor shall be returned for each Isochronous endpoint that
requires more than 48K bytes per Service Interval."
Acked-by: Felipe Balbi
> ---
> drivers/usb/core/urb.c | 8
> 1 file changed, 8 insertions(+)
>
> dif
Hi,
Grigor Tovmasyan writes:
> On 3/12/2018 5:34 PM, Felipe Balbi wrote:
>>
>> Hi,
>>
>> Grigor Tovmasyan writes:
>>> One more thing.
>>>
>>> In "969d58abe57d usb: dwc2: Enable LPM" patch the author's (John Youn)
>>&g
Hi,
Grigor Tovmasyan writes:
> One more thing.
>
> In "969d58abe57d usb: dwc2: Enable LPM" patch the author's (John Youn)
> Signed-off is missing.
>
> Could you please manually add his Signed-off ("Signed-off-by: John Youn
> ") or it's against rules?
I need John to give me his S-o-B line, wit
(no top-posting!!)
Grigor Tovmasyan writes:
> Hi,
>
> Yes. I'm verifying, it's okay.
>
> Sorry for inconvenience.
thank you. I'll move the changes to 'next'.
--
balbi
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Description: PGP signature
(please avoid top-posting)
Hi,
Grigor Tovmasyan writes:
> Hi Balbi,
>
> Please also cherry-pick following commit from your 'testing/next' to
> 'tmp' right before 01/14. It will solve the problem.
>
> 969d58abe57d usb: dwc2: Enable LPM
testing/next has been updated. Can you verify it's okay?
Hi,
Grigor Tovmasyan writes:
> Hi Balbi,
>
> Did you tried to apply your patch of the top of your testing/next branch?
>
> If yes, could you please apply 01/14 ("[PATCH v1 01/14] usb: dwc2:
> Rename hibernation to partial_power_down")
> and 02/14 ([PATCH v1 02/14] usb: dwc2: Add hibernation fie
Thinh Nguyen writes:
> From DWC_usb31 programming guide section 1.3.2, once DWC3_DCTL_CSFTRST
> bit is cleared, we must wait at least 50ms before accessing the PHY
> domain (synchronization delay).
>
> Signed-off-by: Thinh Nguyen
checking file drivers/usb/dwc3/core.c
Hunk #1 FAILED at 228.
1 ou
Grigor Tovmasyan writes:
> Hi Balbi,
>
> This patch didn't apply, because you missing 01/14 and 02/14 commits
> from this patch seria.
> Please apply following patches and try again.
> [PATCH v1 01/14] usb: dwc2: Rename hibernation to partial_power_down
> [PATCH v1 02/14] usb: dwc2: Add hibernati
Hi,
Roger Quadros writes:
>> When we set up the DWC3_DEPCMD_ENDTRANSFER command in
>> dwc3_stop_active_transfer(), we can do not set DWC3_DEPCMD_CMDIOC,
>> then there will no endpoint command complete interrupts I think.
>>
>> cmd |= DWC3_DEPCMD_CMDIOC;
>
> I remember
Hi,
Roger Quadros writes:
>> When we set up the DWC3_DEPCMD_ENDTRANSFER command in
>> dwc3_stop_active_transfer(), we can do not set DWC3_DEPCMD_CMDIOC,
>> then there will no endpoint command complete interrupts I think.
>>
>> cmd |= DWC3_DEPCMD_CMDIOC;
>
> I remember
Hi,
Roger Quadros writes:
>>> This is what the v3.10 databook says
>>>
>>> "When issuing an End Transfer command, software must set the CmdIOC
>>> bit (field 8) so that an Endpoint Command Complete event is generated
>>> after the transfer ends. This is necessary to synchronize the
>>> conclusio
Hi,
Roger Quadros writes:
>>> This is what the v3.10 databook says
>>>
>>> "When issuing an End Transfer command, software must set the CmdIOC
>>> bit (field 8) so that an Endpoint Command Complete event is generated
>>> after the transfer ends. This is necessary to synchronize the
>>> conclusio
Hi,
Roger Quadros writes:
>>> When we set up the DWC3_DEPCMD_ENDTRANSFER command in
>>> dwc3_stop_active_transfer(), we can do not set DWC3_DEPCMD_CMDIOC,
>>> then there will no endpoint command complete interrupts I think.
>>>
>>> cmd |= DWC3_DEPCMD_CMDIOC;
>>
>> I remember some part of the
Hi,
Roger Quadros writes:
>>> When we set up the DWC3_DEPCMD_ENDTRANSFER command in
>>> dwc3_stop_active_transfer(), we can do not set DWC3_DEPCMD_CMDIOC,
>>> then there will no endpoint command complete interrupts I think.
>>>
>>> cmd |= DWC3_DEPCMD_CMDIOC;
>>
>> I remember some part of the
Benjamin Herrenschmidt writes:
> The Aspeed BMC SoCs support a "virtual hub" function. It provides some
> HW support for a top-level USB2 hub behind which sit 5 gadget "ports".
>
> This driver adds support for the full functionality, emulating the
> hub standard requests and exposing 5 UDC gadget
Stefan Wahren writes:
>> Stefan Wahren hat am 12. Februar 2018 um 21:20
>> geschrieben:
>>
>>
>> We better print an error in case probing of dwc2 fails on
>> setting the DMA coherent mask.
>>
>> Signed-off-by: Stefan Wahren
>> ---
>> drivers/usb/dwc2/platform.c | 4 +++-
>> 1 file changed,
Stefan Wahren writes:
>> Stefan Wahren hat am 12. Februar 2018 um 21:20
>> geschrieben:
>>
>>
>> We better print an error in case probing of dwc2 fails on
>> setting the DMA coherent mask.
>>
>> Signed-off-by: Stefan Wahren
>> ---
>> drivers/usb/dwc2/platform.c | 4 +++-
>> 1 file changed,
Grigor Tovmasyan writes:
> From: Vardan Mikayelyan
>
> These are wrapper functions which are calling device or host
> enter/exit hibernation functions.
>
> Signed-off-by: Vardan Mikayelyan
> Signed-off-by: John Youn
> Signed-off-by: Grigor Tovmasyan
didn't apply to testing/next. Care to reba
Hi,
Masahiro Yamada writes:
> +static void dwc3u_reset_init(struct dwc3u_priv *priv)
> +{
> + dwc3u_maskwrite(priv, RESET_CTL, LINK_RESET, 0);
> + usleep_range(1000, 2000);
> + dwc3u_maskwrite(priv, RESET_CTL, LINK_RESET, LINK_RESET);
> +}
> +
> +static
Hi,
Masahiro Yamada writes:
> +static void dwc3u_reset_init(struct dwc3u_priv *priv)
> +{
> + dwc3u_maskwrite(priv, RESET_CTL, LINK_RESET, 0);
> + usleep_range(1000, 2000);
> + dwc3u_maskwrite(priv, RESET_CTL, LINK_RESET, LINK_RESET);
> +}
> +
> +static
Hi,
Roger Quadros writes:
> Hi,
>
> On 08/03/18 18:49, Brian Norris wrote:
>> Hi,
>>
>> On Thu, Mar 08, 2018 at 12:43:40PM +0200, Felipe Balbi wrote:
>>> William Wu writes:
>>>> The dwc3_core_init() gets the PHYs and initializes the PHYs with
Hi,
Roger Quadros writes:
> Hi,
>
> On 08/03/18 18:49, Brian Norris wrote:
>> Hi,
>>
>> On Thu, Mar 08, 2018 at 12:43:40PM +0200, Felipe Balbi wrote:
>>> William Wu writes:
>>>> The dwc3_core_init() gets the PHYs and initializes the PHYs with
Hi,
Grigor Tovmasyan writes:
> From: John Youn
>
> Set 'lpm_capable' flag in the gadget structure so
> indicating that LPM is supported.
>
> Signed-off-by: Sevak Arakelyan
> Signed-off-by: Grigor Tovmasyan
Missing John's Signed-off-by. What gives? I'll drop this from my queue
for now.
--
b
Hi,
Roger Quadros writes:
> Felipe,
>
> On 08/03/18 12:39, Felipe Balbi wrote:
>> Roger Quadros writes:
>>
>>> This is useful on platforms (e.g. TI AM437x) that don't
>>> have ID available on a GPIO but do have the OTG block.
>>>
>&g
Hi,
Roger Quadros writes:
> Felipe,
>
> On 08/03/18 12:39, Felipe Balbi wrote:
>> Roger Quadros writes:
>>
>>> This is useful on platforms (e.g. TI AM437x) that don't
>>> have ID available on a GPIO but do have the OTG block.
>>>
>&g
Hi Roger,
William Wu writes:
> The dwc3_core_init() gets the PHYs and initializes the PHYs with
> the usb_phy_init() and phy_init() functions before initializing
> core, and power on the PHYs after core initialization is done.
>
> However, some platforms (e.g. Rockchip RK3399 DWC3 with Type-C
>
Hi Roger,
William Wu writes:
> The dwc3_core_init() gets the PHYs and initializes the PHYs with
> the usb_phy_init() and phy_init() functions before initializing
> core, and power on the PHYs after core initialization is done.
>
> However, some platforms (e.g. Rockchip RK3399 DWC3 with Type-C
>
Roger Quadros writes:
> This is useful on platforms (e.g. TI AM437x) that don't
> have ID available on a GPIO but do have the OTG block.
>
> We can obtain the ID state via the OTG block and use it
> for dual-role switching.
>
> Signed-off-by: Roger Quadros
patch one applied fine to testing/next
Roger Quadros writes:
> This is useful on platforms (e.g. TI AM437x) that don't
> have ID available on a GPIO but do have the OTG block.
>
> We can obtain the ID state via the OTG block and use it
> for dual-role switching.
>
> Signed-off-by: Roger Quadros
patch one applied fine to testing/next
Hi,
Martin Blumenstingl writes:
>>> Martin Blumenstingl (3):
>>> dt-bindings: usb: add support for dwc3 controller on Amlogic Meson GX
>>> usb: dwc3: of-simple: add support for shared and pulsed reset lines
>>> usb: dwc3: of-simple: add support for the Amlogic Meson GXL and AXG
>>> SoC
Hi Greg,
here's my second pull request for this -rc cycle. Things seem to be
calming down rather early this time around.
Let me know if you want anything to be changed.
cheers
The following changes since commit 4a3928c6f8a53fa1aed28ccba227742486e8ddcb:
Linux 4.16-rc3 (2018-02-25 18:50:41 -0
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