I want to use MVI to assign the low byte of value that is larger than 255. This
results in an ASMA031E error message:
** ASMA031E Invalid immediate or mask field
I tried to use ACONTROL to circumvent this issue:
PUSH ACONTROL
ACONTROL TYPECHECK(NOMAGNITUDE)
MVI
John
Although it might be possible to concoct a useful system not using VTAM?
I don't really think it is possible to run a z/OS shop without VTAM, ...
Gerhard couched his words with care - or maybe it was accidental!
He said not using thereby acknowledging that it could be *impossible* -
Continued ...
-
[1] There's a curious use of the words Generated by VTAM in the rows in
the TRLE Definition column of Figure 1, Summary of DEVICE and LINK
statements for the legacy interface types - including CLAW! I'm not
sure I believe this! I can see no reason why any of the associated logic
-Original Message-
From: IBM Mainframe Assembler List
[mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On Behalf Of John Gilmore
Sent: Tuesday, December 27, 2011 4:55 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Idea for a possible enhancement to z architecture
John,
The IBM
ACONTROL TYPECHECK(NOMAGNITUDE)
As far as I understand this should instruct the assembler not to check
the magnitude of the immediate value
NOMAGNITUDE Specifies that the assembler not perform magnitude validation
of signed immediate-data fields of machine instruction
operands
MVI does
Fred,
But it is a bit disappointing (and strange) that this option would work for
instructions like LHI but not for MVI or CLI
Here is my sore point
MVI CHAR,C'a' move in a lower case a
works.
But
MVI CHAR,CA'a' move in an ASCII lower case a
nor
MVI CHAR,CE'a' we
John,
more overhead: consistent use of the compare and trap (or compare
plus branch, 2 instructions, or compare-and-branch instruction on
the z196)
Consistent use of compare and trap is not something you want. POP warns
of cases when trap springs (this warning plus the extra overhead of
Take a peek at the latest z/Architecture Principles of Operation
(SA22-7832-08) and read the descriptions of the Load on Condition
(LOC, LOCG) and Store on Condition (STOC, STOCG) instructions.
Bob
On Tue, 27 Dec 2011 16:08:43 -0600, McKown, John
john.mck...@healthmarkets.com wrote:
What do you think of a hardware feature, selectable
via a bit in a control register, so that addresses
in low core can only be referenced via GPR0?
That could be useful.
I.e. if you use any register as a base
Not well thought out, or at least not precisely expressed.
Consider the following code:
LAR0,0 put low core constant address of zero in R0
L R1,16(R0,R0) get the address of the CVT
* at this point, a program interrupt occurs.
Or perhaps the code can get into supervisor
Bill; Fairchild is right.
Ideas for new instructions often begin with the notion that something
ugly ought to be avoidable; but that notion is not enough, even when
it has obvious merit.
To take such a notion further it should first be implemented as a
macro, perhaps in several ways, complete
Martin Truebner noted:
Here is my sore point
MVI CHAR,C'a' move in a lower case a
works.
But
MVI CHAR,CA'a' move in an ASCII lower case a
nor
MVI CHAR,CE'a' we want an EBCDIC lower a regardless of codepage
DO NOT WORK.
I understand the reasoning, but I
[Cross-posted on ibm-main]
[This is in two parts because of restrictions on posting
size for the assembler list.]
Now, let me just focus on the 23 semiprivileged instructions:
BAKR- Branch and Stack
BSA - Branch and Set Authority
EPAR- Extract Primary ASN
EPAIR - Extract
On 12/28/2011 2:24 PM, Gainsford, Allen wrote:
Some other interesting instructions in this table:
BSG - Branch in Subspace Group
EREG- Extract stacked REGisters (32 bits)
EREGG - Extract stacked REGisters Grande (64-bits)
ESTA- Extract stacked STAte
LPTEA - Load Page Table Entry
On 12/28/2011 2:57 PM, Tony Harminc wrote:
On 28 December 2011 15:16, Steve Comstockst...@trainersfriend.com wrote:
The PoPs says, on page 5-24 in the PDF version (dz9zr008.pdf /
SA22-7832-08), there are 23 semiprivilged instructions.
[...]
PC - Program Control
That's Program Call...
On 12/28/2011 3:17 PM, Steve Comstock wrote:
Now, let me just focus on the 23 semiprivileged instructions:
BAKR - Branch and Stack
[My follow up research will be: which of these
instructions allowed by z/OS are useful for
the application programmer? This may then
result in a new course. We'll
OK, consensus seems to be that this would be unnecessary.
On Tue, 2011-12-27 at 16:08 -0600, McKown, John wrote:
I've been coding up a UNIX program in HLASM. One thing that I'm doing
is chain chasing using pointers. The end of chain is indicated by a
pointer of binary zeros: A(0). The code
At 17:40 + on 12/28/2011, Bill Fairchild wrote about Re: Idea for
a possible enhancement to z architecture:
Not well thought out, or at least not precisely expressed.
Consider the following code:
LAR0,0 put low core constant address of zero in R0
L R1,16(R0,R0)
It seems that you want an option like AUTOTRUNC rather than a TYPECHECK
sub-option, which is intended to reduce confusion about what one might
expect from different forms of immediate operand in some instructions.
Whatever the name, I want to be able to code for example:
MVI
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