Do you mean information beyond what is documented in the Principles of
Operation?
--
Tom Marchant
On Thu, 9 May 2024 09:50:07 -0300, João Reginato wrote:
>Do you know where can I find additional information about the hardware
>implementation of the relative branching instructions?
Would it help to use IEABRCX and disable it around that macro?
--
Tom Marchant
On Thu, 2 May 2024 21:50:26 +, Seymour J Metz wrote:
>It's not clear that the author ever heard of EX. Some of the code is decades
>old, and a mass cleanup is not authorized. I'm not rven sure whether
. Don't be surprised if you get more people voting
against it than vote for it.
--
Tom Marchant
On Wed, 1 May 2024 07:56:52 -0300, João Reginato wrote:
>I can't see it as an additional code if it is already checking the
>duplicates. It could only show an error where/when/if the duplicated
to use newer instructions when they are
included in the minimum requirement for the operating system.
--
Tom Marchant
On Mon, 15 Apr 2024 09:09:06 -0700, Charles Mills wrote:
>If you are running "sometimes" on older hardware I think you have a greater
>risk from unsupporte
The OPCODE table, like the rest of the POO , has change bars to tell you what
changed since the previous edition.
--
Tom Marchant
On Wed, 20 Mar 2024 21:53:35 +, Farley, Peter
wrote:
>The only way I can think of to accurately (more or less) track the additions
>would be to e
How about
CLC ,
ORG *-5
DCX'1'
ORG ,
--
Tom Marchant
On Mon, 26 Feb 2024 10:33:27 -0500, David Eisenberg
wrote:
>Tom,
>
>IIUC, what you're suggesting is this:
>
> CLC (2),
>
>and that works if is a relocatable symbol. But might be a
>
Perhaps I'm being dense, but why not
CLC FIELD1(2),FIELD2
--
Tom Marchant
On Mon, 26 Feb 2024 09:47:29 -0500, David Eisenberg
wrote:
>Well, it's a CLC (not an MVC)... but I understand your solution. With that
>approach, and PRINT NOGEN is in effect, I get this in the listing:
&g
. There is no relative equivalent,
though in some situations it might be possible to use BRAS (AKA JAS). In most
cases I wouldn't recommend it.
--
Tom Marchant
On Mon, 27 Nov 2023 16:55:48 +, Seymour J Metz wrote:
>That is correct.
>
>--
>Shmuel (Seymour J.) Metz
>http://mason.gmu.e
beginning of
the program, and they will all be addressable in this example using register 10.
--
Tom Marchant
On Tue, 21 Nov 2023 15:35:51 -0500, Dave Clark wrote:
>I like to have all my variable data covered by R13, too. However,
>this does mean I have to have separate coverage for hard
On Tue, 21 Nov 2023 15:04:25 -0500, Jon Perryman wrote:
>Tom says that he uses BAKR to save registers for each CSECT called and
>savearea for each call within the CSECT.
I didn't say that or anything close.
Neither did anyone else in this thread.
--
Tom Marchant
is to zero register 13.
This is documented in chapter 2 of the Assembler Services Reference.
--
Tom Marchant
On Fri, 17 Nov 2023 18:19:00 -0300, João Reginato wrote:
>I'm very interested in knowing your performance experiences about using
>BAKR/PR versus the Linkage Convention traditional wa
- 32K?
As clearly documented in the POO it is +/- 32K halfwords.
>Or are there actually
>three varieties -- 16-bit, 32-bit, and the "even longer ones" you hinted
>at?
The relative long instructions with a 32-bit relative offset allows for
plus/minus 4GB from the PSW address. You want even longer than that?
--
Tom Marchant
As Tony mentioned, you can use LARL.
You can also use BRAS (Branch Relative and Save) to call the subroutine.
No base register is needed to reference storage for these, or any of the other
relative instructions.
--
Tom Marchant
You are wrong again. https://www.ibm.com/linuxone
The latest iteration is version 4, a z16. The first was a z13.
See also https://en.wikipedia.org/wiki/Linux_on_IBM_Z
--
Tom Marchant
On Thu, 20 Jul 2023 00:15:14 +, Jon Perryman wrote:
>IBM will never discount an entire z16 just for Linux.
That is your evidence that "for many years IBM has withheld its own changes to
GCC for private sale to its own customers"?
LOL!
--
Tom Marchant
On Thu, 20 Jul 2023 07:11:11 +, Ian Worthington
wrote:
>There is no secret, see
>https://www.ibm.com/docs/en/ztpf/2022?topic
form other peers where the object code and Corresponding Source of the work
are being offered to the general public at no charge under subsection 6d.
--
Tom Marchant
On Wed, 19 Jul 2023 20:42:52 +, Ian Worthington wrote:
>Yes.. But, as I said, I believe that they are allowed to do
Do you have evidence that IBM has withheld their changes to GCC?
--
Tom Marchant
On Wed, 19 Jul 2023 19:35:09 +, Ian Worthington wrote:
>That's what I had though, but apparently it's not correct. In fact, for many
>years IBM has withheld its own changes to GCC for private sale to i
ough Linux is actually just the kernel) is licensed under GPL v3
https://www.gnu.org/licenses/gpl-3.0.en.html
--
Tom Marchant
On Wed, 19 Jul 2023 07:03:05 +, Ian Worthington wrote:
>Is this correct? My understanding is that the source is still available but
>now only to customers in
sk may be
dispatched before you are.
--
Tom Marchant
sets
Extended Addressability Guide
just to name some that come immediately to mind.
--
Tom Marchant
On Wed, 28 Jun 2023 11:03:20 -0700, Charles Mills wrote:
>The "other manual" for the Assembler is Principles of Operation.
>
>If you want to know how COBOL MOVE works, yo
C'11' is higher than C'AA' in EBCDIC.
X'11' and X'AA' have nothing to do with EBCDIC.
--
Tom Marchant
On Wed, 7 Jun 2023 11:02:58 -0700, Charles Mills wrote:
>No! Not a hexadecimal comparison. If it were, 11 would compare higher than
>AA at least in an EBCDIC environment.
On Mon, 20 Jun 2022 21:53:27 +1000, Robin Vowels wrote:
>Your belligerent attitude and insulting remarks are
>tiresome.
PKB
g for many of the design
choices.
-- Tom Marchant
On Thu, 16 Jun 2022 14:36:12 +, Schmitt, Michael wrote:
>My company's COBOL coding standards are* to define binary fields as signed
>(e.g. PIC S9(4) BINARY). I'm wondering why that's the standard.
>
>The original standards were de
for VM in about
1980, well before OS/2.
--
Tom Marchant
e address of zoned
data? Or perhaps a binary number?
--
Tom Marchant
nstructions
>(SS-b).
Of course they are, and you can EX a PACK, but you cannot use ZAP (EXecuted or
not) to pack character data. That's what I thought your OP was talking about.
--
Tom Marchant
On Fri, 11 Feb 2022 17:03:09 -0500, Dave Clark wrote:
> Does that mean ZAP can't be EXecuted?
Yes, you can EXecute a ZAP instruction. But, you can't use it to PACK
--
Tom Marchant
On Wed, 2 Feb 2022 09:29:59 -0700, Paul Gilmartin wrote:
>For IBM-MAIN I generally read and post via the Web interface
So do I, for this list as well.
--
Tom Marchant
ts with colored slots using:
>Red, slots filled in by caller when he allocated the space.
>Green, slots filled in by callee when he first gets control.
If I do something like that, it would have to be more like:
Red, filled in by program A
Green, filled in by program B
Blue, filled in by program C
--
Tom Marchant
And the third save area used F4SA format
and not F5SA format because it expects a 144-byte save area.
>And a similar flaw in slides 26 and 27.
Similarly, these are as intended, and they match the documentation.
--
Tom Marchant
Rs, but he lied.
No, he didn't. He has said that he used x'90'-x'CF' of his caller's save area
to save the access registers. Not the save area that he allocated. He can still
allocate a 144-byte save area for the programs that he calls if that is all
they need.
--
Tom Marchant
ram that will use F7SA format to save your registers.
The part of the manual describing F8SA is titled "If changing the
contents of bits 0-31 of the 64-bit GPRs but not changing ARs".
The only save area format that is documented for saving Access
Registers is the F7SA.
Tom Marchant
ARs and 64-bit GPRs
whereas the F5SA area provides space only for the 64-bit GPRs.
--
Tom Marchant
gram that calls
other programs that require a 216-byte save area to store the 64-bit
GPRs , the Access Registers, and the ASC mode in F7SA format.
Tom Marchant
>--
>Shmuel (Seymour J.) Metz
>http://mason.gmu.edu/~smetz3
>
>
>From: IBM
your program to be called by existing programs that
you have no control over, and don't know how big a save area they
provide, you assume they provided only a 72-byte save area.
Otherwise, part of your program specifications is the size of save
area you require.
--
Tom Marchant
yte save area to save the GPRs and ARs in F7SA format.
--
Tom Marchant
the F8SA. Rather, the 216 bytes
before the high halves can be used by a program that it calls to save the
registers in F7SA format. If you want to also save your callers ARs, you can
save them after the 288 bytes, but there is no defined format for that.
Tom Marchant
that it provides.
--
Tom Marchant
ATTACH(X) always passes a 144-byte save area since about z/OS 2.3.
EXEC PGM= invokes your program with ATTACH.
--
Tom Marchant
On Wed, 26 Jan 2022 10:40:30 -0700, Paul Gilmartin wrote:
>Does //STEP EXEC PGM=... nowadays pass a 144-byte savearea whether >the PGM
>needs it or not?
=4762=4720
You'll need to be a SHARE member to access them.
--
Tom Marchant
On Wed, 26 Jan 2022 11:23:32 -0500, Kerry Liles wrote:
>Perchance a link to the .pdf ?
>Or both if they are significantly different ...
>
>Cheers
>
>On Wed, Jan 26, 2022, 11:17 Tom Marchant <
&g
that you have 12 years ago and had an
extensive email conversation with Peter Relson over the course of several
months. Peter rewrote chapter 2 of the MVS Assembler Services Guide for release
1.12 to make it clearer.
--
Tom Marchant
On Wed, 26 Jan 2022 10:04:42 -0500, Tony Thigpen wrote:
>
Thanks for the correction, Ed. I'm surprised there weren't more errors in it.
Actually, I did present a SHARE session on this twice. Once in 2012 and again
in 2018, titled, Saving Your Caller's Registers - Not Your Father's Save Area.
--
Tom Marchant
On Wed, 26 Jan 2022 07:37:36 -0800, Ed
high half of any register, but that will call
programs that require a 144-byte save area. I will then save my callers in
standard, 72-byte format, allocate a 144-byte save area, and put the address of
the caller's save area in offset 4.
--
Tom Marchant
On Tue, 25 Jan 2022 21:40:48 -0500, To
the registers on entry to B are still stored in B's save area,
starting at x'90'.
I wish I could draw a picture. If I didn't make too many mistakes, maybe you'll
be able to follow this.
--
Tom Marchant
On Tue, 25 Jan 2022 21:33:06 +, Seymour J Metz wrote:
>I'm having trouble making re
Really? So you don't care that your 64-bit C program uses XPLINK-64 program
linkage with its stack above the bar? As a result, it can only call an amode 64
program.
I heard somewhere that Rome wasn't built in a day.
--
Tom Marchant
On Tue, 25 Jan 2022 12:06:05 -0700, Paul Gilmartin wrote
Sorry, the forward pointer is at +X'88'. +'80' is the back chain.
--
Tom Marchant
On Tue, 25 Jan 2022 10:48:55 -0500, Tom Marchant
wrote:
>If it is a 144-byte (or larger) save area, there are two possible forward
>pointers. One at +8 and the other at +X'80'. Both can be valid.
-byte save
area.
ATTACH(X) always provides a 144-byte save area to the attached task. ESTAE(X)
exits are also provided a 144-byte save area.
--
Tom Marchant
On Mon, 24 Jan 2022 14:14:33 -0500, Dave Clark wrote:
>I'm given to understand that none of that information is helpful when a
>
not exactly following
the chain.
--
Tom Marchant
On Mon, 24 Jan 2022 21:08:54 +, Seymour J Metz wrote:
>I'm a bit confused. I understand that there is no way to determine whether the
>the caller has provided a 144-byte save area. However, I don't understand the
>issue for running th
know what
format it is.
It is a little like the problem of where to store the value of R13 upon
entry to my program. It doesn't do me any good to store it in the save
area that my caller passed me. So I save it in the save area that I
allocate for the programs that I call.
--
Tom Marchant
. When
I am reading a dump, I can follow the save areas back accurately, no
matter what the mix of save area types is.
XPLINK is, admittedly, rather more complicated.
--
Tom Marchant
On Fri, 21 Jan 2022 09:55:32 -0500, Tony Thigpen wrote:
>It's worse than you think. There is a save
the save area. That is because the first word is defined as
for the use of language products.
--
Tom Marchant
On Fri, 21 Jan 2022 09:32:07 -0500, Dave Clark wrote:
>My program is being
>called by REXX and I'm not aware of any documentation stating what kind of
>register save area REXX
nce summary at
https://www.ibm.com/support/pages/system/files/2020-07/SA22-7871-10.pdf
--
Tom Marchant
Documentation for XPLINK and XPLINK64 is in the LE Vendor Interfaces manual.
--
Tom Marchant
On Wed, 16 Jun 2021 21:56:41 +, Richard Way
wrote:
>I'm rather confused about the requirements for converting an existing AMODE 31
>"ordinary" assembler program to one that
Yes. +4GiB-1/-4Gib for relative branch long. e.g. BRCL. BRC is only +/- 64Kib
--
Tom Marchant
On Wed, 4 Dec 2019 16:28:40 +, Seymour J Metz wrote:
>With a signed offset.
>
>
>--
>Shmuel (Seymour J.) Metz
>http://mason.gmu.edu/~smetz3
>
>
>
3.ieaa800/iea3a8_Synchronous_exits__SYNCH_or_SYNCHX_macro_.htm
https://www.ibm.com/support/knowledgecenter/SSLTBW_2.3.0/com.ibm.zos.v2r3.ieaa700/iea3a7_Description1.htm
--
Tom Marchant
program allows
you to do that without sacrificing a register.
--
Tom Marchant
ssors support bimodal addressing? Do their designers
care about compatibility with existing code?
--
Tom Marchant
e regardless of operating
system.
--
Tom Marchant
nd of a 64-bit address space", but in the middle of the
64-bit address space, when the addresses transition from
7FFF_ to 8000_.
--
Tom Marchant
y.
That won't help you much. If you are referencing addresses below the bar
while running AMODE 64, you need to clear bits 0-32 of your base registers.
--
Tom Marchant
On Mon, 18 Nov 2019 08:17:37 -0500, Peter Relson wrote:
>Due diligence before posting such questions includes trying to eliminate
>the possibility that you made some simple mistake.
Such as assembling the prolog and epilog macros with no intervening code.
--
Tom Marchant
the post from Peter
that you replied to was about doing that
>I thought absolute 0
>was used as the PSA for the IPL processor, but that, again, was an
>assumption.
That may be. I don't know. The POO would probably say.
--
Tom Marchant
referenced using the real address that matches the
value that is used for the prefix register for that processor. This is
documented
in the Principles of Operation under "Prefixing".
You cannot use the value in the prefix register for your own processor to
reference
your PSA t
ows that the two forms can be different, but,
1. I can't think of a reason to ever code USING 0,r. Registers are a
scarce resource.
2. The code snippet is missing an instruction to clear register 9.
--
Tom Marchant
nt fields. A zero is used to indicate
the absence of the corresponding address component.
A base or index of zero implies that a zero
quantity is to be used in forming the address, regardless
of the contents of general register 0.
--
Tom Marchant
On Mon, 16 Sep 2019 16:38:07 -0400, Dan Greiner wrote:
Same here. Before I worked for Amdahl, I know one guy who referred to it as
"Prinkiples".
>For the nearly 30 years that Amdahl competed for IBM's mainframe turf, many
>within Amdahl referred to the Principles of Operation using the proper
VEDSAB,
LOC=ANY,MF=(E,GETDSAB_PL)
...
SAVEDSAB DSA
GETDSAB PLISTVER=MAX,MF=(L,GETDSAB_PL)
If the DD statement is found, R15 will contain 0.
I see others have suggested DEVTYPE. I believe that will work as well.
--
Tom Marchant
On Thu, 27 Jun 2019 11:42:44 -0400, Tom Marchant
wrote:
>On Thu, 27 Jun 2019 08:43:20 -0400, Peter Relson wrote:
>
>>it is fully possibly to accomplish retrying to a 64-bit address, as I
>>have pointed out, as long as you are willing to sacrifice register 15 (or,
>>if
).
I see that there is also CVTBSM02 that seems to let you do the same thing
with register 2.
--
Tom Marchant
f data in a fullword.
You can't do that.
--
Tom Marchant
>> On Jun 26, 2019, at 7:37 AM, Peter Relson wrote:
>>
>>
>> I was hoping to see STG R4 but the code still had ST R4
>>
>>
>> Please re-read what Chuck A wrote.
>>
>> You can
On Thu, 20 Jun 2019 06:46:45 -0500, John McKown wrote:
>Time spent learning is never wasted. Even if the thing learned is not
>extremely important. At least, that is my philosophy.
I agree completely.
--
Tom Marchant
1 through offset 105 of the SYNADAF message area.
Picking out that information is neither complex nor error-prone.
--
Tom Marchant
d be a fair amount of overhead in this. Still, it
is an intriguing capability.
--
Tom Marchant
rystal ball feature
installed and functioning correctly.
--
Tom Marchant
t;(I have a zBC12 and get a SPEC EXCEPT on a SRST/Search string)
As others mentioned, a Specification exception means that the instruction is
used incorrectly.
It does not mean that the machine does not support the instruction.
--
Tom Marchant
12.
z/OS 2.3 requires at least a z12, and is the first to have that requirement.
--
Tom Marchant
On Sat, 8 Dec 2018 02:34:20 +, Alan Atkinson wrote:
>CLI *,0 and *,255
Perhaps I'm being dense, but what do you mean?
Surely not "compare the byte at the current location counter" which for CLI
will always be X'95'.
--
Tom Marchant
On Thu, 6 Dec 2018 13:47:36 -0500, Joseph Reichman wrote:
>It doesn’t have a wait bit there is only one task waiting on it
That is a contradiction.
If a task is waiting on an ECB, it has the wait bit on.
Unless, of course, someone has clobbered it.
--
Tom Marchant
RO1 MF=L
ORG MF_L_AREA
MACRO_2_L MACRO2 MF=L
ORG MF_L_AREA
MACRO_3_L MACRO3 MF=L
ORG ,
--
Tom Marchant
On Fri, 3 Aug 2018 12:03:02 -0400, Tony Thigpen wrote:
>I was taught that to make it easy to read, do the following:
> BL *+4+2
>LR R1,R2
How about
THIS BL *+L'THIS+L'NEXT
NEXTLR R1,R2
--
Tom Marchant
On Thu, 19 Jul 2018 14:13:00 -0400, Steve Smith wrote:
>My post wasn't wrapped as it came back to me. I'm just using Gmail on
>Firefox.
That's funny. It is wrapped on the web interface, both for this list and for
IBM-Main, with a line break after both NILL and NILF, and before R15.
-
DE 31, the high bit of R14 will be
1,
and if your caller is AMODE 24,the high bit will be 0.
In that limited situation, it is possible to change the return instruction to
BSM before the calling programs are changed to BASSM.
--
Tom Marchant
t used one of those instructions. Therefore, it is possible to
phase in the use of BASSM/BSM into existing code.
--
Tom Marchant
verged into a more
general discussion of converting binary values into printable hex. I must
have missed the part where it diverged to converting decimal digits to
printable characters. For that, there is no need to OR anything but the
last byte of the UNPKed data.
--
Tom Marchant
),IN(2)
MVC OUT+3(1),IN+1
OIOUT+2,X'F0'
OIOUT+3,X'F0'
TROUT(4),TRTABLE-240
Or you can do:
UNPK OUT(5),IN(3)
TROUT(4),TRTABLE-240
IN DS XL2
OUT DS CL5
TRTABLE DC C'0123456789ABCDEF'
I would opt for the latter.
--
Tom Marchant
ing one
extra byte.
And J R is correct, it should be HEXTBL-F'F0'
--
Tom Marchant
more byte on the right.
--
Tom Marchant
lation. For this purpose, the table can
be 16 bytes, but you do need a register that points to 240 bytes
before the table (or before). There are many ways to ensure that,
including the LAY that Martin mentioned, or LARL, either of which
is 6 bytes long.
--
Tom Marchant
On Wed, 4 Apr 2018 21:30:24 GMT, esst...@juno.com wrote:
>I'm trying to keep the size of the module small and would prefer not to use
>any Translation Table.
For conversion to displayable hex after an UNPK, you only need a 16-byte
translate table.
--
Tom Marchant
On Thu, 8 Feb 2018 01:29:04 +, Jon Perryman wrote:
> Jon Perryman wrote:
>>It's a simple question. Show us you know enough HLASM to do simple OOP (not
>>OOD).
>> Tom Marchant wrote:
>>> You asserted that you can do OOP in HLASM.
>
>> Paul s
ith "you clearly aren't qualified," and asked him to
prove you wrong.
So, when you are asked to show that you can do what you say
you can, you respond with ad hominem and a demand that he
prove your assertion to be false.
This has grown beyond tiring. Now it is plain stupid.
--
Tom Marchant
ng little new with each post. It has become quite tiring.
--
Tom Marchant
be surprised if a z14 can be configured that costs as much as $60 million.
It supports up to 32 TB of customer-usable memory.
--
Tom Marchant
o imagine
that it knows enough about MVS structures to be of much use.
--
Tom Marchant
e have hired well over a dozen new college
graduates and trained them to use assembler.
--
Tom Marchant
Compuware
On Tue, 30 Jan 2018 17:15:12 -0800, Charles Mills wrote:
>There is no best language. There is only the best available language for the
>task at hand.
I'd say it a little differently.
The best language for a particular programmer to implement the task at hand.
--
Tom Marchant
f us were listening. It was good to read your article again.
It is a classic. Right up there with the article by Ken Dubbo many years
ago.
--
Tom Marchant
On Tue, 30 Jan 2018 09:05:31 -0700, Paul Gilmartin wrote:
>On 2018-01-30, at 06:27:02, Tom Marchant wrote:
>
>> On Tue, 30 Jan 2018 05:46:20 +, Jon Perryman wrote:
>>
>>> Unix lacks the robust MVS features because of the C language
>>
>> I am not a
On Tue, 30 Jan 2018 05:46:20 +, Jon Perryman wrote:
>Unix lacks the robust MVS features because of the C language
I am not a fan of C, but I don't believe that any of the shortcomings
of Unix are properly attributed to the C language.
--
Tom Marchant
On Thu, 25 Jan 2018 13:48:32 -0600, Paul Raulerson wrote:
>> On Jan 25, 2018, at 06:53, Tom Marchant wrote:
>>
>> On Wed, 24 Jan 2018 22:54:49 -0600, Paul Raulerson wrote:
>>
>> You can't find any of the more than 1100 instructions in the z/Architecture
&g
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