The short answer to your question is No.
I think you have a fundamental misunderstanding of the operation of
the Linkage Stack mechanism.
You should carefully read "Chapter 2. Linkage stack" within IBM
publication SA23-1394-00 "z/OS MVS Programming: Extended
Addressability Guide" (this is the
No, MSTA will not change these fields.
But I am curious as to what you are trying to build and why you want to change
the AX while in stacked state/PC routine.
On Sun, 10 Jun 2018 18:58:16 GMT "esst...@juno.com" wrote:
:>Is this possible ?
:>
:>A hypothetical scenario -
:>
:>A Long Running
From: IBM Mainframe Assembler List on behalf
of esst...@juno.com
Sent: Sunday, June 10, 2018 2:58 PM
To: ASSEMBLER-LIST@listserv.uga.edu
Subject: Curosity Question About ESTA and MSTA
Is this possible ?
A hypothetical scenario -
A Long Running Started Task issues an Extract Stacked State
that the program (RB) will be re-executed Again ?
Is my understanding correct.
Paul D'Angelo
-- Original Message --
From: David Stokes sto...@interchip.de
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: AW: Curosity Question About TCTL
Date: Sat, 23 Feb 2013 17:48:23 +
The TCTL or RESUME
(Reminder: this list is for questions about the assembler and use of it,
not about the behavior of z/OS system services.
IBM-Main would be a much better place to ask such questions.)
but only if the system determines that the RB is dispatchable.
...
Am I to understand that the TCB needs to be in
will at some point or terminate.
-Ursprüngliche Nachricht-
Von: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] Im
Auftrag von esst...@juno.com
Gesendet: Freitag, 22. Februar 2013 17:31
An: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Betreff: Curosity Question About TCTL
I
If you want to see a good example of a well used assembler hashing
algorithm you need to be an IMS customer. IMS has the, curiously misnamed,
HDAM, PHDAM and DEDB randomiser. It should be more correctly called a
hashing algorithm. The purpose of DFSHDC40, DBFHDC40 and DBFHDC44 is to
take a
On Nov 1, 2012, at 23:49, robin wrote:
Here I see no evidence of clustering.
There won't be.
All the data is uniformly distributed.
Real data is not uniform.
OK. I'm starting to understand. But can you be more
specific? Narrow down the definitions of real and
not uniform
For example,
John,
Dividing and taking the remainder to achieve a more-fewer mapping
is---by definition---division-method hashing;
and I insist: the number of possible input values is 46656 and this is
the number of output values exact 46656 (not more-fewer but identical)
- and
(surprise surprise) 46656
Martin Truebner (Trübner?) writes:
begin snippet
and I insist: the number of possible input values is 46656 and this is
the number of output values exact 46656 (not more-fewer but identical)
end snippet
It is of course immediate that for a set of n characters the number of
permutations of them
/2012 06:19 PM
Subject:Re: Curosity Question
Sent by:IBM Mainframe Assembler List
ASSEMBLER-LIST@listserv.uga.edu
If a hashing scheme is working well there is almost no clustering.
Suppose we divide by 17, a prime, i.e., use it, in the jargon, as our
hashing modulus.. Remainders
Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of John Gilmore
Sent: Friday, November 02, 2012 8:41 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Curosity Question
Martin Truebner (Trübner?) writes:
begin snippet
and I insist: the number of possible input values is 46656
On 11/2/2012 7:40 AM, Bill Fairchild wrote:
Rather than belabor this issue any further, if you could post a link to some
explanation of the mathematical proof why clustering occurs around prime
factors of a composite modulo, I would love to read it and try to understand
what is going on.
On 2 November 2012 04:05, Martin Truebner mar...@pi-sysprog.de wrote:
John,
Dividing and taking the remainder to achieve a more-fewer mapping
is---by definition---division-method hashing;
and I insist: the number of possible input values is 46656 and this is
the number of output values
I still do not see how changing a numbering scheme from based
on ten to a system based on thirty-six does create any clusters.
--
Martin
Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE
more at http://www.picapcpu.de
On 2012-11-02 15:01, Martin Truebner wrote:
I still do not see how changing a numbering scheme from based
on ten to a system based on thirty-six does create any clusters.
It doesn't. Robin has pretty much acknowledged that if the
input data are uniform, a modulus hash will likewise be uniform.
@LISTSERV.UGA.EDU]
On Behalf Of esst...@juno.com
Sent: Thursday, November 01, 2012 8:49 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Curosity Question
Im providing some snipets of code which is used to derive a CICS Terminal ID
from an address in storage. The Starting address resides above the line
(31-bit
: Curosity Question
Date: Thu, 1 Nov 2012 15:03:51 +0100
On 1 November 2012 14:48, esst...@juno.com esst...@juno.com wrote:
Im not sure I understand the significance of the F'36' (BASENUM).
Can someone explain the significance of using a F'36' bsing used to divide
into a 31 Bit Address ?
I suspect
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Curosity Question
Rob van der Heij
wrote
It's encoding an address in base-36 (using only uppercase letters and
digits). With 4 positions you can create 36**4 different combinations
(about 2**24/10). Depending on the size of the control block
Am I dense or what?
Here you may expect
disproportionately high numbers of the hash values 2 and 3.
To me the code takes the entry-number and uses that number to come to a
number in a base 36 system
All that is happening is Benford's Law will show, but where will the
clustering occur?
--
Long division is not hashing. Dividing and taking the remainder to
achieve a more-fewer mapping is---by definition---division-method
hashing; and it of course makes use of just one divide operation.
But enough! If this is a dispute about terminology rather than
substance, it is not very
John Gilmore
Not being a matchamtician, what exactly do you mean by clustering.
-- Original Message --
From: John Gilmore jwgli...@gmail.com
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Curosity Question
Date: Thu, 1 Nov 2012 12:09:20 -0500
Perhaps you are being dense
I resemble one of those old time mainframers and proud of it
-- Original Message --
From: McKown, John john.mck...@healthmarkets.com
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Curosity Question
Date: Thu, 1 Nov 2012 09:45:02 -0500
Yes, and also must update the BASETAB
On Thu, Nov 1, 2012 at 6:14 PM, John Gilmore jwgli...@gmail.com wrote:
If a hashing scheme is working well there is almost no clustering.
Suppose we divide by 17, a prime, i.e., use it, in the jargon, as our
hashing modulus.. Remainders will have one of the 17 values
0, 1, 2, . . . , 16.
Clustering is a statics term that describes the tendency of events to occur
around groups and less frequently around other groups. In this case, it is where
we are trying to predict (or guess) values to make better use of the hash table
storage.
To make it easier to understand, try to guess the
From: Martin Truebner
Sent: Friday, 2 November 2012 5:23 AM
However named, this is a hashing scheme.
Okay - If converting a number from a system based on whatever to
a system based on a different number is hashing..
maybe my english needs amending
Long established number-theoretic
At 11:30 AM 11/2/2012 +1100, you wrote:
From: John Gilmore
Sent: Friday, 2 November 2012 8:25 AM
Long division is not hashing.
Even long division can be hashing.
Just so. See Knuth, TAoCP, Ch 6.4 .
Mike
Dividing and taking the remainder to
achieve a more-fewer mapping is---by
On Nov 1, 2012, at 16:14, John Gilmore wrote:
If a hashing scheme is working well there is almost no clustering.
Suppose we divide by 17, a prime, i.e., use it, in the jargon, as our
hashing modulus.. Remainders will have one of the 17 values
0, 1, 2, . . . , 16.
Then some goodly number
it in an Excel spreadsheet, in about 2 minutes.
David de Jongh
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of John Gilmore
Sent: Thursday, November 01, 2012 5:15 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Curosity Question
no asynchronous exit routine can interrupt another
asynchronous exit routine
Perhaps VTAM does something special, but in general this is not true.
Nothing comes to mind that would truly allow VTAM to accomplish the
statement above 100% of the time if it applied to all asynchronous exits,
so it's
no asynchronous exit routine can interrupt another
asynchronous exit routine
Perhaps VTAM does something special, but in general this is not true.
Peter Relson
z/OS Core Technology Design
@LISTSERV.UGA.EDU
Sent: Wednesday, June 01, 2011 2:23 PM
Subject: Re: A Curosity Question
no asynchronous exit routine can interrupt another
asynchronous exit routine
Perhaps VTAM does something special, but in general this is not true.
Peter Relson
z/OS Core Technology Design
Serious users of VTAM exits (e.g. session managers) run authorized and set
their LUs fastpath. VTAM responds by using SRB intead of IRB.
Old memory, but no protection was in place to handle same exit running
multiple times. May have had something to do that sends and receives were
executed on
On Wed, 1 Jun 2011 09:42:52 -0400 Kirk Talman wrote:
I remember a case where one of our exits was
non-rent. The fix was labeled any abend anywhere any time any
symptom.
Been there done that - I like that fix description.
In-house system (non VTAM) exit was pseudo rent - took about 40
minutes
On 6/1/2011 7:39 AM, Gerhard Postpischil wrote:
Some years ago I was asked to do maintenance on an ISV's
package. While I found dozens of errors, one 0Cx was due to a
LOGON and a non-VTAM exit triggering at the same time, using the
same save area. What is more interesting, that program had been
On 6/1/2011 10:21 AM, Edward Jaffe wrote:
VTAM schedules only one exit at a time. It's amazing how many
people erroneously
believe that this implies a restriction on IRB scheduling in
general. Do they
imagine that STIMER[M] exits can't run while a VTAM exit is in
control (or vice
versa)? Would a
Shane,
Serious mongrel to diagnose ...
Sounds like good fun ;-)
--
Martin
Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE
more at http://www.picapcpu.de
Mason
- Original Message -
From: Paul Gilmartin paulgboul...@aim.com
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Sent: Monday, May 30, 2011 6:26 PM
Subject: Re: A Curosity Question
On May 30, 2011, at 09:54, Chris Mason wrote:
..., with the exception ..., no asynchronous
exit routine can
, 2011 5:18 PM
Subject: Re: A Curosity Question
On Mon, 30 May 2011 14:16:06 GMT esst...@juno.com esst...@juno.com
wrote:
:I was Reading about Asyhcronous Exits in z/OS.
:This involves issuing the CIRB and SCHDEXIT macro to schedule the IRB
:for an Asychcronous Exit.
:
:Are these macros used today
On May 30, 2011, at 09:54, Chris Mason wrote:
..., with the exception ..., no asynchronous
exit routine can interrupt another asynchronous exit routine;
...
Is this accomplished as simply as by inserting the RB in a
suitable position in the RB queue? Is this facility GUPI?
-- gil
40 matches
Mail list logo
