Re: Instruction Set Architecture

2010-09-13 Thread Tom Marchant
On Sun, 12 Sep 2010 17:53:13 -0400, Justin R. Bendich wrote: LAR1,256 - Line 1 USING 256,R1 - Line 2 LAR3,512(R2) - Line 3 The thread has been that, because of line 2, the assembler will generate line 3 as follows: 4132 1100LA

Re: Instruction Set Architecture

2010-09-13 Thread Tony Harminc
On 12 September 2010 17:53, Justin R. Bendich jbend...@austin.rr.com wrote: LAR1,256 - Line 1 USING 256,R1 - Line 2 LAR3,512(R2) - Line 3 The thread has been that, because of line 2, the assembler will generate line 3 as follows: 4132

Re: Instruction Set Architecture

2010-09-12 Thread Justin R. Bendich
LAR1,256 - Line 1 USING 256,R1 - Line 2 LAR3,512(R2) - Line 3 The thread has been that, because of line 2, the assembler will generate line 3 as follows: 4132 1100LAR3,512(R2) If what i really want is for R3 to contain R2 +

Re: Instruction Set Architecture

2010-09-12 Thread Binyamin Dissen
On Sun, 12 Sep 2010 17:53:13 -0400 Justin R. Bendich jbend...@austin.rr.com wrote: :LAR1,256 - Line 1 : USING 256,R1 - Line 2 : LAR3,512(R2) - Line 3 :The thread has been that, because of line 2, the assembler will :generate line 3 as follows: :

Re: Instruction Set Architecture

2010-09-12 Thread Justin R. Bendich
On Mon, 13 Sep 2010 00:11:43 +0200, Binyamin Dissen bdis...@dissensoftware.com wrote: On Sun, 12 Sep 2010 17:53:13 -0400 Justin R. Bendich jbend...@austin.rr.com wrote: : LAR1,256 - Line 1 : USING 256,R1 - Line 2 : LAR3,512(R2) - Line 3

Re: Instruction Set Architecture

2010-09-12 Thread Paul Gilmartin
On Sep 12, 2010, at 21:44, Justin R. Bendich wrote: : LAR3,512(R2,) - Variant 2 :or : LAR3,512(,R2) - Variant 3 :? The latter, as the assembler will not insert an index register. So, you're saying that, in Variant 2, it could fill in the missing base

Re: Instruction Set Architecture

2010-09-11 Thread robin
From: McKown, John john.mck...@healthmarkets.com Sent: Tuesday, 7 September 2010 10:46 PM OK, a bit of a brain freeze on my part. Are you saying that the results, in general, of an ADD vs. an ADD Logical (such as AR vs. ALR) will result in a different result in the value (bit pattern) stored in

Re: Instruction Set Architecture

2010-09-11 Thread robin
From: Fred van der Windt fred.van.der.wi...@mail.ing.nl Sent: Thursday, 9 September 2010 3:02 PM LHR1,=H'-4096' USING -4096,R1 LAR2,* LAR3,-4(,R2) What does R3 now address? This caused a great deal of debate on this list several years ago. Very

Re: Instruction Set Architecture

2010-09-11 Thread robin
From: Paul Gilmartin paulgboul...@aim.com Sent: Saturday, 11 September 2010 12:15 AM True for any discussion of whether adding a negative number (or the two's complement of a positive number) is equivalent (algebraically or conceptually) to subtracting its magnitude. But the technique of

Re: Instruction Set Architecture

2010-09-11 Thread robin
From: Tom Marchant m42tom-ibmm...@yahoo.com Sent: Friday, 10 September 2010 11:12 PM On Fri, 10 Sep 2010 16:53:53 +1000, robin wrote: From: Paul Gilmartin Sent: Thursday, 9 September 2010 4:32 PM I would firmly oppose such a gentle correction. Take a broad view. Which has the more obvious

Re: Instruction Set Architecture

2010-09-10 Thread robin
From: Steve Smith sasd...@gmail.com Sent: Friday, 10 September 2010 7:53 AM On 9/8/2010 22:05, robin wrote: From: Tony Harminc t...@harminc.com Sent: Thursday, 9 September 2010 7:14 AM On 8 September 2010 15:09, Tom Marchant m42tom-ibmm...@yahoo.com wrote: The result is the same, of

Re: Instruction Set Architecture

2010-09-10 Thread robin
From: Paul Gilmartin paulgboul...@aim.com Sent: Thursday, 9 September 2010 4:32 PM I would firmly oppose such a gentle correction. Take a broad view. Which has the more obvious meaning: LAR3,-4(R2) Set R3 to 4 less than R2 It doesn't. It sums 4092 and the content of R2.

Re: Instruction Set Architecture

2010-09-10 Thread Tom Marchant
On Fri, 10 Sep 2010 16:53:53 +1000, robin wrote: From: Paul Gilmartin Sent: Thursday, 9 September 2010 4:32 PM I would firmly oppose such a gentle correction. Take a broad view. Which has the more obvious meaning: LAR3,-4(R2) Set R3 to 4 less than R2 It doesn't. It sums

Re: Instruction Set Architecture

2010-09-10 Thread Paul Gilmartin
On Sep 10, 2010, at 00:53, robin wrote: From: Paul Gilmartin paulgboul...@aim.com Sent: Thursday, 9 September 2010 4:32 PM I would firmly oppose such a gentle correction. Take a broad view. Which has the more obvious meaning: LAR3,-4(R2) Set R3 to 4 less than R2 It

Re: Negative displacements (was: Instruction Set Architecture)

2010-09-10 Thread Walt Farrell
On Thu, 9 Sep 2010 15:53:49 -0400, Thomas David Rivers riv...@dignus.com wrote: I'm trying to determine why this would assemble the instruction at line #3. (We have to make some kind of assumption that allows the negative absolute value as the first operand of the USING, which both HLASM

Re: Negative displacements (was: Instruction Set Architecture)

2010-09-10 Thread Paul Gilmartin
On 09/10/10 08:29, Walt Farrell wrote: How about this interpretation? The offset is 4092 from the value in R1, since R1 addresses from -4096 to -1, and -4 - (-4096) is 4092. 4092 = FFC. Another HLASM test case: Active Usings: None Loc Object CodeAddr1 Addr2 Stmt Source Statement

Re: Instruction Set Architecture (Subject: corrected)

2010-09-09 Thread Paul Gilmartin
On 9/9/2010 12:14 AM, Fred van der Windt wrote: Once my erroneous comma is removed, you can walk a lot further. Read John Ehrman's article, as cited earlier by Michael Stack: http://www.kcats.org/csci/464/ho/usingtechnique.shtml Not really. The offset will still and always allow you to

Re: Instruction Set Architecture (Subject: corrected)

2010-09-09 Thread Fred van der Windt
Well As demonstrated by this very discussion the first form will baffle just about any programmer. And the 'missing' comma is (at least with us) a bad habit as well. LAR3,-4(R2) Set R3 to 4 less than R2 or: LAR3,4092(R1,R2) Set R3 to 4 less than R2

{Spam?} Re: Instruction Set Architecture

2010-09-09 Thread robin
From: Tony Harminc t...@harminc.com Sent: Thursday, 9 September 2010 2:04 AM On 8 September 2010 07:39, robin robi...@dodo.com.au wrote: From: Tony Harminc t...@harminc.com Sent: Wednesday, 8 September 2010 9:20 AM It's also how classic (base displacement) addressing arithmetic, which we

Re: Instruction Set Architecture

2010-09-09 Thread robin
From: Tony Harminc t...@harminc.com Sent: Thursday, 9 September 2010 7:14 AM On 8 September 2010 15:09, Tom Marchant m42tom-ibmm...@yahoo.com wrote: On Wed, 8 Sep 2010 08:35:42 -0600, Paul Gilmartin wrote: On Sep 8, 2010, at 05:39, robin wrote: Classic base-displacement atithmetic is

Re: Instruction Set Architecture

2010-09-09 Thread Rob van der Heij
Boys! You stop fighting or I stop the car and put the assembler away until we get home. | Rob

Re: Instruction Set Architecture

2010-09-09 Thread Steve Smith
On 9/8/2010 22:05, robin wrote: From: Tony Harminc t...@harminc.com Sent: Thursday, 9 September 2010 7:14 AM On 8 September 2010 15:09, Tom Marchant m42tom-ibmm...@yahoo.com wrote: On Wed, 8 Sep 2010 08:35:42 -0600, Paul Gilmartin wrote: On Sep 8, 2010, at 05:39, robin wrote: Classic

Re: Instruction Set Architecture

2010-09-09 Thread robin
From: Tony Harminc t...@harminc.com Sent: Thursday, 9 September 2010 7:14 AM The relevant part of the zArch POO puts it this way: In forming the intermediate sum, the base address and index are treated as 64-bit binary integers. A 12-bit displacement is treated as a 12-bit unsigned binary

Re: Instruction Set Architecture

2010-09-08 Thread Tom Marchant
On Wed, 8 Sep 2010 08:35:42 -0600, Paul Gilmartin wrote: On Sep 8, 2010, at 05:39, robin wrote: Classic base-displacement atithmetic is always addition, never subtraction. Ahem. LHR1,=H'-4096' USING -4096,R1 LAR2,* LAR3,-4(,R2) What does R3

Re: Instruction Set Architecture

2010-09-08 Thread bixoft
@LISTSERV.UGA.EDU Sent: Wednesday, September 08, 2010 9:09 PM Subject: Re: Instruction Set Architecture On Wed, 8 Sep 2010 08:35:42 -0600, Paul Gilmartin wrote: On Sep 8, 2010, at 05:39, robin wrote: Classic base-displacement atithmetic is always addition, never subtraction. Ahem. LH

Re: Instruction Set Architecture

2010-09-08 Thread Tony Harminc
On 8 September 2010 15:09, Tom Marchant m42tom-ibmm...@yahoo.com wrote: On Wed, 8 Sep 2010 08:35:42 -0600, Paul Gilmartin wrote: On Sep 8, 2010, at 05:39, robin wrote: Classic base-displacement atithmetic is always addition, never subtraction. Ahem. LHR1,=H'-4096'

Re: Instruction Set Architecture

2010-09-08 Thread Paul Gilmartin
On Sep 8, 2010, at 15:14, Tony Harminc wrote: On 8 September 2010 15:09, Tom Marchant m42tom-ibmm...@yahoo.com wrote: On Wed, 8 Sep 2010 08:35:42 -0600, Paul Gilmartin wrote: On Sep 8, 2010, at 05:39, robin wrote: Classic base-displacement atithmetic is always addition, never subtraction.

Re: Instruction Set Architecture

2010-09-08 Thread Fred van der Windt
I'm surprised that this would assemble. R:F 0 20 USING TEST5,R15 21 * 4810 F0100001022 LHR1,=H'-4096' R:1 FFF000 23 USING -4096,R1 0004 4120 F004

Re: Instruction Set Architecture

2010-09-08 Thread Paul Gilmartin
On 9/8/2010 11:15 PM, Fred van der Windt wrote: I'm surprised that this would assemble. R:F 0 20 USING TEST5,R15 21 * 4810 F0100001022 LHR1,=H'-4096' R:1 FFF000

Re: Instruction Set Architecture

2010-09-07 Thread robin
From: John McKown joa...@swbell.net Sent: Tuesday, 7 September 2010 6:01 AM Funny, to me, is that RISC was supposed to be the wave of the future (way back when) due to simpler and faster hardware That was vogue when the capabilities of microprocessors were somewhat limited. The difficulty

Re: Instruction Set Architecture

2010-09-07 Thread McKown, John
-Original Message- From: IBM Mainframe Assembler List [mailto:assembler-l...@listserv.uga.edu] On Behalf Of Robert A. Rosenberg Sent: Tuesday, September 07, 2010 12:26 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: Instruction Set Architecture At 15:01 -0500 on 09/06/2010

Re: Instruction Set Architecture

2010-09-07 Thread Steve Comstock
On 9/6/2010 6:11 PM, John R. Ehrman (408-463-3543 T/543-) wrote: Dan Greiner's SHARE presentation on the new z196 instructions might help. John Ehrman I agree. It is an excellent presentation. (-- Referenced Note Follows ) Date: 6 September 2010,

Re: Instruction Set Architecture

2010-09-06 Thread Robert A. Rosenberg
At 15:01 -0500 on 09/06/2010, John McKown wrote about Instruction Set Architecture: But some are a bit confusing to me. A case in point is the ALSI instruction. It adds a signed immediate byte value (-128..+127) to 32 or 64 bit __unsigned__ integer. OK, this a 6 byte (3 halfword) instruction