Leo,
The RestoreS3PageTables() in S3Resume.c may only build 4G page table when
Build4GPageTableOnly is TRUE.
The page fault handler PageFaultHandler() in
MdeModulePkg\Universal\Acpi\BootScriptExecutorDxe\X64\SetIdtEntry.c is to
co-work with it.
Since BootScriptExecutorDxe is a standalone
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=363
The definition name for ACPI IO Remapping Table signature is incorrect
in Acpi60.h and Acpi61.h as below:
The name should be changed to
EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE
EFI_ACPI_6_1_IO_REMAPPING_TABLE_SIGNATURE
The comments
///
Leo,
If this PCD is only to patch address, could you make sure the other fields not
to be updated in case the platform set the other fields in PCD.
PageTable setup in DxeIpl is in boot service data range. If this feature is
only supported in POST phase, that's enough.
Thanks!
Jeff
> On 10 Feb 2017, at 06:34, Ard Biesheuvel wrote:
>
>
>
>> On 10 Feb 2017, at 02:26, Yao, Jiewen wrote:
>>
>> Very good question.
>>
>> 1) Yes, I did test UEFI OS boot, which is mentioned in V1 summary:
>> ==
>> Tested OS: UEFI
> On 10 Feb 2017, at 02:26, Yao, Jiewen wrote:
>
> Very good question.
>
> 1) Yes, I did test UEFI OS boot, which is mentioned in V1 summary:
> ==
> Tested OS: UEFI Win10, UEFI Ubuntu 16.04.
> ==
>
> 2) Star helps double confirm that OS already
Reviewed-by: Ye Ting
-Original Message-
From: Zhang, Lubo
Sent: Friday, February 10, 2017 11:38 AM
To: Wu, Jiaxin ; edk2-devel@lists.01.org
Cc: Santhapur Naveen ; Ye, Ting ;
Fu, Siyuan
Reviewed-by: Ye Ting
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Zhang
Lubo
Sent: Friday, February 10, 2017 11:18 AM
To: edk2-devel@lists.01.org
Cc: Ye, Ting ; Fu, Siyuan ; Wu,
Andrew:
I agree with you. Could you help submit the tracker in bugzilla for this
request?
>-Original Message-
>From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
>Andrew Fish
>Sent: Friday, February 10, 2017 11:31 AM
>To: edk2-devel
Got it. Thanks!
From: Gao, Liming
Sent: Thursday, February 9, 2017 7:30 PM
To: Yao, Jiewen ; edk2-devel@lists.01.org
Cc: Kinney, Michael D ; Laszlo Ersek
Subject: RE: [edk2] [PATCH 02/12] MdePkg/SmiHandlerProfileLibNull: Add
Hi Jeff,
The new PCD is intended to be OR'ed with the address (upper bits).
Leo.
> -Original Message-
> From: Fan, Jeff [mailto:jeff@intel.com]
> Sent: Thursday, February 09, 2017 8:23 PM
> To: Duran, Leo ; edk2-de...@ml01.01.org
> Cc: Tian, Feng
Yes, I just find the typo error.
Thanks
Lubo
-Original Message-
From: Wu, Jiaxin
Sent: Friday, February 10, 2017 11:33 AM
To: Zhang, Lubo ; edk2-devel@lists.01.org
Cc: Santhapur Naveen ; Ye, Ting ;
Fu, Siyuan
Need change the commit log, replace the 'ifconfig -l' with 'ifconfig6 -l' since
it's the fix for IPv6.
Others is good to me.
Reviewed-by: Wu Jiaxin
Thanks,
Jiaxin
> -Original Message-
> From: Zhang, Lubo
> Sent: Friday, February 10, 2017 11:18 AM
> To:
Some one was asking me why the PCI VendorIds are not included in the MdePkg
and my answer was it seems like a good idea to me.
We don't have to go crazy as we only really need the VendorIds for vendors who
make things that EFI deals with. It is probably easy enough to get an initial
list,
Reviewed-by: Wu Jiaxin
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Zhang Lubo
> Sent: Friday, February 10, 2017 11:18 AM
> To: edk2-devel@lists.01.org
> Cc: Ye, Ting ; Fu, Siyuan
One minor comment. This library type is DXE_SMM_DRIVER. It should include
, not
With this change, Reviewed-by: Liming Gao .
>-Original Message-
>From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
>Jiewen Yao
>Sent: Thursday, February 09, 2017
Reviewed-by: Liming Gao
>-Original Message-
>From: Yao, Jiewen
>Sent: Thursday, February 09, 2017 12:30 AM
>To: edk2-devel@lists.01.org
>Cc: Kinney, Michael D ; Gao, Liming
>; Laszlo Ersek
Currently, When there are more than 9 Ethernet ports available,
'ifconfig -l' is not listing all the ports, only show the ports 0 to 9.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zhang Lubo
Cc: Santhapur Naveen
Cc: Ye
Currently, When there are more than 9 Ethernet ports available,
'ifconfig -l' is not listing all the ports, only show the ports 0 to 9.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zhang Lubo
Cc: Santhapur Naveen
Cc: Ye
Reviewed-by: Liming Gao
>-Original Message-
>From: Ni, Ruiyu
>Sent: Thursday, February 09, 2017 10:07 AM
>To: edk2-devel@lists.01.org
>Cc: Gao, Liming ; Fan, Jeff
>Subject: [PATCH v4 6/6] MdePkg/Pci22.h: Deprecate
When set value to the array "InputText", the index was used incorrectly.
And the array "InputText" is not initialized. These will cause some value
in the array is random, so it will be shown incorrectly sometimes.
This patch is to fix this issue.
https://bugzilla.tianocore.org/show_bug.cgi?id=358
Very good question.
1) Yes, I did test UEFI OS boot, which is mentioned in V1 summary:
==
Tested OS: UEFI Win10, UEFI Ubuntu 16.04.
==
2) Star helps double confirm that OS already takes over the control of
page table on SetVirtualAddressMap().
See below log on UEFI Win10.
Hi Leo,
I want to understand your usage model. What fields are you going to update in
below Page Table Entry by the new PCD?
typedef union {
struct {
UINT64 Present:1;// 0 = Not present in memory, 1 = Present
in memory
UINT64 ReadWrite:1; // 0 =
Reviewed-by: Jaben Carsey
> -Original Message-
> From: Zeng, Star
> Sent: Thursday, February 09, 2017 1:24 AM
> To: edk2-devel@lists.01.org
> Cc: Zeng, Star ; Ni, Ruiyu ;
> Carsey, Jaben
> Subject:
On 02/08/2017 07:59 PM, Tim Lewis wrote:
> Also, on many systems, the output will be invisible, since boot screen output
> is a platform policy. In general, using DEBUG() is better, since it can
> either be redirected to StdErr() or through the serial port.
>
> Tim
Thanks all, I do have some
On 9 February 2017 at 19:33, Laszlo Ersek wrote:
> On 02/09/17 18:56, Ard Biesheuvel wrote:
>> On 9 February 2017 at 16:40, Leo Duran wrote:
>>> This patch adds the new DxeBmDmaLib (BmDmaLib class) library, which
>>> provides an abstraction layer for DMA
On 02/09/17 03:06, Ruiyu Ni wrote:
> DEVICE_ID_NOCARE is defined as 0x but Spec says (UINT64) -1
> should be used to match any VendorId/DeviceId/RevisionId/
> SubsystemVendorId/SubsystemDeviceId.
>
> PCI_BAR_OLD_ALIGN/PCI_BAR_EVEN_ALIGN/PCI_BAR_SQUAD_ALIGN/
> PCI_BAR_DQUAD_ALIGN are defined
On 02/09/17 18:56, Ard Biesheuvel wrote:
> On 9 February 2017 at 16:40, Leo Duran wrote:
>> This patch adds the new DxeBmDmaLib (BmDmaLib class) library, which
>> provides an abstraction layer for DMA operations implemented by the
>> PciHostBridgeDxe driver.
>>
>> Cc: Laszlo
From: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
Signed-off-by: Girish Pathak
Signed-off-by: Evan Lloyd
Tested-by: Girish Pathak
From: Ard Biesheuvel
Utilise the new HardwareInterrupt2 protocol to adjust the
Edje/Level characteristics of the Watchdog interrupt.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
Signed-off-by: Girish
From: Girish Pathak
This change implements GetTriggerType and SetTriggerType functions
in ArmGicV2Dxe (GicV2GetTriggerType/GicV2SetTriggerType)
and ArmGicV3Dxe (GicV3GetTriggerType/GicV3SetTriggerType)
SetTriggerType configures the interrupt mode of an interrupt
as edge
From: Ard Biesheuvel
The existing HardwareInterrupt protocol lacks the method to configure
the level/edge and polarity properties of an interrupt. So introduce a
new protocol HardwareInterrupt2, and add some new members that allow the
manipulation of those properties.
From: Evan Lloyd
This series of patches corrects a problem detected on the ARM Juno
platform that is actually generic (at least to ARM GIC platforms).
The HardwareInterrupt protocol had no means of handling characteristics
like Edge/Level triggered and polarity.
A new
On 9 February 2017 at 16:40, Leo Duran wrote:
> This patch adds the new DxeBmDmaLib (BmDmaLib class) library, which
> provides an abstraction layer for DMA operations implemented by the
> PciHostBridgeDxe driver.
>
> Cc: Laszlo Ersek
> Cc: Ard Biesheuvel
Since the new DXE page protection for PE/COFF images may invoke
EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes() with only permission
attributes set, add support for this in the AARCH64 MMU code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
Currently, we have not implemented support on 32-bit ARM for managing
permission bits in the page tables. Since the new DXE page protection
for PE/COFF images may invoke EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes()
with only permission attributes set, let's simply ignore those for now.
The single user of EfiAttributeToArmAttribute () is the protocol
method EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes(), which uses the
return value to compare against the ARM attributes of an existing mapping,
to infer whether it is actually necessary to change anything, or whether
the requested
From: Jiewen Yao
Current Arm CpuDxe driver uses EFI_MEMORY_WP for write protection,
according to UEFI spec, we should use EFI_MEMORY_RO for write protection.
The EFI_MEMORY_WP is the cache attribute instead of memory attribute.
Cc: Leif Lindholm
The upcoming DXE image protection feature expects the EFI_CPU_ARCH_PROTOCOL
method SetMemoryAttributes() to deal with invocations that only modify
permission attributes, but leave the cacheability attributes alone. This
requires some groundwork to be performed in the MMU code for ARM.
Patch #1 is
Reviewed-by: Jaben Carsey
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Star Zeng
> Sent: Thursday, February 09, 2017 1:23 AM
> To: edk2-devel@lists.01.org
> Cc: Ni, Ruiyu ; Carsey, Jaben
>
> On Feb 9, 2017, at 6:05 AM, Jun Nie wrote:
>
> 2017-02-09 21:44 GMT+08:00 Jun Nie :
>> I am new to UEFI and trying to boot Linux with LinuxLoader app. But I
>> cannot find detail information for below questions. Could anyone point
>> out where I can
On 9 February 2017 at 16:30, Ard Biesheuvel wrote:
> On 9 February 2017 at 16:29, Yao, Jiewen wrote:
>> Very good point.
>>
>> Can ARCH64 set 4K paging for 64K aligned runtime memory?
>>
>
> UEFI always uses 4 KB, but the OS may use 64 KB, so to
This patch adds the new DxeBmDmaLib (BmDmaLib class) library, which
provides an abstraction layer for DMA operations implemented by the
PciHostBridgeDxe driver.
Cc: Jordan Justen
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement
The BmDmaLib class library provides an abstraction layer for Bus-master DMA
operations as currently implemented by the PciHostBridgeDxe driver. The
intent is to allow override of the library as required by specific hardware
implementations, such as AMD's Secure Encrypted Virtualization (SEV).
Cc:
This patch provides an abstraction layer for Bus-master DMA operations as
currently implemented by the PciHostBridgeDxe driver. The intent is to then
allow override of this library as may be required by specific hardware
implementations, such as AMD's Secure Encrypted Virtualization (SEV).
This
This patch adds the new DxeBmDmaLib (BmDmaLib class) library, which
provides an abstraction layer for DMA operations implemented by the
PciHostBridgeDxe driver.
Cc: Feng Tian
Cc: Star Zeng
Contributed-under: TianoCore Contribution Agreement 1.0
This series provides an abstraction layer for Bus-master DMA operations as
currently implemented by the PciHostBridgeDxe driver. The intent is to then
allow override of this library as may be required by specific hardware
implementations, such as AMD's Secure Encrypted Virtualization (SEV).
This patch adds the new DxeBmDmaLib (BmDmaLib class) library, which
provides an abstraction layer for DMA operations implemented by the
PciHostBridgeDxe driver.
Cc: Maurice Ma
Cc: Prince Agyeman
Contributed-under: TianoCore Contribution Agreement
This patch adds the new DxeBmDmaLib (BmDmaLib class) library, which
provides an abstraction layer for DMA operations implemented by the
PciHostBridgeDxe driver.
Cc: Laszlo Ersek
Cc: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement
On 9 February 2017 at 16:29, Yao, Jiewen wrote:
> Very good point.
>
> Can ARCH64 set 4K paging for 64K aligned runtime memory?
>
UEFI always uses 4 KB, but the OS may use 64 KB, so to create the
virtual address map it needs the runtime regions to be 64 KB aligned.
>
>
>
Very good point.
Can ARCH64 set 4K paging for 64K aligned runtime memory?
If yes, how about we use
“ImageRecord->ImageSize = ALIGN_VALUE(LoadedImage->ImageSize, EFI_PAGE_SIZE);”
Thank you
Yao Jiewen
From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
Sent: Thursday, February 9, 2017 8:21
On 9 February 2017 at 15:28, Ard Biesheuvel wrote:
> On 9 February 2017 at 15:27, Yao, Jiewen wrote:
>> 1) That is great. I appreciate your quick response and help.
>>
>> I will drop my patch for ARM 2/4, and wait for yours.
>>
>
> OK
>
>>
Cc: Chao Zhang
Cc: Long Qin
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yao Jiewen
---
SecurityPkg/Include/Library/Tpm2CommandLib.h | 22 +-
1) That is great. I appreciate your quick response and help.
I will drop my patch for ARM 2/4, and wait for yours.
2) For ImageEnd alignment issue, I agree with you.
I plan to round up with:
ImageRecord->ImageSize = ALIGN_VALUE(LoadedImage->ImageSize, SectionAlignment);
before
On 9 February 2017 at 15:27, Yao, Jiewen wrote:
> 1) That is great. I appreciate your quick response and help.
>
> I will drop my patch for ARM 2/4, and wait for yours.
>
OK
>
>
> 2) For ImageEnd alignment issue, I agree with you.
>
> I plan to round up with:
>
All,
I've changed the 'Subject' line to avoid confusion.
Thanks,
Leo.
> -Original Message-
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Thursday, February 09, 2017 3:46 AM
> To: Zeng, Star ; Yao, Jiewen ;
> Duran, Leo
Hi Ray.
I'll review what I previously sent, and will resend if necessary.
Thanks,
Leo.
> -Original Message-
> From: Ni, Ruiyu [mailto:ruiyu...@intel.com]
> Sent: Wednesday, February 08, 2017 7:59 PM
> To: Duran, Leo ; edk2-devel@lists.01.org
> Cc: Tian, Feng
Hi Jun,
On Thu, Feb 09, 2017 at 10:05:50PM +0800, Jun Nie wrote:
> 2017-02-09 21:44 GMT+08:00 Jun Nie :
> > I am new to UEFI and trying to boot Linux with LinuxLoader app. But I
> > cannot find detail information for below questions. Could anyone point
> > out where I can
On 9 February 2017 at 14:08, Yao, Jiewen wrote:
> For X86 CPU, the memory protection attribute goes to page table, the cache
> attribute goes to MTRR register.
>
> Those are 2 difference resource, and can be set separately.
>
>
>
> The high level pseudo code is below:
>
>
I forget mentioning the V3 update also include below 2 feedback:
=
4) Rename file PageTableLib.h/.c to CpuPageTable.h/.c file (from Jeff Fan)
5) Remove multi-entrypoint usage (from Liming Gao/Mike Kinney)
=
Thank you
Yao Jiewen
>
For X86 CPU, the memory protection attribute goes to page table, the cache
attribute goes to MTRR register.
Those are 2 difference resource, and can be set separately.
The high level pseudo code is below:
===
CacheAttribute = Attribute & CACHE_ATTRIBUTE_MASK
2017-02-09 21:44 GMT+08:00 Jun Nie :
> I am new to UEFI and trying to boot Linux with LinuxLoader app. But I
> cannot find detail information for below questions. Could anyone point
> out where I can find related information or example code? Thanks for
> your time!
>
> 1. How
Thank you Ard. I check the ARM code again.
It seems the ARM CPU driver is similar as X86 CPU driver - it installs CpuArch
protocol, then SyncCacheConfig.
Status = gBS->InstallMultipleProtocolInterfaces (
,
, ,
,
On 02/09/17 10:17, Zeng, Star wrote:
> EFI_HOB_CPU?
> Is there discussion in PIWG for it?
None that I'm aware of.
Thanks
Laszlo
>
> Thanks,
> Star
> -Original Message-
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Thursday, February 9, 2017 5:13 PM
> To: Zeng, Star
Type 0: Update "EDD Enhanced Disk Driver)..." to
"EDD (Enhanced Disk Driver)..." for
STR_SMBIOSVIEW_PRINTINFO_EDD_ENHANCED_DRIVER
Type 3: Use L" Laptop" instead of L" LapTop" in
SystemEnclosureTypeTable to match SMBIOS spec.
Type 10: The BIT7 of Device Type is representing the
status of device
Current PrintBitsInfo() will always print an additional trailing
" | " for the bit flags, for example,
Base Board Feature Flags: Hosting board | Replaceable |
Th patch is to eliminate trailing " | " in PrintBitsInfo(), then
the output will be like below
Base Board Feature Flags: Hosting board
On 9 February 2017 at 09:09, Ard Biesheuvel wrote:
> On 9 February 2017 at 08:49, Ard Biesheuvel wrote:
>> On 9 February 2017 at 07:43, Yao, Jiewen wrote:
>>> Hi Lindholm/Ard
>>> This version 3 contains both of your
Seemingly not big problem since OVMF does not support 64BITs waking vector.
Thanks,
Star
-Original Message-
From: Laszlo Ersek [mailto:ler...@redhat.com]
Sent: Thursday, February 9, 2017 5:10 PM
To: Zeng, Star ; Yao, Jiewen ;
Duran, Leo
EFI_HOB_CPU?
Is there discussion in PIWG for it?
Thanks,
Star
-Original Message-
From: Laszlo Ersek [mailto:ler...@redhat.com]
Sent: Thursday, February 9, 2017 5:13 PM
To: Zeng, Star ; Yao, Jiewen ;
Duran, Leo ;
On 02/09/17 04:49, Gao, Liming wrote:
> Hi, all
> Edk2 svn mirror works now!
>
> Thanks
> Liming
>> -Original Message-
>> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Gao,
>> Liming
>> Sent: Thursday, February 09, 2017 9:54 AM
>> To: Laszlo Ersek
On 02/09/17 06:26, Zeng, Star wrote:
> Correct typo in below email.
>
> "about how to determine DXE is 32BITs or 64BITs" should be "about how
> to determine PEI is 32BITs or 64BITs".
>
> At that time, we were discussing if the code needs to allocate <4G
> ACPI table for PEI phase at S3 resume.
On 02/09/17 06:56, Zeng, Star wrote:
> Stick to current comments and code, OvmfPkg X64 has bug? J
>
>
>
> PCD comments:
>
> #
> It is assumed that 64-bit DxeCore is built in firmware if it is true;
> otherwise 32-bit DxeCore
>
>
>
> Code pieces in S3ResumePei, S3SaveStateDxe,
On 9 February 2017 at 08:49, Ard Biesheuvel wrote:
> On 9 February 2017 at 07:43, Yao, Jiewen wrote:
>> Hi Lindholm/Ard
>> This version 3 contains both of your feedback before.
>>
>> If you can do me a favor to evaluated the impact to ARM, that
On 02/09/17 03:08, Dandan Bi wrote:
> This patch is to fix the IA32/NOOPT/VS Toolchain build failure.
> The VS2015 failure log as below:
> QemuBootOrderLib.lib(ExtraRootBusMap.obj) :
> error LNK2001: unresolved external symbol __allmul
> s:\..\Build\OvmfIa32\NOOPT_VS2015\IA32\MdeModulePkg\
>
On 9 February 2017 at 07:43, Yao, Jiewen wrote:
> Hi Lindholm/Ard
> This version 3 contains both of your feedback before.
>
> If you can do me a favor to evaluated the impact to ARM, that will be great.
>
I will take a look right away.
> Thank you
> Yao Jiewen
>
>>
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