Spec required for VOID* VPD Pcd, Ascii string use byte alignment, byte
array use 8-byte alignment, unicode string use 2-byte alignment.
while when the VPD pcd offset use *, the offset generated in the .map
file not follow this rule.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-of
Reviewed-by: Hao Wu
Best Regards,
Hao Wu
> -Original Message-
> From: Wu, Jiaxin
> Sent: Tuesday, January 30, 2018 10:04 AM
> To: edk2-devel@lists.01.org
> Cc: Ni, Ruiyu; Wu, Hao A; Ye, Ting; Fu, Siyuan; Wu, Jiaxin
> Subject: [Patch] Nt32Pkg/Nt32Pkg.fdf: Increase the size of FLASH Devi
Reviewed-by: Star Zeng
Thanks,
Star
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Heyi Guo
Sent: Tuesday, January 30, 2018 1:52 PM
To: leif.lindh...@linaro.org; linaro-u...@lists.linaro.org;
edk2-devel@lists.01.org; graeme.greg...@linaro.org
Cc
Reviewed-by: Benjamin You
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> art...@aheymans.xyz
> Sent: Wednesday, January 24, 2018 6:58 PM
> To: edk2-devel@lists.01.org
> Cc: Arthur Heymans
> Subject: [edk2] [PATCH] CorebootPayloadPkg: Use c
From: Ming Huang
The Type field of EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR should
be UINT8 as ACPI version 6.2 specification.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
Signed-off-by: Heyi Guo
---
MdePkg/Include/IndustryStandard/Acpi62.h | 2 +-
1 file cha
Correct processor struct of PPTT in Acpi62.h
Ming Huang (1):
MdePkg ACPI: Correct processor struct of PPTT
MdePkg/Include/IndustryStandard/Acpi62.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--
1.9.1
___
edk2-devel mailing list
edk2-dev
OK, I will refine the title soon.
Thanks.
On 2018/1/30 11:34, Zeng, Star wrote:
> The change looks good to me, Reviewed-by: Star Zeng .
>
> But the title seems not so correct.
> It is about EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR, but not
> EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR_FLAGS.
> How about
EBC build failure is caused by d7a09cb86a0416c099fa3a9e0fbe2c8f399b28de.
It changes MAX_UINTN definition as below. AuthVariableLib uses MAX_UINTN
in the global data initialization. New style has >> operator, and not
supported by EBC compiler. The fix is not to build AuthVariableLib for EBC.
#defin
EBC build failure is caused by d7a09cb86a0416c099fa3a9e0fbe2c8f399b28de.
It changes MAX_UINTN and MAX_ADDRESS definition as below. VarCheckUefiLib
and DxeCore uses MAX_UINTN and MAX_ADDRESS in the global data initialization.
New style has >> operator, and not supported by EBC compiler.
The fix is n
On 1/29/2018 7:09 PM, Jian J Wang wrote:
If enabled, NX memory protection feature will mark all free memory as
NX (non-executable), including page 0. This will overwrite the attributes
of page 0 if NULL pointer detection feature is also enabled and then
compromise the functionality of it. The sol
The change looks good to me, Reviewed-by: Star Zeng .
But the title seems not so correct.
It is about EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR, but not
EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR_FLAGS.
How about to refine the title?
Thanks,
Star
-Original Message-
From: edk2-devel [mailto:edk2-
From: Ming Huang
The Type field of EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR should
be UINT8 as ACPI version 6.2 specification.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
Signed-off-by: Heyi Guo
---
MdePkg/Include/IndustryStandard/Acpi62.h | 2 +-
1 file cha
From: Ming Huang
Correct processor flags struct of PPTT in Acpi62.h.
Ming Huang (1):
MdePkg ACPI: Correct processor flags struct of PPTT
MdePkg/Include/IndustryStandard/Acpi62.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--
1.9.1
___
Reviewed-by: Liming Gao
>-Original Message-
>From: Zhu, Yonghong
>Sent: Tuesday, January 30, 2018 9:50 AM
>To: edk2-devel@lists.01.org
>Cc: Feng, YunhuaX ; Gao, Liming
>
>Subject: [PATCH V2] BaseTools: Enhance parse performance by optimize
>ValueExpressionEx
>
>From: Yunhua Feng
>
>V2: H
Per DEC spec we added check that the datum type of a FeatureFlag PCD
must be BOOLEAN.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu
---
BaseTools/Source/Python/Workspace/DecBuildData.py | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/B
It is the first run code in X86 machine. It must be the raw execution code.
I suggest you try nasmb file for your usage.
Thanks
Liming
>-Original Message-
>From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
>Tiger Liu(BJ-RD)
>Sent: Tuesday, January 30, 2018 9:45 AM
>
Hi Jian
May I know how we handle MemoryMapEntry->NumberOfPages is 1?
The lengh will be 0 in that case. Should we add additional check?
> +SetUefiImageMemoryAttributes (
> + MemoryMapEntry->PhysicalStart + EFI_PAGE_SIZE,
> + LShiftU64 (MemoryMapEntry->NumberOfPages - 1,
>
Currently, the FV image size is not enough for the modules after
we enable some flags defined in Nt32Pkg.dsc, e.g:
DEFINE SECURE_BOOT_ENABLE = TRUE
DEFINE TLS_ENABLE = TRUE
DEFINE NETWORK_IP6_ENABLE = TRUE
This patch is to increase the size of FLASH Device to meet the req
From: Yunhua Feng
V2: Handle the case like {0} as value for UINT8/UINT16 type
Optimize ValueExpressionEx function to enhance meta-data file parse
performance.
Cc: Liming Gao
Cc: Yonghong Zhu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng
---
BaseTools/Sou
Hi, Liming:
Thanks for your reply!
I have another question:
Why not let sec code complied to obj file and linked to lib and EFI image?
I met a problem:
I tried to use IFDEF marco in an assembly inc file, and this inc file would be
included by ResetVec.asm16
But failed, it seemed asm 16 complier
Reviewed-by: Long Qin
Best Regards & Thanks,
LONG, Qin
-Original Message-
From: Zhang, Chao B
Sent: Tuesday, January 30, 2018 9:17 AM
To: edk2-devel@lists.01.org
Cc: Yao, Jiewen ; Long, Qin ; Zhang,
Chao B
Subject: [PATCH] SecurityPkg: Disable TPM interrupt in DEC
Disable TPM interr
Reviewed-by: Star Zeng
Thanks Hao's investigation and Ard's contribution.
Star
-Original Message-
From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
Sent: Monday, January 29, 2018 4:26 PM
To: Wu, Hao A ; Zeng, Star ; Ni, Ruiyu
Cc: edk2-devel@lists.01.org; leif.lindh...@linaro.or
Thanks.
Would you please update comment with - "Disable TPM interrupt support in DEC by
default to keep compatibility"
Reviewed-by: jiewen@intel.com
> -Original Message-
> From: Zhang, Chao B
> Sent: Tuesday, January 30, 2018 9:17 AM
> To: edk2-devel@lists.01.org
> Cc: Yao, Jiewen
Disable TPM interrupt support in DEC
Cc: Yao Jiewen
Cc: Long Qin
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang
---
SecurityPkg/SecurityPkg.dec | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/SecurityPkg/SecurityPkg.dec b/SecurityPkg/S
A few style comments below.
On Fri, Jan 26, 2018 at 04:00:40PM +0800, Ming Huang wrote:
> From: Jason Zhang
>
> This module support updating the boot CPU firmware only.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Jason Zhang
> Signed-off-by: Ming Huang
> Signe
On 01/29/18 10:02, Wang, Jian J wrote:
> Hi Laszlo,
>
> I don't know the history of these code but I guess they're converted
> from .asm file. That may be why there's "DB 66h" prefix. I think
> you're right these tricks should be replaced with more formal ways.
> Please submit a bz tracker for it.
So, I'm mostly happy with this set, but:
Sender (and hence Author for all patches that do not have a second
From: statement after Subject: ) for all patches here is
Ming Huang
Can you please address this, either by actually sending from Ming Huang, or
by adding a From:.
You can add my
Reviewed-
On Fri, Jan 26, 2018 at 04:06:16PM +0800, Heyi Guo wrote:
> The major features of this patchset:
> 1 Upgrade trusted firmware to 1.4
> 2 Workarounds for CVE-2017-5715 on Cortex A57/A72/A73 and A75 #1214
> 3 Delete some binary for open-source version
> 4 Update binary follow changing DmaLib to Coher
Liming,
Library/SmmCoreStandaloneEntryPoint.h does not exist in MdePkg.
It is supposed to exist in new package StandaloneSmmPkg.
However, with PI specification change, Library/MmCoreStandaloneEntryPoint.h
will exist in new StandaloneMmPkg
and discussion about the new package creation is going on
On Mon, Jan 29, 2018 at 04:13:40PM +, Ard Biesheuvel wrote:
> On 29 January 2018 at 16:01, Thomas Abraham wrote:
> > Hi Leif,
> >
> >> On Mon, Jan 29, 2018 at 8:21 PM, Leif Lindholm
> >> wrote:
> >> On Fri, Jan 26, 2018 at 10:34:59PM +0530, Thomas Abraham wrote:
> >> > The base models could
On 29 January 2018 at 16:01, Thomas Abraham wrote:
> Hi Leif,
>
>> On Mon, Jan 29, 2018 at 8:21 PM, Leif Lindholm
>> wrote:
>> On Fri, Jan 26, 2018 at 10:34:59PM +0530, Thomas Abraham wrote:
>> > The base models could have different values for the revision ID field
>> > in the System ID register
Hi Leif,
> On Mon, Jan 29, 2018 at 8:21 PM, Leif Lindholm
> wrote:
> On Fri, Jan 26, 2018 at 10:34:59PM +0530, Thomas Abraham wrote:
> > The base models could have different values for the revision ID field
> > in the System ID register. Base models do not have support for DVI and
> > so the rev
On 01/29/18 02:06, Wang, Jian J wrote:
> Hi Laszlo,
>
> We've found this issue. The patch for it has sent out at
>
> https://lists.01.org/pipermail/edk2-devel/2018-January/020467.html
>
> It will be checked in soon.
I've rebuilt OVMF @ c4122dcaadb9 ("SecurityPkg: Tcg2Smm: Enable TPM2.0
interr
On Mon, Jan 29, 2018 at 03:44:12PM +, Ard Biesheuvel wrote:
> Various updates for SynQuacer:
> - make the eval board more like the developerbox (graphical console,
> .iso boot)
> - set the CNTFRQ field of the MMIO timer
> - add a progress bar to the capsule update so people aren't left wonder
Reuse the BootLogoLib graphical progress bar to show the progress of a
capsule update, and in absence of a graphical console, write a period
to the text console for each block updated.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
Silicon/Socionext/Sy
Even though the ARM ARM quite clearly states that the CNTFRQ field of
each MMIO timer frame should be a read-only alias of the CNTFRQ field
of the base frame, the SynQuacer SoC implements it as a register that
is programmable separately.
So let's program it from the hardware rather than overriding
Add the drivers that make the serial and graphical console behave more
intuitively.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc | 6 ++
Platform/Socionext/SynQuacerEvalBoard/SynQuacerEv
Add the RamDiskDxe driver, which is required for HTTP booting .iso
images.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc | 2 ++
Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf |
Various updates for SynQuacer:
- make the eval board more like the developerbox (graphical console,
.iso boot)
- set the CNTFRQ field of the MMIO timer
- add a progress bar to the capsule update so people aren't left wondering
whether their system hangs
Ard Biesheuvel (4):
Platform/SynQuacer
On Mon, Jan 29, 2018 at 01:12:35PM +, Thomas Abraham wrote:
> Sorry, I don't mean to be pushy -- just wanted to know if there are
> any comments on this patch.
I don't mind the occasional prod, especially when I forget to respond
quickly to something I've promised to do so on in a side discuss
Supreeth:
I suggest to add all MM type and section definition in MdePkg. They are not
many. After they are added, SMM definition can be defined to MM value.
Thanks
Liming
> -Original Message-
> From: Supreeth Venkatesh [mailto:supreeth.venkat...@arm.com]
> Sent: Friday, January 26, 201
On Fri, Jan 26, 2018 at 10:34:59PM +0530, Thomas Abraham wrote:
> The base models could have different values for the revision ID field
> in the System ID register. Base models do not have support for DVI
> and so the revision ID field should also be masked out when checking
> for the presence of D
Supreeth:
Where is Library/MmCoreStandaloneEntryPoint.h? I don't find it in MdePkg.
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Supreeth Venkatesh
> Sent: Wednesday, January 24, 2018 4:02 AM
> To: edk2-devel@lists.01.org
> Cc: Gao, Li
Asm16 is compiled to the binary file. Asm is compiled to the obj file, and
linked into lib and EFI image.
Now, asm16 is replaced by nasmb. Asm is replaced by nasm. If you check
SecCore.inf, you will find ResetVec.asm16 is not used, and ResetVec.nasmb is
used. I will send the patch to remove th
Hi All,
SOme of you might be aware that me and Supreeth have been working on adding
support for Standalone MM on AArch64. The work is based on Jiewen's patches for
x86 and was being tracked in this edk2-staging branch [1]. This work looked good
enough to post on edk2-devel late last year and Supre
Hi Jiewen,
On 1/17/2018 10:57 AM, Yao, Jiewen wrote:
Thanks Paulo.
The series looks really good. I give it thumb up. :-)
The 8 patches keep updating 4 files, so I squash them when I review. The
comment below is for the final code, not for a specific patch.
1) CpuExceptionCommon.c: IsLinearAd
Hi Leif,
> On Fri, Jan 26, 2018 at 10:34 PM, Thomas Abraham
> wrote:
> The base models could have different values for the revision ID field in the
> System ID register. Base models do not have support for DVI and so the
> revision
> ID field should also be masked out when checking for the pres
Considering following scenario (both NX memory protection and heap guard
are enabled):
1. Allocate 3 pages. The attributes of adjacent memory pages will be
|NOT-PRESENT| present | present | present |NOT-PRESENT|
2. Free the middle page. The attributes of adjacent memory pages s
On Sat, Jan 27, 2018 at 09:47:31AM +0800, Huangming (Mark) wrote:
> The problem is that OS boot option is lost after upgrade firmware.
> It is inconvenient for using. OsBootLib can help this.
>
> OsBootLib retain the options installed by OS, and create OS boot option
> after upgrade firmware if gr
If enabled, NX memory protection feature will mark all free memory as
NX (non-executable), including page 0. This will overwrite the attributes
of page 0 if NULL pointer detection feature is also enabled and then
compromise the functionality of it. The solution is skipping the NX
attributes setting
Hi, experts:
I have a question about asm16 postfix and asm postfix.
Such as:
UefiCpuPkg\SecCore\Ia32\ResetVec.asm16
Why not use asm as postfix?
Thanks
Best wishes,
?
?
CONFIDENTIAL NOTE:
This email contains confidential or legally privil
On 29 January 2018 at 08:55, Huangming (Mark) wrote:
>
>
> On 2018/1/27 18:37, Ard Biesheuvel wrote:
>> On 27 January 2018 at 01:47, Huangming (Mark) wrote:
>>>
>>>
>>> On 2018/1/23 18:23, Leif Lindholm wrote:
On Thu, Jan 18, 2018 at 11:01:42PM +0800, Ming Huang wrote:
> OsBootLib can cr
Hi Laszlo,
I don't know the history of these code but I guess they're converted from .asm
file.
That may be why there's "DB 66h" prefix. I think you're right these tricks
should be
replaced with more formal ways. Please submit a bz tracker for it.
As to the issue, I don't have clue right now. T
On 2018/1/27 18:37, Ard Biesheuvel wrote:
> On 27 January 2018 at 01:47, Huangming (Mark) wrote:
>>
>>
>> On 2018/1/23 18:23, Leif Lindholm wrote:
>>> On Thu, Jan 18, 2018 at 11:01:42PM +0800, Ming Huang wrote:
OsBootLib can create OS option after upgrade firmware.
>>>
>>> I will respond mo
Sorry for the late; I caught cold and didn't work for several days last week :(
Please see my comments below:
On Mon, Jan 22, 2018 at 11:36:14AM +0800, Ni, Ruiyu wrote:
> On 1/18/2018 9:26 AM, Guo Heyi wrote:
> >On Wed, Jan 17, 2018 at 02:08:06PM +, Ard Biesheuvel wrote:
> >>On 15 January 201
On 29 January 2018 at 05:13, Wu, Hao A wrote:
> One minor comment, please help to remove the line (around line 1067):
> @param[in] Capability The capability of the slot.
>
> within function description comment for SdMmcHcInitHost() in file:
> MdeModulePkg\Bus\Pci\SdMmcPciHcDxe\SdMmcPciHci.c
>
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