and conditions of the BSD
> License
> +# which accompanies this distribution. The full text of the license may be
> found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#
On Mon, Jun 04, 2018 at 04:10:16AM +, Meenakshi Aggarwal wrote:
> Hi Leif,
>
> > -Original Message-
> > From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> > Sent: Thursday, April 19, 2018 8:14 PM
> > To: Meenakshi Aggarwal
> > Cc: ard.bieshe
Thanks.
Series:
Reviewed-by: Leif Lindholm
Pushed as ba32985a06..0923068a48.
On Fri, Jun 01, 2018 at 10:21:12AM +0800, Haojian Zhuang wrote:
> Do some basic initliazation on peripherals, such as pins and
> regulators.
>
> The hardcoding code is taken from non-open reference code.
ement 1.1
> Signed-off-by: Ard Biesheuvel
Reviewed-by: Leif Lindholm
> ---
> Source changes:
> https://git.linaro.org/leg/noupstream/arm-trusted-firmware.git/commit/?h=synquacer
>
> Full binary patch can be found here:
> https://git.linaro.org/leg/noupstream/edk2
On Thu, May 31, 2018 at 10:16:08PM +0100, Leif Lindholm wrote:
> On Thu, May 31, 2018 at 12:46:32PM +0200, Ard Biesheuvel wrote:
> > Enable some of the status code reporting infrastructure in patch #1 so
> > we can include the FPDT DXE driver in patch #2 which produces the FPDT
dd SCP firmware image to capsule
I have a few comments on the 5/6 layout thing, but apart from that I'm
happy with the series. I guess 4 doesn't make much sense before we're
ready to include the SCP firmware in the build.
But still - for 1-4/6:
Reviewed-by: L
xei Fedorov
The patch looks good to me, so if Thomas agrees:
Reviewed-by: Leif Lindholm
Thomas?
/
Leif
> ---
> All the changes can be reviewed at:
> https://github.com/AlexeiFedorov/edk2-platforms/tree/262_gtdt_timer_frame_ns_v1
>
> Notes:
> v1:
> - remove F
t; in the OS loader, and in ExitBootServices().
>
> Ard Biesheuvel (2):
> Platform/DeveloperBox: wire up status code reporting for DXE phase
> Platform/DeveloperBox: enable FPDT table
For the series:
Reviewed-by: Leif Lindholm
> Platform/Socionext/Develop
Oh, and please resubmit only this patch.
The rest are good to go, but I'll bring them in together.
/
Leif
On Thu, May 31, 2018 at 10:01:51PM +0100, Leif Lindholm wrote:
> This fixes the headers, but ignores the most important bit of feedback
> on v6:
>
> On Thu, May 31, 2
t; Can't fix it for lack of documents.
>
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Haojian Zhuang
> ---
> diff --git a/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c
> b/Platform/
On Thu, May 31, 2018 at 11:10:09AM +0800, Haojian Zhuang wrote:
> Do some basic initialization on HiKey platform, such as pin
> setting, regulators and making peripherals out of reset mode.
>
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Contributed-under: TianoCore Contribu
On Thu, May 31, 2018 at 11:17:47AM +0200, Ard Biesheuvel wrote:
> On 31 May 2018 at 11:11, Leif Lindholm wrote:
> > On Wed, May 30, 2018 at 08:19:27PM +0200, Ard Biesheuvel wrote:
> >> From: Masahisa KOJIMA
> >>
> >> The current revision of SC2A11 contains PCI
Signed-off-by: Ard Biesheuvel
Looks reasonable to me.
Reviewed-by: Leif Lindholm
> ---
> Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc | 109 +++-
> 1 file changed, 107 insertions(+), 2 deletions(-)
>
> diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc
p to the secure firmware to manipulate the north SMMU page tables
s/secure/EL3/ or s/secure/Secure/?
With either of those:
Reviewed-by: Leif Lindholm
> so that the level 2 block entries corresponding with busses #0 .. #1 in
> the respective config spaces of PCI0 and PCI1 are replaced with table
On Wed, May 30, 2018 at 08:19:27PM +0200, Ard Biesheuvel wrote:
> From: Masahisa KOJIMA
>
> The current revision of SC2A11 contains PCIe bus issue.
> In MRd transaction, 1st/Last DW BE fields are not correctly set
> by hardware.
>
> As a workaround, set TH bit and specify MSG_CODE in iATU.
> Wit
PCI serial driver
> Platform/DeveloperBox: switch to protocol based DevicePathLib
> Silicon/Socionext/SynQuacerPciHostBridgeLib: DEPEX on variable
> protocol
For the series:
Reviewed-by: Leif Lindholm
(I'll just add that ideally I'd want any series containing binaries to
come
On Fri, Apr 27, 2018 at 06:32:46PM +0530, Thomas Abraham wrote:
> On Thu, Apr 26, 2018 at 8:38 PM, Leif Lindholm
> wrote:
> > On Thu, Apr 26, 2018 at 02:01:21PM +0100, Sami Mujawar wrote:
> >> Acpiview is a program that allows examination of ACPI table
> >>
y. Therefore
> the Prerequisites section in the Readme has been updated
> accordingly.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Sami Mujawar
Reviewed-by: Leif Lindholm
Pushed as 726ccd02b1.
> ---
>
> The changes can be seen at
> http
On Fri, May 18, 2018 at 02:29:20PM +, Evan Lloyd wrote:
> Reviewed-by: Evan Lloyd
>
> Leif, Ard - are you happy to accept this for the patchset, or should I
> respond to each patch?
This is ideal, thanks.
For series: Reviewed-by: Leif Lindholm
Pushed as e28edfba42..8b567a9cf8
On Thu, May 24, 2018 at 08:46:30AM +0800, Haojian Zhuang wrote:
> Enable virtual keyboard on HiKey platform. It detects the pattern
> in memory and GPIO pin setting, and simulates them into virtual
> key.
>
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Contributed-under: T
On Thu, May 24, 2018 at 08:46:29AM +0800, Haojian Zhuang wrote:
> Do some basic initialization on HiKey platform, such as pin
> setting, regulators and making peripherals out of reset mode.
>
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Contributed-under: TianoCore Contribu
e code.
> Can't fix it for lack of documents.
>
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Haojian Zhuang
Reviewed-by: Leif Lindholm
> ---
> Platform/Hisilicon/HiKey960/HiKey960.dsc
On Thu, May 24, 2018 at 08:46:26AM +0800, Haojian Zhuang wrote:
> Do some basic initliazation on peripherals, such as pins and
> regulators.
>
> The hardcoding code is taken from non-open reference code.
> Can't fix it for lack of documents.
>
> Cc: Leif Lind
To save me making a triple-take when I see this commit in the log in
future, could you change the subject to say SnpDxe instead of SNP?
If so, for the series:
Reviewed-by: Leif Lindholm
On Fri, Apr 27, 2018 at 01:37:45PM +0200, Ard Biesheuvel wrote:
> Even though the builtin NETSEC control
orm/AMD/Overdrive: enable support for NVME PCIe devices
For the series:
Reviewed-by: Leif Lindholm
> .../AMD/OverdriveBoard/OverdriveBoard.dsc | 20 +--
> .../AMD/OverdriveBoard/OverdriveBoard.fdf | 6 +-
> Platform/LeMaker/CelloBoard/CelloBoard.dsc| 3 -
> .../Ov
> in [LibraryClasses.common.PEI_CORE] and [LibraryClasses.common.PEIM]
> sections of ArmVExpress.dsc.inc and
> Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
> in [Packages] section of ArmVExpressLibSec.inf
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: A
On Mon, May 21, 2018 at 12:54:01PM +0200, Marcin Wojtas wrote:
> Hi Leif,
>
>
> 2018-05-09 18:49 GMT+02:00 Leif Lindholm :
>
> > A couple of minor style comments.
> >
> > If you don't disagree, I can fix that up before pushing and you can
> >
.git;a=commitdiff;h=9cbee213b579
> [5]
> http://mid.mail-archive.com/7b28c03a-c032-6cec-c127-1c12cbe98eeb@foss.arm.com
> [6] https://gcc.gnu.org/onlinedocs/gcc-4.4.7/gcc/Code-Gen-Options.html
>
> Cc: "Danilo C. L. de Paula"
> Cc: Ard Biesheuvel
> Cc: Cole Robinson
&
On Mon, May 14, 2018 at 12:34:33PM +0800, Haojian Zhuang wrote:
> Enable virtual keyboard on HiKey platform. It detects the pattern
> in memory and GPIO pin setting, and simulates them into virtual
> key.
>
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Contributed-under: T
On Mon, May 14, 2018 at 12:34:32PM +0800, Haojian Zhuang wrote:
> Do some basic initialization on HiKey platform, such as pin
> setting, regulators and making peripherals out of reset mode.
>
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Contributed-under: TianoCore Contribu
On Mon, May 14, 2018 at 12:34:31PM +0800, Haojian Zhuang wrote:
> Add gpio platform driver to enable GPIO in HiKey platform.
>
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Haojian Zhuang
Reviewed
or 2/6.
/
Leif
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Haojian Zhuang
> ---
> Platform/Hisilicon/HiKey960/HiKey960.dsc | 5 ++
> Platform/Hisilicon/HiKey960/HiKey960.fdf
This is a significant improvement over previous versions, but there
are still a few things I would like addressed.
On Mon, May 14, 2018 at 12:34:29PM +0800, Haojian Zhuang wrote:
> Do some basic initliazation on peripherals, such as pins and
> regulators.
>
> Cc: Leif Lindhol
On Mon, May 14, 2018 at 12:34:28PM +0800, Haojian Zhuang wrote:
> Add gpio platform driver to enable GPIO in HiKey960 platform.
>
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Haojian Zhuang
Reviewed
On Fri, May 11, 2018 at 01:29:47PM +, Evan Lloyd wrote:
>
>
> > -Original Message-
> > From: edk2-devel On Behalf Of Leif
> > Lindholm
> > Sent: 09 May 2018 12:04
> > To: Sami Mujawar
> > Cc: nd ; Arvind Chauhan ;
> > ard.biesheu..
ARCH64_PLATFORM_FLAGS ==
> -I$(WORKSPACE)/Platform/ARM/VExpressPkg/Include
> -I$(WORKSPACE)/Platform/ARM/VExpressPkg/Include/Platform/RTSM
I still prefer the .dec way over ading more explicit platform-specific
-I flags.
Could you fold that into the patch and update the subject line to
s
A couple of minor style comments.
If you don't disagree, I can fix that up before pushing and you can
have Reviewed-by: Leif Lindholm for 1,3-4.
On Wed, May 09, 2018 at 03:51:11PM +0200, Marcin Wojtas wrote:
> From: Evan Wang
>
> PCIE clock direction (input/output) has implicat
Wojtas
I have no objections to this patch, but please repost it with the set
that adds multiple board support. When you do, you can add
Reviewed-by: Leif Lindholm
> ---
> Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>
ture. I'll keep it in here for now.
For the patch:
Reviewed-by: Leif Lindholm
> ---
> All the changes can be reviewed at:
> https://github.com/AlexeiFedorov/edk2-platforms/tree/261_correct_gic_naming_v1
This is much appreciated - however, please link to the actual version
you sen
Hi Alexei,
On Thu, May 03, 2018 at 10:24:21AM +0100, Alexei Fedorov wrote:
> From: Alexei Fedorov
>
> UEFI build fails for ArmVExpress-FVP-AArch64 when using
> "-D ARM_FVP_RUN_NORFLASH" build option, which prevents
> EDK2_SKIP_PEICORE macro from being defined in
> ArmVExpress-FVP-AArch64.dsc:
>
On Fri, Apr 27, 2018 at 04:24:59PM +0100, Sami Mujawar wrote:
> The ACPICA iASL compiler has been enhanced to support the
> generation of an AML hex file which is required by the
> Dynamic Tables Framework. The patch for this enhancement
> has been integrated in the ACPICA repository. Therefore
> t
Liming, Mike - any chance of getting that one pushed?
> Sami Mujawar (2):
> MdePkg: IORT Specification Rev D updates
> DynamicTablesPkg: Update IORT generator
For the series:
Reviewed-by: Leif Lindholm
Pushed as c47bc46170..67fd6a2c5e.
Side note - you can put the published branch i
On Wed, May 09, 2018 at 06:59:53PM +0800, Haojian Zhuang wrote:
> On 3 May 2018 at 06:49, Leif Lindholm wrote:
> > On Thu, Mar 08, 2018 at 09:30:04PM +0800, Haojian Zhuang wrote:
> >> Enable virtual keyboard on HiKey960 platform. The platform
> >> driver read pattern fr
On Fri, Apr 27, 2018 at 03:58:14PM +0100, Sami Mujawar wrote:
> The iASL compiler's -tc option has been updated to generate
> output that is suitable for including from a C file. The iASL
> compiler uniquely names the C array containing the processed
> table data as _aml_code. This update can be se
On Fri, Apr 27, 2018 at 03:58:16PM +0100, Sami Mujawar wrote:
> The ACPICA iASL compiler has been enhanced to support the
> generation of an AML hex file which is required by the
> Dynamic Tables Framework. The patch for this enhancement
> has been integrated in the ACPICA repository. Therefore
> t
ShellDebug1CommandsLib.inf
>
> NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf
>
> NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf
> +
> NULL|ShellPkg/Library/UefiShellAcpi
On Fri, May 04, 2018 at 11:29:33AM +0800, Haojian Zhuang wrote:
> On 2 May 2018 at 23:14, Leif Lindholm wrote:
> >> + { 0xe8a0b000, 0, 8 },// GPIO0
> >
> > It would not improve readability to request all of these live-coded
> > values to be replaced by #define
ptions.
The addition of HiKeyDxe and the enabling of virtual keyboard support
should be separate patches, just like for 2/4.
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Haojian Zhuang
> ---
> Plat
h looks like it contains an awful lot more than described
here. Can it be split up?
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Haojian Zhuang
> ---
> Platform/Hisilicon/HiKey960/HiKey960.dsc
(Reviewing near-identical patches out of order.)
On Thu, Mar 08, 2018 at 09:30:28PM +0800, Haojian Zhuang wrote:
> Add gpio platform driver to enable GPIO in HiKey platform.
>
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Contributed-under: TianoCore Contribution Agreement 1.1
On Thu, Mar 08, 2018 at 09:29:50PM +0800, Haojian Zhuang wrote:
> Add gpio platform driver to enable GPIO in HiKey960 platform.
>
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Haojian Zhuang
> ---
On Tue, May 01, 2018 at 06:32:44PM +0200, Ard Biesheuvel wrote:
> Rename the variable holding the Styx PPTT table to mStyxPpttTable.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
Reviewed-by: Leif Lindholm
> ---
> Silicon/A
nder: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
Reviewed-by: Leif Lindholm
> ---
> Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Platform/Socionext/DeveloperBox/Develop
e reading value.
> Query(): Read value. If the value matches the expected pattern,
> trigger a key pressed event.
> Clear(): Clean the value if necessary.
>
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signe
Ard Biesheuvel
Not my area of expertise, but looks reasonable.
Reviewed-by: Leif Lindholm
> ---
> This produces the following topology after applying Jeremy's patches:
>
> $ lstopo-no-graphics
> Machine (31GB)
> Package L#0 + L3 L#0 (4096KB)
> L2 L#0 (256K
ceTree/SynQuacer.dtsi
> > @@ -379,7 +379,7 @@
> > };
> >
> > pmu {
> > -compatible = "arm,armv8-pmuv3";
> > +compatible = "arm,cortex-a53-pmu";
> > interrupts = ;
> > };
>
> Ping?
Ap
ellAcpiViewCommandLib/UefiShellAcpiViewCommandLib.inf
Although I would probably move this line up a few to improve sorting.
Reviewed-by: Leif Lindholm
>
> HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
>PrintLib|MdePkg/Library/BasePrintLib
t the whole set - just send out a 3/3 to go on top
of this.
Regards,
Leif
> Regards,
>
> Sami Mujawar
> -Original Message-
> From: Ard Biesheuvel
> Sent: 26 April 2018 10:44 AM
> To: Sami Mujawar
> Cc: edk2-devel@lists.01.org; Arvind Chauhan ; Daniil
> E
> > Welcome Laszlo!
> >
> > Reviewed-by: Michael D Kinney
> >
> > Mike
> >
> >> -Original Message-
> >> From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> >> Sent: Friday, April 13, 2018 12:26 PM
> >> T
for the new SCMI protocol.
>
> Corresponding edk2-platforms changes will follow shortly.
>
For the series:
Reviewed-by: Leif Lindholm
Pushed as ee4dc24f57..4f2494cf53.
Apologies for the delay in getting this through.
/
Leif
> Code is available for examination at:
> http
On Mon, Apr 23, 2018 at 05:07:02PM +, Girish Pathak wrote:
> Hi Leif,
>
> > -Original Message-
> > From: Leif Lindholm
> > Sent: 23 April 2018 18:03
> > To: Girish Pathak
> > Cc: edk2-devel@lists.01.org; ard.biesheu...@linaro.org; Matteo Carl
On Thu, Apr 05, 2018 at 07:07:50PM +0100, Girish Pathak wrote:
> PCD PcdPL111LcdMaxMode is not used in HDLCD platform library.
> Presence of this PCD in HDLCD is probably due to copy/paste code
> from PL111 Lcd platform library. This change removes it from
> the HdLcdArmVExpressLib.inf file.
>
> C
On Mon, Apr 23, 2018 at 05:00:55PM +0200, Ard Biesheuvel wrote:
> Reinstate the timer mask quirk for Xen that we recently removed under the
> assumption that only ancient KVM host implementations still needed it.
>From my point of view, for the series:
Reviewed-by: Leif Lindholm
But
On Mon, Apr 23, 2018 at 04:06:43PM +, Girish Pathak wrote:
> > From: Leif Lindholm
> > Sent: 23 April 2018 12:32
> > To: Girish Pathak
> > Cc: edk2-devel@lists.01.org; ard.biesheu...@linaro.org; Matteo Carlini
> > ; Stephanie Hughes-Fitt > f...@arm.com>;
For the series:
Reviewed-by: Leif Lindholm
Not pushed yet due to dependencies on the corresponding edk2 set.
Evan: since you already have Signed-off-by on all of the patches, I
don't intend to add your Reviewed-by as well (I did see them).
On Thu, Apr 05, 2018 at 07:07:46PM +0100, G
Hmm, I did find a few minor things below that I need to hear back on
before pushing.
On Tue, Mar 20, 2018 at 04:12:12PM +, Girish Pathak wrote:
> This change introduces a new SCMI protocol driver for
> Arm systems. The driver currently supports only clock
> and performance management protocols
On Tue, Mar 20, 2018 at 04:12:11PM +, Girish Pathak wrote:
> Upcoming new component ArmPkg/Drivers/ArmScmiDxe is dependent on
> platform specific ArmMtlLib library implementation, however in order
> to be able to build the ArmScmiDxe component outside of the context of a
> particular platform,
On Tue, Mar 20, 2018 at 04:12:10PM +, Girish Pathak wrote:
> From: Girish Pathak
>
> This change adds support for the ARM Mali DP500/DP500/DP650 display
> processors using the GOP protocol. It has been tested on FVP base
> models + DP550 support. This change adds platform independant LcdHwLib
For series:
Reviewed-by: Leif Lindholm
Pushed as a30a05ba45..0b5af57f00.
On Thu, Feb 22, 2018 at 05:26:58PM +0800, Ming Huang wrote:
> These two patchs are missed for 18.02. They are recommended for 18.02.
>
>
> Ming Huang (2):
> Hilisicon/D03: Change DmaLib for P
On Mon, Apr 23, 2018 at 08:21:22AM +, Meenakshi Aggarwal wrote:
> > > +/**
> > > + Function to read data using i2c bus
> > > +
> > > + @param I2cBus I2c Controller number
> > > + @param ChipAddress of slave device from where data to be
> > > read
> > > + @param O
Allright, that is all the feedback we have to give on this set.
Thank you for this contribution.
However, for such a large patch set, it would be very much appreciated
if you could put v2 on a publicly accessible git branch and include a
link in the cover letter.
Best Regards,
Leif
On Fri, Feb
On Fri, Feb 16, 2018 at 02:20:35PM +0530, Meenakshi wrote:
> From: Vabhav
>
> Compilation: Update the fdf, dsc and dec files.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Vabhav
> ---
> Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dsc| 17
>
On Fri, Feb 16, 2018 at 02:20:34PM +0530, Meenakshi wrote:
> From: Vabhav
>
> Compilation: Update the fdf, dsc and dec files.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Vabhav
> ---
> Platform/NXP/LS1046aRdbPkg/LS1046aRdbPkg.dsc | 15
> ++
On Fri, Feb 16, 2018 at 02:20:33PM +0530, Meenakshi wrote:
> From: Meenakshi Aggarwal
>
> Enable support of USB drives on ls2088 board.
> LS2088 has DWC3 controller
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Meenakshi Aggarwal
Revie
Minor comments below.
On Fri, Feb 16, 2018 at 02:20:32PM +0530, Meenakshi wrote:
> From: Meenakshi Aggarwal
>
> Add support of DWC3 controller driver which
> Performs DWC3 controller initialization and
> Register itself as NonDiscoverableMmioDevice
>
> Contributed-under: TianoCore Contribution
On Fri, Feb 16, 2018 at 02:20:31PM +0530, Meenakshi wrote:
> From: Meenakshi Aggarwal
>
> LS1043A PCIe compilation and update firmware device,
> description and declaration files.Defining Embedded Package
> PCD which should be at least 20 for 64K PCIe IO size required
> for CPU hob during PEI pha
On Fri, Feb 16, 2018 at 02:20:30PM +0530, Meenakshi wrote:
> From: Vabhav
>
> NXP SOC has mutiple PCIe RCs,Adding respective implementation of
> EFI_CPU_IO2_PROTOCOL to provide Memory Space Read/Write functions
> used by generic Host Bridge Driver including correct value for
> the translation off
My only comment in addition to Ard's comments/questions:
Use same endianness handling here as for preceding patches?
/
Leif
On Fri, Feb 16, 2018 at 02:20:29PM +0530, Meenakshi wrote:
> From: Vabhav
>
> Implement the library that exposes the PCIe root complexes to the
> generic PCI host brid
On Fri, Apr 20, 2018 at 06:40:27AM +, Vabhav Sharma wrote:
>
>
> >-Original Message-----
> >From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> >Sent: Friday, April 20, 2018 12:57 AM
> >To: Meenakshi Aggarwal
> >Cc: ard.biesheu...@linaro.org;
On Fri, Feb 16, 2018 at 02:20:28PM +0530, Meenakshi wrote:
> From: Vabhav
>
> Multiple root complex support is not provided by standard library
> PciLib/PciExpressLib/PciSegmentLib, Reimplementing it and provide
> function for reading/writing into PCIe configuration Space.
>
> Contributed-under:
On Fri, Feb 16, 2018 at 02:20:27PM +0530, Meenakshi wrote:
> From: Wasim Khan
>
> Enable NOR driver and Runtime Services for LS2088ARDB Platform
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Wasim Khan
Ah, I guess the varstore changes may actually happen to this
On Fri, Feb 16, 2018 at 02:20:26PM +0530, Meenakshi wrote:
> From: Wasim Khan
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Wasim Khan
Reviewed-by: Leif Lindholm
> ---
> Platform/NXP/LS2088aRdbPkg/LS2088aRdbPkg.dsc | 3 +++
> Silicon
t; + SwitchConf = FPGA_READ (BrdCfg[0]);
> +
> + if (SwitchConf & FPGA_CS_MASK)
> +DEBUG ((DEBUG_INFO, "NAND\n"));
> + else
> +DEBUG ((DEBUG_INFO, "vBank: %d\n", (SwitchConf & FPGA_VBANK_MASK)));
> +
> + DEBUG ((DEBUG_INFO,
t 1.1
> Signed-off-by: Wasim Khan
Reviewed-by: Leif Lindholm
> ---
> .../NXP/LS2088aRdbPkg/Include/IfcBoardSpecific.h | 114
> +
> .../NXP/LS2088aRdbPkg/Library/BoardLib/BoardLib.c | 69 +
> .../LS2088aRdbPkg/Library/BoardLib/BoardLib.inf
On Fri, Feb 16, 2018 at 02:20:23PM +0530, Meenakshi wrote:
> From: Wasim Khan
>
> The firmware device, description and declaration files for LS2088 board
>
Apart from the varstore and include handling change, can you bump the
DEC_SPECIFICATION entry to 0x0001001a?
Nothing else on this patch.
/
On Fri, Feb 16, 2018 at 02:20:22PM +0530, Meenakshi wrote:
> From: Wasim Khan
>
> Add Maxim DS3232 RTC Library support
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Wasim Khan
Reviewed-by: Leif Lindholm
> ---
> Silicon/Maxim/Library/
On Fri, Feb 16, 2018 at 02:20:21PM +0530, Meenakshi wrote:
> From: Wasim Khan
>
> Add support of ArmPlatformLib for NXP LS2088ARDB board
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Wasim Khan
> Signed-off-by: Meenakshi Aggarwal
Revie
d-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
Reviewed-by: Leif Lindholm
> ---
> Kojima-san,
>
> Please confirm that the modification to ogma_config.h is correct.
>
> Thanks,
> Ard.
>
> Silicon/Socionext/SynQuacer/AcpiTables
A few style comments in addition to the requested layout changes.
On Fri, Feb 16, 2018 at 02:20:20PM +0530, Meenakshi wrote:
> From: Wasim Khan
>
> Added SocInit function that initializes peripherals
> and print board and soc information for LS2088ARDB Board.
>
> Contributed-under: TianoCore Co
On Fri, Feb 16, 2018 at 02:20:19PM +0530, Meenakshi wrote:
> From: Vabhav
>
> Adding firmware device,description and declaration files to enable
> compilation for NXP LS1046ARDB board.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Vabhav
No comments on this beyon
On Fri, Feb 16, 2018 at 02:20:18PM +0530, Meenakshi wrote:
> From: Meenakshi Aggarwal
>
> Library to provide functions for accessing FPGA
> on LS1046ARDB board.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Vabhav
> Signed-off-by: Meenakshi Aggarwal
I compare th
the boot reason on the platform
> +
> +**/
> +EFI_BOOT_MODE
> +ArmPlatformGetBootMode (
> + VOID
> + )
> +{
> + return BOOT_WITH_FULL_CONFIGURATION;
> +}
> +
> +/**
> + Placeholder for Platform Initialization
> +**/
> +EFI_STATUS
> +ArmPlatformInitialize
ment 1.1
> Signed-off-by: Vabhav
> Signed-off-by: Meenakshi Aggarwal
Reviewed-by: Leif Lindholm
> ---
> .../NXP/LS1046aRdbPkg/Include/IfcBoardSpecific.h | 83
> ++
> .../NXP/LS1046aRdbPkg/Library/BoardLib/BoardLib.c | 61
> .../L
On Thu, Apr 19, 2018 at 12:33:50PM +, Meenakshi Aggarwal wrote:
> > > +EFI_STATUS
> > > +EFIAPI
> > > +LibSetTime (
> > > + IN EFI_TIME*Time
> > > + )
> > > +{
> > > + UINT8 Buffer[8];
> > > + UINT8 Index;
> > > + EFI_STATUS Status;
> > > + RTC_I2C
allocation
> happens to be DMA aligned.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
Reviewed-by: Leif Lindholm
> ---
>
> Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/pfdep_uefi.c
> | 2 +-
> 1 f
On Thu, Apr 19, 2018 at 10:05:45AM +, Meenakshi Aggarwal wrote:
> > CCSR_SCFG_USBDRVVBUS_SELCR_USB1);
> > > + UsbPwrFault = (CCSR_SCFG_USBPWRFAULT_DEDICATED <<
> > > +CCSR_SCFG_USBPWRFAULT_USB3_SHIFT) |
> > > +(CCSR_SCFG_USBPWRFAULT_DEDICATED <<
> > > +
On Fri, Feb 16, 2018 at 02:20:15PM +0530, Meenakshi wrote:
> From: Vabhav
>
> Library to provide functions for NXP pcf2129 real time clock library
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Vabhav
> ---
> Silicon/NXP/Library/Pcf2129RtcLib/Pcf2129Rtc.h | 4
On Fri, Feb 16, 2018 at 02:20:14PM +0530, Meenakshi wrote:
> From: Meenakshi Aggarwal
>
> On LS1046A NXP SoC,Provide Functions to initialize peripherals
> ,print board, soc information.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Vabhav
> ---
> Platform/NXP/LS1
On Fri, Feb 16, 2018 at 02:20:13PM +0530, Meenakshi wrote:
> From: Meenakshi Aggarwal
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Meenakshi Aggarwal
Will this one require any changes to build (and work correctly)
against current edk2?
If not:
Revie
On Fri, Feb 16, 2018 at 02:20:11PM +0530, Meenakshi wrote:
> From: Meenakshi Aggarwal
>
> NorFlashLib interacts with the underlying IFC NOR controller.
> This will be used by NOR driver for any information
> exchange with NOR controller.
Some of this looks generic CFI which should at some point
801 - 900 of 2408 matches
Mail list logo
