[gem5-dev] Dynamic number of micro-ops based on misc registers

Hello everyone, We (PLCT Labs) are adding support for the Vector extension to the gem5 RISC-V ISA. We are having some difficulty with memory access related instructions. Hope someone with experience on this can give some help. In CPUs that use timing memory access, each Packet can only carry c

[gem5-dev] resource downloader failure

Hi folks. I've been trying to run tests locally, and I've been running into occasional flakiness due to a problem with the resource downloader. This reminds me somewhat of flakiness I was seeing in kokoro as well, so they are probably related. The error output is this: $ cat ./testing-results/Suit

[gem5-dev] Change in gem5/gem5[develop]: cpu,sim: Don't tie ThreadContext contextId to the CPU ID.

Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/57089 ) Change subject: cpu,sim: Don't tie ThreadContext contextId to the CPU ID. .. cpu,sim: Don't tie ThreadContext contextId to th

[gem5-dev] Change in gem5/gem5[develop]: scons: Add a "mold" value to the --linker option.

Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/57173 ) Change subject: scons: Add a "mold" value to the --linker option. .. scons: Add a "mold" value to the --linker option. This

[gem5-dev] Change in gem5/gem5[develop]: arch,cpu: Replace StaticInst::_num${TYPE}DestRegs members with an array.

Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/49712 ) ( 52 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch,cpu: Replace StaticInst::_num${TYPE}DestRegs

[gem5-dev] Change in gem5/gem5[develop]: arch,cpu: Replace num${Type}DestReg accessors with numDestReg(type).

Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/49713 ) ( 52 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch,cpu: Replace num${Type}DestReg accessors with

[gem5-dev] Change in gem5/gem5[develop]: cpu-o3: Use an array to hold rename maps in UnifiedRenameMap.

Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/49715 ) ( 53 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: cpu-o3: Use an array to hold rename maps in Unif

[gem5-dev] Change in gem5/gem5[develop]: cpu-o3: Make canRename extract register counts locally.

Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/49714 ) ( 52 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: cpu-o3: Make canRename extract register counts lo

[gem5-dev] Change in gem5/gem5[develop]: arch-vega: Handle signed offsets in Global/Scratch instructions

Kyle Roarty has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/57209 ) Change subject: arch-vega: Handle signed offsets in Global/Scratch instructions .. arch-vega: Handle signed of

[gem5-dev] Jenkins build is back to normal : nightly #144

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[gem5-dev] Change in gem5/gem5[develop]: arch: Get rid of the unused numAccessNeeded variable.

Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/49718 ) ( 53 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: arch: Get rid of the unused numAccessNeeded varia

[gem5-dev] Change in gem5/gem5[develop]: cpu,arch-arm: Use a sentry class valid for invalid RegIds.

Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/49710 ) Change subject: cpu,arch-arm: Use a sentry class valid for invalid RegIds. .. cpu,arch-arm: Use a sentry class valid for inva

[gem5-dev] Build failed in Jenkins: nightly 1-thread #1

See Changes: -- [...truncated 154.46 KB...] [ CXX] NULL/debug/MiscRegs.cc -> .o [ TRACING] -> NULL/debug/Registers.cc [ TRACING] -> NULL/debug/Registers.hh [ CXX] NULL/debug

[gem5-dev] Change in gem5/gem5[develop]: arch-x86: Add a check for setting data segments.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/57200 ) Change subject: arch-x86: Add a check for setting data segments. .. arch-x86: Add a check for setting data segment

[gem5-dev] Change in gem5/gem5[develop]: arch-x86: Implement not present exceptions.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/57199 ) Change subject: arch-x86: Implement not present exceptions. .. arch-x86: Implement not present exceptions. Also,

[gem5-dev] Change in gem5/gem5[develop]: arch-x86: Try to make seg fault error codes more accurate.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/57198 ) Change subject: arch-x86: Try to make seg fault error codes more accurate. .. arch-x86: Try to make seg fault erro

[gem5-dev] Change in gem5/gem5[develop]: arch-x86: Make register usage in legacy int ucode systematic.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/57193 ) Change subject: arch-x86: Make register usage in legacy int ucode systematic. .. arch-x86: Make register usage

[gem5-dev] Change in gem5/gem5[develop]: arch-x86: De-macro-ize the legacy mode interrupt microcode.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/57194 ) Change subject: arch-x86: De-macro-ize the legacy mode interrupt microcode. .. arch-x86: De-macro-ize the legacy m

[gem5-dev] Change in gem5/gem5[develop]: arch-x86: Implement a portion of protected mode far call.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/57197 ) Change subject: arch-x86: Implement a portion of protected mode far call. .. arch-x86: Implement a portion of prot

[gem5-dev] Change in gem5/gem5[develop]: arch-x86: Segment selectors are two bytes long, not one.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/57195 ) Change subject: arch-x86: Segment selectors are two bytes long, not one. .. arch-x86: Segment selectors are two by

[gem5-dev] Change in gem5/gem5[develop]: arch-x86: Extract gate type checks from the legacy int macro.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/57192 ) Change subject: arch-x86: Extract gate type checks from the legacy int macro. .. arch-x86: Extract gate type ch

[gem5-dev] Change in gem5/gem5[develop]: arch-x86: Add bsr and sret microops.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/57191 ) Change subject: arch-x86: Add bsr and sret microops. .. arch-x86: Add bsr and sret microops. These were very brie

[gem5-dev] Change in gem5/gem5[develop]: arch-x86: Define some macros to simplify legacy int microcode.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/57190 ) Change subject: arch-x86: Define some macros to simplify legacy int microcode. .. arch-x86: Define some macros

[gem5-dev] Change in gem5/gem5[develop]: arch-x86: Refactor legacy int code so far call can use it.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/57196 ) Change subject: arch-x86: Refactor legacy int code so far call can use it. .. arch-x86: Refactor legacy int code s

[gem5-dev] Change in gem5/gem5[develop]: arch-x86: Refactor some legacy interrupt microcode.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/57189 ) Change subject: arch-x86: Refactor some legacy interrupt microcode. .. arch-x86: Refactor some legacy interrupt mi