Re: [gem5-dev] include order style checker bug

Here's another potentially related bug. There was an extra space between the final header and the using at the top of a .cc, and the style fixer decided to move the include of the corresponding .hh from the top where it belonged down into the list of includes in alphabetic order. It still

[gem5-dev] include order style checker bug

Hey folks. I just ran into a bug in the style checker/fixer, and since I wanted to make sure I kept track of those so they can be fixed I thought I would describe it here for the record. I have a cc file which had a single system include (#include ) and the include for its .hh file (#include

[gem5-dev] Change in gem5/gem5[master]: arch, base, cpu, dev, mem, sim: Remove #if 0-ed out code.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18608 Change subject: arch, base, cpu, dev, mem, sim: Remove #if 0-ed out code. .. arch, base, cpu, dev, mem, sim: Remove

Re: [gem5-dev] Continuous integration is live!

Hi Giacomo, In tests/main.py we call scons and use the current environment defaults to build gem5. I don't know if the kokoro infrastructure supports other compilers. This might be something that Rahul can address. I'm also not sure if we can find a way to run more compilations in parallel on

[gem5-dev] Change in gem5/gem5[master]: mem-cache: Support for page crossing prefetches

Hello Andreas Sandberg, Daniel Carvalho, Giacomo Travaglini, Jason Lowe-Power, Nikos Nikoleris, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/14620 to look at the new patch set (#13). Change subject: mem-cache: Support for page

[gem5-dev] Change in gem5/gem5[master]: mem-cache: Support for page crossing prefetches

Hello Andreas Sandberg, Daniel Carvalho, Giacomo Travaglini, Jason Lowe-Power, Nikos Nikoleris, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/14620 to look at the new patch set (#12). Change subject: mem-cache: Support for page

[gem5-dev] Change in gem5/gem5[master]: mem: Use a const T & in write<> to avoid an unnecessary copy.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18573 Change subject: mem: Use a const T & in write<> to avoid an unnecessary copy. .. mem: Use a const T & in write<>

[gem5-dev] Change in gem5/gem5[master]: arch, base, dev, sim: Remove now unnecessary casts from PortProxy met...

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18572 Change subject: arch, base, dev, sim: Remove now unnecessary casts from PortProxy methods. .. arch, base, dev,

[gem5-dev] Change in gem5/gem5[master]: kern: Replace an explicitly instantiated port proxy with one from the...

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18578 Change subject: kern: Replace an explicitly instantiated port proxy with one from the tc. .. kern: Replace an

[gem5-dev] Change in gem5/gem5[master]: mem: Remove the now unused Copy* methods from the FS port proxy.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18576 Change subject: mem: Remove the now unused Copy* methods from the FS port proxy. .. mem: Remove the now unused

[gem5-dev] Change in gem5/gem5[master]: arch, base, cpu, gpu, sim: Merge getMemProxy and getVirtProxy.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18581 Change subject: arch, base, cpu, gpu, sim: Merge getMemProxy and getVirtProxy. .. arch, base, cpu, gpu, sim:

[gem5-dev] Change in gem5/gem5[master]: mem, arm: Replace the pointer type in PortProxy with void *.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18571 Change subject: mem, arm: Replace the pointer type in PortProxy with void *. .. mem, arm: Replace the pointer type

[gem5-dev] Change in gem5/gem5[master]: cpu, sim: Return PortProxy from all the proxy accessors.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18579 Change subject: cpu, sim: Return PortProxy from all the proxy accessors. .. cpu, sim: Return PortProxy from all

[gem5-dev] Change in gem5/gem5[master]: arch, base, sim: Replace Copy(String)?(In|Out) with equivalent code.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18575 Change subject: arch, base, sim: Replace Copy(String)?(In|Out) with equivalent code. .. arch, base, sim: Replace

[gem5-dev] Change in gem5/gem5[master]: arch, base, sim: Demote (SE|FS)TranslatingPortProxy to PortProxy .

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18577 Change subject: arch, base, sim: Demote (SE|FS)TranslatingPortProxy to PortProxy .. arch, base, sim: Demote

[gem5-dev] Change in gem5/gem5[master]: mem, arm: Move some helper methods into the base PortProxy class.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18570 Change subject: mem, arm: Move some helper methods into the base PortProxy class. .. mem, arm: Move some helper

[gem5-dev] Change in gem5/gem5[master]: arm, mem: Move the SecurePortProxy subclass into arch/arm.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18569 Change subject: arm, mem: Move the SecurePortProxy subclass into arch/arm. .. arm, mem: Move the SecurePortProxy

[gem5-dev] Change in gem5/gem5[master]: cpu: Store the translating proxy with the same pointer in SE or FS mode.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18580 Change subject: cpu: Store the translating proxy with the same pointer in SE or FS mode. .. cpu: Store the

[gem5-dev] Change in gem5/gem5[master]: mem: Add a readString method to the PortProxy which takes a char *.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18574 Change subject: mem: Add a readString method to the PortProxy which takes a char *. .. mem: Add a readString

[gem5-dev] Change in gem5/gem5[master]: tests: There is no architecture called "timing".

Gabe Black has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/18568 ) Change subject: tests: There is no architecture called "timing". .. tests: There is no architecture called

[gem5-dev] Change in gem5/gem5[master]: sim-se: add eventfd system call

Hello Ciro Santilli, Alexandru Duțu, John Alsop, Andrea Mondelli, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/12125 to look at the new patch set (#23). Change subject: sim-se: add eventfd system call

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Store a PhysProxy port in Gicv3Redist

Giacomo Travaglini has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/18600 ) Change subject: dev-arm: Store a PhysProxy port in Gicv3Redist .. dev-arm: Store a PhysProxy port

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add named variable for GICD_TYPER.IDBits

Giacomo Travaglini has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/18599 ) Change subject: dev-arm: Add named variable for GICD_TYPER.IDBits .. dev-arm: Add named variable

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add several LPI methods in Gicv3Redistributor

Giacomo Travaglini has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/18596 ) Change subject: dev-arm: Add several LPI methods in Gicv3Redistributor .. dev-arm: Add several LPI

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Get a Gicv3Redistributor ptr from phys address

Giacomo Travaglini has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/18597 ) Change subject: dev-arm: Get a Gicv3Redistributor ptr from phys address .. dev-arm: Get a

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Read correct version of ICC_BPR register

Giacomo Travaglini has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/18598 ) Change subject: dev-arm: Read correct version of ICC_BPR register .. dev-arm: Read correct version

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Take LPIs into account when interacting with CPUIF regs

Giacomo Travaglini has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/18595 ) Change subject: dev-arm: Take LPIs into account when interacting with CPUIF regs .. dev-arm:

Re: [gem5-dev] Internship at Arm

+ Juha on CC From: gem5-dev on behalf of Giacomo Travaglini Sent: 02 May 2019 12:56 To: gem5 Developer List Cc: Reiley Jeyapaul Subject: [gem5-dev] Internship at Arm Hello devs, We are looking for internship candidates to work on gem5 at Arm. If you know (or

[gem5-dev] Change in gem5/gem5[master]: mem-cache: Mark block as dirty after a SWPrefetchEXResp

Nikos Nikoleris has uploaded a new patch set (#2). ( https://gem5-review.googlesource.com/c/public/gem5/+/17729 ) Change subject: mem-cache: Mark block as dirty after a SWPrefetchEXResp .. mem-cache: Mark block as dirty after

Re: [gem5-dev] Continuous integration is live!

Hi Jason, I understand; Another thing I would like to ask: Which script is building gem5 in jenkins? Ideally it would be nice to build with BOTH gcc and clang (so that we avoid periodic "fix clang build" patches. I would also make the version configurable/visible from the script so that we can

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Disable LPI Configuration Table caching

Giacomo Travaglini has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/18593 ) Change subject: dev-arm: Disable LPI Configuration Table caching .. dev-arm: Disable LPI

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Fix Bitwise operation in GICv3

Giacomo Travaglini has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/18589 ) Change subject: dev-arm: Fix Bitwise operation in GICv3 .. dev-arm: Fix Bitwise operation in GICv3

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Check EnableLPIs before checking for pending LPIs

Giacomo Travaglini has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/18592 ) Change subject: dev-arm: Check EnableLPIs before checking for pending LPIs .. dev-arm: Check

[gem5-dev] Change in gem5/gem5[master]: dev-arm: GICv3 LPI tables are using physical addresses

Giacomo Travaglini has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/18591 ) Change subject: dev-arm: GICv3 LPI tables are using physical addresses .. dev-arm: GICv3 LPI

[gem5-dev] Internship at Arm

Hello devs, We are looking for internship candidates to work on gem5 at Arm. If you know (or are one yourself!) of any keen students with gem5 experience (this is essential) who may want to do an internship (start dates flexible), please ask them to get in touch with either Juha or Reiley (in

[gem5-dev] Long regression broken

Hi all, As I have already posted few weeks ago, there is a set of patches for MinorCPU which are breaking switcheroo long regressions. https://gem5-review.googlesource.com/c/8182 https://gem5-review.googlesource.com/c/9625 https://gem5-review.googlesource.com/c/9626 Is there anybody willing to

[gem5-dev] Change in gem5/gem5[master]: Revert "cpu: fix branching when thread is suspended in MinorCPU"

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18602 Change subject: Revert "cpu: fix branching when thread is suspended in MinorCPU" .. Revert "cpu: fix

[gem5-dev] Change in gem5/gem5[master]: Revert "cpu: fix how a thread starts up in MinorCPU"

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18604 Change subject: Revert "cpu: fix how a thread starts up in MinorCPU" .. Revert "cpu: fix how a thread

[gem5-dev] Change in gem5/gem5[master]: Revert "cpu: stop scheduling suspended threads in MinorCPU"

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18603 Change subject: Revert "cpu: stop scheduling suspended threads in MinorCPU" .. Revert "cpu: stop scheduling

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Provide a GICv3 ITS Implementation

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/18601 to review the following change. Change subject: dev-arm: Provide a GICv3 ITS Implementation

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add named variable for GICD_TYPER.IDBits

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/18599 to review the following change. Change subject: dev-arm: Add named variable for GICD_TYPER.IDBits

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Fix Bitwise operation in GICv3

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/18589 to review the following change. Change subject: dev-arm: Fix Bitwise operation in GICv3 ..

[gem5-dev] Change in gem5/gem5[master]: dev-arm: GICv3 LPI tables are using physical addresses

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/18591 to review the following change. Change subject: dev-arm: GICv3 LPI tables are using physical addresses

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Fix GICv3 LPI loop

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/18590 to review the following change. Change subject: dev-arm: Fix GICv3 LPI loop .. dev-arm:

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Disable LPI Configuration Table caching

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/18593 to review the following change. Change subject: dev-arm: Disable LPI Configuration Table caching

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Store a PhysProxy port in Gicv3Redist

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/18600 to review the following change. Change subject: dev-arm: Store a PhysProxy port in Gicv3Redist

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Fix GICv3 LPIs priority value

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/18594 to review the following change. Change subject: dev-arm: Fix GICv3 LPIs priority value ..

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Take LPIs into account when interacting with CPUIF regs

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/18595 to review the following change. Change subject: dev-arm: Take LPIs into account when interacting with CPUIF regs

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add several LPI methods in Gicv3Redistributor

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/18596 to review the following change. Change subject: dev-arm: Add several LPI methods in Gicv3Redistributor

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Check EnableLPIs before checking for pending LPIs

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/18592 to review the following change. Change subject: dev-arm: Check EnableLPIs before checking for pending LPIs

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Get a Gicv3Redistributor ptr from phys address

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/18597 to review the following change. Change subject: dev-arm: Get a Gicv3Redistributor ptr from phys address

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Read correct version of ICC_BPR register

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/18598 to review the following change. Change subject: dev-arm: Read correct version of ICC_BPR register

[gem5-dev] Change in gem5/gem5[master]: base: Add argument to Coroutine class to not run on creation

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/18588 Change subject: base: Add argument to Coroutine class to not run on creation .. base: Add argument to

[gem5-dev] Cron /z/m5/regression/do-regression quick

* build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic: FAILED! * build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual: FAILED! * build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing: FAILED! *

[gem5-dev] Change in gem5/gem5[master]: tests: Add missing kernels to system creation

Daniel Carvalho has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/18528 ) Change subject: tests: Add missing kernels to system creation .. tests: Add missing kernels to system