[gem5-users] Re: gem5 crash when mount by vio-9p protocol in KVM mode with more than 1 core

Hi Charlie, If memory serves me right, you shouldn't need to do anything in the VirtIO devices themselves when running on KVM unless there is a bug somewhere (which I think there is, see the last paragraph). The following discussion assumes that all devices live in a single event queue and

Re: [gem5-users] How to support multiple memory requests in a single instruction

Hi, I would suggest having a look at the SVE support that Giacomo Gabrielly posted for review a while back. There is support for SVE load/store structure instructions [1] there that sound very similar to what you want to achieve. Cheers, Andreas [1]

Re: [gem5-users] Linux images --booting newer systems - Gem5 FS

Hi Vitorio, Just to clarify Gabe's reply a bit. We do actually have a minimal bootloader in the ARMv8 platform, but it's only responsible for some basic CPU initialisation (see system/arm/aarch64_bootloader). The majority of the machinery that loads the kernel lives in the ArmSystem class.

[gem5-users] Arm platform deprecation

Hi Everyone, Those of you using gem5 to simulate Arm systems probably know that gem5 supports a handful of different Arm platforms (memory & interrupt maps). Some of these platforms are very old and most of them aren't supported by the kernel default configurations in gem5's Linux tree [1]. In

Re: [gem5-users] Is the dtb file important for FS simulation?

New versions of gem5 also auto-generate DTBs. This requires support from the simulation script, but that should already be implemented for the configurations in configs/example/arm/ and fs.py. The latter might requires that --generate-dtb is specified to enable this. Keep in mind that the

[gem5-users] Linux 4.14 and 4.15 with gem5 patches now available for Arm

Hi Everyone, I'm happy to announce that we have just completed testing of the gem5-specific patches for Linux 4.14 and 4.15. The new kernel sources can be downloaded from the gem5/v4.14 [1] and gem5/v4.15 branches in the arm/linux [3] project on Gerrit. Most users should prefer the 4.14 kernel

[gem5-users] Linux 4.9 kernel for gem5 now available for Arm

Hi Everyone, I'm happy to announce that we have just completed testing of the gem5-specific patches for Linux 4.9. The new kernel is can be downloaded from the gem5/v4.9 branch in the arm/linux [1] repository. The kernel comes with default configurations for Armv7 and Armv8 and has the same set

[gem5-users] Updated gem5 Linux kernel repo structure for Arm kernels

Hi Everyone, I have just uploaded the Linux kernel repos we used to host on GitHub to Google Source. While doing so, I slightly re-arranged the branches in the work better for the new unified kernel trees with both aarch64 and aarch32 support. I have updated the build instructions on the Wiki

Re: [gem5-users] [gem5-dev] Gem5 queries

heir simulations with gem5 for cortex-M4 I am also curious about memory figures: Can gem-5 provide the RAM taken by the code running on some architecture (Cortex-A lets say which is supported)? Best, Fahad On Thu, Oct 26, 2017 at 4:12 PM, Andreas Sandberg <andreas.sandb...@arm.com> wrote: Hi Faha

Re: [gem5-users] [gem5-dev] Gem5 queries

Hi Fahad, There is currently no support for the Arm M profile in gem5. Supporting the M profile (Cortex M4 or other microcontrollers) would require quite a bit of work since they have a system architecture that differs from A class. The biggest difference is in interrupt handling. M-class does

Re: [gem5-users] ARM v8 KVM - GEM5

Hi Yasir, The reason you have to sudo to get access to the device is because most Linux distributions restrict access to /dev/kvm. You can change the permissions manually or add yourself to the relevant groups (the group is probably called kvm or something along those lines). Errno 19

Re: [gem5-users] [gem5-dev] gem5 workshop at the ARM Research Summit

, Andreas Sandberg wrote: Hi Everyone, We are happy to invite you all to the gem5 workshop<http://gem5.org/ARM_Research_Summit_2017_Workshop> [1] at the ARM Research Summit<https://developer.arm.com/research/summit> [2]. The ARM Research Summit will take place in Cambridge (UK) over the days

Re: [gem5-users] [gem5-dev] gem5 workshop on the 11th September -- Full program now available

Hi Everyone, I accidentally included an incorrect URL to the workshop in the previous email. The correct one is: http://gem5.org/ARM_Research_Summit_2017_Workshop Sorry about the noise. Cheers, Andreas On 01/08/2017 14:30, Andreas Sandberg wrote: Hi Everyone, TLDR; There will be a gem5

[gem5-users] gem5 workshop on the 11th September -- Full program now available

Hi Everyone, TLDR; There will be a gem5 workshop in Cambridge (UK) on the 11th September. The workshop workshop program is now on the wiki [1]. There is still time to register, see the workshop page [1] for details. We are happy to invite you all to the gem5 workshop [1] at the ARM Research

[gem5-users] gem5 workshop at the ARM Research Summit

veloper.arm.com/research/summit> [2]. Early registration end on the 7th July and standard registration ends on the 13th August. = Can I contribute? = Yes! We can still accommodate a shorter talks (15 min including questions). Let Andreas Sandberg (andreas.sandb...@arm.com<mailto:andreas.sandb.

[gem5-users] Fixes for PyBind issues

Hi Everyone, Some of our internal users recently ran into various issues related to the new PyBind wrappers. These are the issues I'm aware of: * Events implemented in Python aren't reference counted correctly. There are cases where the Python side of an event gets deallocated, but not the

Re: [gem5-users] [gem5-dev] gem5 build failure

On 27/01/17 12:32, Pierre-Yves Péneau wrote: On 01/27/2017 01:20 PM, Andreas Sandberg wrote: Hi Pierre, I send out an email to the dev list on the 12th of January (Header order issues) describing a similar issue we have in our CI system. I have an updated version of the style checker

Re: [gem5-users] [gem5-dev] gem5 build failure

Hi Pierre, I send out an email to the dev list on the 12th of January (Header order issues) describing a similar issue we have in our CI system. I have an updated version of the style checker that enforces that Python.h is included first and plan to post it after lunch. I would like to avoid

Re: [gem5-users] Build error for ARM full system mode build

, 10:20, "Pierre-Yves Péneau" <pierre-yves.pen...@lirmm.fr> wrote: Hi, As fas as I know, this code is the result of a collaboration between our lab and ARM, and has been merged in the gem5 repository. See this email [1] from Andreas Sandberg sent on 22th July,

[gem5-users] gem5 positions @ ARM in Cambridge (UK)

Fellow gem5 users/developers, First of all, apologies for the wide distribution of this slightly off-topic email. ARM is currently looking for people to work on various aspects of simulation and modelling. We currently have two positions open in Research, one internship and one permanent, where

Re: [gem5-users] Building a DTB file for NoMali Android

Hi Sebastian, You should ideally not use the old DTBs that we used to ship with the ancient kernels. All 4.x kernels use the DTBs that ship with gem5 (see system/arm/dt/). These use the new VExpress_GEM5_V1 platform instead of the old VExpress_EMM platform. See the wiki for more details:

Re: [gem5-users] Connecting a VNC to Full System Linux Simulation

Hi Sebastian, You seem to be using a headless Ubuntu system, which means that you there is only going to be a text console once the system has booted. I suspect that the kernel has been compiled without framebuffer console support, which means that there won't be any display output on the

Re: [gem5-users] Using NoMali on Full System Emulation for Linux on ARM

Hi Sebastian, Getting NoMali to work with Linux isn't that different from Android. You'll need to integrate the kernel-side driver with your kernel (just follow the instructions for Android). The difference is the user space driver. Instead of using the user space driver for a Android 4.4 in

Re: [gem5-users] Global objects

Hi Louisa, I think what you¹re looking for is a pretty standard singleton pattern. See for example [1] or [2]. The basic idea is that you make the constructor private and provide a static method (usually called MyClass::instance()) that returns the global instance. Depending on what you¹re

Re: [gem5-users] How to use CommMonitor in the latest gem5 dev version?

Hi Mohammad, I updated the CommMonitor some time ago to make it use the new probe interface instead of bundling all analyses within the monitor itself. This means that you need to hook up a memory trace probe to the monitor to get a memory trace. There is a separate probe for stack distances

Re: [gem5-users] Bypassing software rendering

Hi Guru, There are some early KitKat build instructions on the Wiki [1]. You probably want as new a version as possible of Android if you¹re doing browser benchmarking since the browser tends to change a lot. There is already a stub-GPU model in gem5 that simulates a Mali 6xx/7xx. You¹ll need

Re: [gem5-users] KMI KMIDATA register reset to 0

Hi, I just had a quick look at the PL050 documentation and the code. I think you might be correct in that the register shouldn’t be reset to zero after reading the last byte in a transmission. The gem5 implementation of the PL050 is somewhat simplified since it doesn’t implement any timing on

Re: [gem5-users] ARM 64 bit disk error

Hi Junaid, Judging from your command line, you're simulating a 32-bit platform. This means that gem5 runs the 32-bit ARM kernel by default and disables 64-bit support in the simulated system. You need to explicitly request the VExpress_EMM64 machine type to start in 64-bit mode. For example:

Re: [gem5-users] ARM : Hang while booting arm_detailed quadcore CPU

Hi Lokesh, Judging from the stack trace, I'd suspect the problem you're seeing could be caused by gem5's generic timer model not supporting virtual timers. Some recent kernels insist in having this support and always touch those registers if a generic timer (aka architected timer) is present in

Re: [gem5-users] how to support 8 cores for ARMv8 FS simulation

Hi, The reason your kernel doesn't bring up more than four cores is because the dtb file you're using (assuming it's the upstream one) only lists four CPUs. For ARM systems, Linux relies on the dtb file to discover resources on buses that don't support enumeration. For gem5, that means pretty

Re: [gem5-users] CCRegs

Hi Christian, The CCregs are Condition Code registers. In order to make it easier to track dependencies in the pipeline models, the flags register is broken into three different condition code registers (two CC regs are reserved for microcode). There are a couple of helper functions in

Re: [gem5-users] repeat switch drain and resume

if this is the error message? Thanks Srini On 02/03/14, Andreas Sandberg wrote: Hi Srini, Could you provide some more details about your experiments? Which architecture are you simulating and which CPU models are you using? Also, which version of gem5 are you using? Preferably, which commit are you on? Could

Re: [gem5-users] repeat switch drain and resume

Hi Srini, Could you provide some more details about your experiments? Which architecture are you simulating and which CPU models are you using? Also, which version of gem5 are you using? Preferably, which commit are you on? Could you try to run the regressions tests on the simulator?

Re: [gem5-users] implement cache flush in classic memory model

The simplest way to implement this (assuming that you want to invalidate the whole cache and not a single block) is probably to break into Python and execute something like this: m5.memWriteback(root) m5.memInvalidate(root) These functions are called recursively on the object tree denoted by

Re: [gem5-users] Building m5 util

Hi Ahmad, On 10/09/2013 11:06 AM, Ahmad Hassan wrote: I have built gem5.opt but I cannot build 'm5' utility inside gem5/util/m5. If I run 'make' inside gem5/util/m5 then I get the following errors; gem5/util/m5# make m5 cc m5.c -o m5 /tmp/ccw63Np2.o: In function `read_file':

Re: [gem5-users] Dumping stats every period of fixed number of instructions

Date: Tue, 21 May 2013 16:26:16 +0200 From: Andreas Sandberg andr...@sandberg.pp.se mailto:andr...@sandberg.pp.se To: gem5 users mailing list gem5-users@gem5.org mailto:gem5-users@gem5.org Subject: Re: [gem5-users] Dumping stats every period of fixed number ofinstructions Message-ID

Re: [gem5-users] Dumping stats every period of fixed number of instructions

Hi Shervin, On 07/25/2013 09:36 PM, shervin hajiamini wrote: I want to dump the statistics periodically based on the fixed number of instructions. I already followed the following post: http://www.mail-archive.com/gem5-users@gem5.org/msg07544.html

Re: [gem5-users] MemCmd for CleanInvalid

Hi Udaya, The drain() call is used to make sure that there are no transactions pending. The actual writeback and invalidation is done by memWriteback() and memInvalidate(). The Python world controls draining and decides what needs to be done. In case of a checkpoint, it will first drain the

Re: [gem5-users] Simultaneous VMs using Gem5.

Hi Mazen, On 06/06/2013 08:47 AM, Mazen Ezzeddine wrote: I am new to Gem5, please advise me about the following issues. Note that I am running x86_64 GNU-Linux. * Suppose that we are running a guest VM, say ARM_Linux, emulated using Gem5. Does the guest OS running inside the VM

Re: [gem5-users] Dumping stats every period of fixed number of instructions

Hi Shervin, Negar is right in that there is currently no good way of stopping the simulator every N instructions to dump statistics. I needed to do the same thing some time ago and added support for it in my local 'fixes' branch of gem5 [1]. The changeset you want is [2]. I haven't pushed the

Re: [gem5-users] alarm(1) in pollevent.cc

Hi, Actually, I don't think the alarm event is needed. It is indeed forcing a check of all the file descriptors every second, but they should be setup to deliver SIGIOs on activity. So, my best guess is that this is a workaround that fixes a (rare) race condition between registering a file