On 2022/7/8 17:33, Christoph Hellwig wrote:
On Fri, Jul 08, 2022 at 05:00:59PM +0800, Baolu Lu wrote:
Do we really need to export this symbol? It is not used beyond the iommu
core code.
virtio-iommu calls it and can be modular.
Yes. Thanks for the explanation.
Reviewed-by: Lu Baolu
Best
On 2022/7/8 16:06, Christoph Hellwig wrote:
This method is never actually called.
Signed-off-by: Christoph Hellwig
Reviewed-by: Lu Baolu
Best regards,
baolu
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 1 -
include/linux/iommu.h | 4 +---
2 files changed, 1
On 2022/7/8 16:06, Christoph Hellwig wrote:
Remove the unused iommu_dev_feature_enabled function.
Signed-off-by: Christoph Hellwig
A nit comment below, anyway
Reviewed-by: Lu Baolu
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 1 -
drivers/iommu/iommu.c | 13
On 2022/7/8 16:06, Christoph Hellwig wrote:
-void generic_iommu_put_resv_regions(struct device *dev, struct list_head *list)
+void iommu_put_resv_regions(struct device *dev, struct list_head *list)
{
struct iommu_resv_region *entry, *next;
@@ -2610,7 +2597,7 @@ void
On 2022/7/7 16:30, Ethan Zhao wrote:
-static int show_device_domain_translation(struct device *dev, void *data)
+static int __show_device_domain_translation(struct device *dev, void *data)
{
- struct device_domain_info *info = dev_iommu_priv_get(dev);
- struct dmar_domain *domain =
On 2022/7/7 09:01, Tian, Kevin wrote:
From: Lu Baolu
Sent: Saturday, July 2, 2022 9:56 AM
-out_unlock:
+ set_bit(num, iommu->domain_ids);
+ info->refcnt = 1;
+ info->did= num;
+ info->iommu = iommu;
+ domain->nid = iommu->node;
One nit. this line should be
Hi Robin,
On 2022/4/30 02:06, Robin Murphy wrote:
On 29/04/2022 9:50 am, Robin Murphy wrote:
On 2022-04-29 07:57, Baolu Lu wrote:
Hi Robin,
On 2022/4/28 21:18, Robin Murphy wrote:
Move the bus setup to iommu_device_register(). This should allow
bus_iommu_probe() to be correctly replayed
On 2022/7/1 16:15, Tian, Kevin wrote:
From: Lu Baolu
Sent: Wednesday, June 29, 2022 3:47 PM
+ spin_lock_irqsave(_domain_lock, flags);
list_for_each_entry(info, >devices, link) {
- if (!info->dev)
- continue;
-
suppose you can replace all
On 2022/7/1 15:58, Tian, Kevin wrote:
From: Lu Baolu Sent: Wednesday, June 29,
2022 3:47 PM
The disable_dmar_iommu() is called when IOMMU initialization fails
or the IOMMU is hot-removed from the system. In both cases, there
is no need to clear the IOMMU translation data structures for
On 2022/7/1 16:15, Tian, Kevin wrote:
From: Lu Baolu
Sent: Wednesday, June 29, 2022 3:47 PM
+ spin_lock_irqsave(_domain_lock, flags);
list_for_each_entry(info, >devices, link) {
- if (!info->dev)
- continue;
-
suppose you can replace all
On 2022/7/1 15:53, Tian, Kevin wrote:
From: Lu Baolu
Sent: Wednesday, June 29, 2022 3:47 PM
v3:
- Split reduction of lock ranges from changing irqsave.
https://lore.kernel.org/linux-
iommu/BN9PR11MB52760A3D7C6BF1AF9C9D34658CAA9@BN9PR11MB5276.
namprd11.prod.outlook.com/
- Fully
On 2022/6/29 21:03, Robin Murphy wrote:
On 2019-06-12 01:28, Lu Baolu wrote:
The drhd and device scope list should be iterated with the
iommu global lock held. Otherwise, a suspicious RCU usage
message will be displayed.
[ 3.695886] =
[ 3.695917] WARNING:
On 2022/7/1 04:36, Nicolin Chen wrote:
Cases like VFIO wish to attach a device to an existing domain that was
not allocated specifically from the device. This raises a condition
where the IOMMU driver can fail the domain attach because the domain and
device are incompatible with each other.
On 6/30/22 4:29 PM, Tian, Kevin wrote:
From: Lu Baolu
Sent: Saturday, June 25, 2022 8:52 PM
In the IOMMU hot-add path, there's a need to check whether an IOMMU
has been probed. Instead of checking the IOMMU pointer in the global
list, it's better to allocate a flag bit in iommu->flags for this
On 2022/6/29 09:54, Tian, Kevin wrote:
From: Baolu Lu
Sent: Tuesday, June 28, 2022 7:34 PM
On 2022/6/28 16:50, Tian, Kevin wrote:
From: Baolu Lu
Sent: Tuesday, June 28, 2022 1:41 PM
struct iommu_domain {
unsigned type;
const struct iommu_domain_ops *ops;
unsigned
On 2022/6/28 22:20, Jean-Philippe Brucker wrote:
On Tue, Jun 28, 2022 at 07:53:39PM +0800, Baolu Lu wrote:
Once the iopf_handle_single() is removed, the name of
iopf_handle_group() looks a little weired
and confused, does this group mean the iommu group (domain) ?
while I take some minutes
.
Please help review and suggest.
This series is also available on github:
https://github.com/LuBaolu/intel-iommu/commits/vtd-next-for-v5.20
Best regards,
baolu
Best regards,
baolu
Lu Baolu (6):
iommu/vt-d: Remove unused domain_get_iommu()
iommu/vt-d: Use IDA interface to manage iommu
On 2022/6/28 18:02, Tian, Kevin wrote:
From: Jean-Philippe Brucker
Sent: Tuesday, June 28, 2022 5:44 PM
On Tue, Jun 28, 2022 at 08:39:36AM +, Tian, Kevin wrote:
From: Lu Baolu
Sent: Tuesday, June 21, 2022 10:44 PM
Tweak the I/O page fault handling framework to route the page faults to
On 2022/6/28 17:10, Ethan Zhao wrote:
Hi, Baolu
在 2022/6/28 14:28, Baolu Lu 写道:
Hi Ethan,
On 2022/6/27 21:03, Ethan Zhao wrote:
Hi,
在 2022/6/21 22:43, Lu Baolu 写道:
Tweak the I/O page fault handling framework to route the page faults to
the domain and call the page fault handler retrieved
On 2022/6/28 16:50, Tian, Kevin wrote:
+
+ mutex_lock(>mutex);
+ curr = xa_cmpxchg(>pasid_array, pasid, NULL, domain,
GFP_KERNEL);
+ if (curr)
+ goto out_unlock;
Need check xa_is_err(old).
Either
(1) old entry is a valid pointer, or
return -EBUSY in this case
On 2022/6/28 16:50, Tian, Kevin wrote:
From: Baolu Lu
Sent: Tuesday, June 28, 2022 1:41 PM
struct iommu_domain {
unsigned type;
const struct iommu_domain_ops *ops;
unsigned long pgsize_bitmap;/* Bitmap of page sizes in use */
- iommu_fault_handler_t handler
On 2022/6/28 16:39, Tian, Kevin wrote:
static void iopf_handle_group(struct work_struct *work)
{
struct iopf_group *group;
+ struct iommu_domain *domain;
struct iopf_fault *iopf, *next;
enum iommu_page_response_code status =
IOMMU_PAGE_RESP_SUCCESS;
On 2022/6/28 16:29, Tian, Kevin wrote:
From: Lu Baolu
Sent: Tuesday, June 21, 2022 10:44 PM
+/*
+ * I/O page fault handler for SVA
+ */
+enum iommu_page_response_code
+iommu_sva_handle_iopf(struct iommu_fault *fault, void *data)
+{
+ vm_fault_t ret;
+ struct mm_struct *mm;
+
Hi Ethan,
On 2022/6/27 21:03, Ethan Zhao wrote:
Hi,
在 2022/6/21 22:43, Lu Baolu 写道:
Tweak the I/O page fault handling framework to route the page faults to
the domain and call the page fault handler retrieved from the domain.
This makes the I/O page fault handling framework possible to serve
On 2022/6/27 19:50, Zhangfei Gao wrote:
On 2022/6/21 下午10:43, Lu Baolu wrote:
Add support for SVA domain allocation and provide an SVA-specific
iommu_domain_ops.
Signed-off-by: Lu Baolu
Reviewed-by: Jean-Philippe Brucker
Tested-by: Zhangfei Gao
Have tested the series on aarch64.
Tony
On 2022/6/27 18:14, Tian, Kevin wrote:
From: Lu Baolu
Sent: Tuesday, June 21, 2022 10:44 PM
+struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct
mm_struct *mm)
+{
+ struct iommu_domain *domain;
+ ioasid_t max_pasids;
+ int ret = -EINVAL;
+
+ /* Allocate
On 2022/6/27 19:50, Zhangfei Gao wrote:
On 2022/6/21 下午10:43, Lu Baolu wrote:
Add support for SVA domain allocation and provide an SVA-specific
iommu_domain_ops.
Signed-off-by: Lu Baolu
Reviewed-by: Jean-Philippe Brucker
Tested-by: Zhangfei Gao
Have tested the series on aarch64.
Thank
Hi Kevin,
On 2022/6/27 16:29, Tian, Kevin wrote:
From: Lu Baolu
Sent: Tuesday, June 21, 2022 10:44 PM
The sva iommu_domain represents a hardware pagetable that the IOMMU
hardware could use for SVA translation. This adds some infrastructure
to support SVA domain in the iommu common layer. It
Hi folks,
On 2022/6/21 22:43, Lu Baolu wrote:
Hi folks,
The former part of this series refactors the IOMMU SVA code by assigning
an SVA type of iommu_domain to a shared virtual address and replacing
sva_bind/unbind iommu ops with set/block_dev_pasid domain ops.
The latter part changes the
On 2022/6/24 14:02, Ethan Zhao wrote:
在 2022/6/23 14:57, Lu Baolu 写道:
The IOMMU driver shares the pasid table for PCI alias devices. When the
RID2PASID entry of the shared pasid table has been filled by the first
device, the subsequent device will encounter the "DMAR: Setup RID2PASID
failed"
Hi Joerg,
On 2022/6/24 13:45, Joerg Roedel wrote:
Hi Baolu,
On Wed, May 25, 2022 at 09:40:26AM +0800, Baolu Lu wrote:
How do you like it? If you agree, I can queue it in my next pull request
for fixes.
Would it help to tie DMAR and IOMMU components together, so that
selecting DMAR for IRQ
On 2022/6/24 04:00, Nicolin Chen wrote:
From: Jason Gunthorpe
The KVM mechanism for controlling wbinvd is based on OR of the coherency
property of all devices attached to a guest, no matter whether those
devices are attached to a single domain or multiple domains.
On the other hand, the
On 2022/6/24 09:14, Jerry Snitselaar wrote:
On Fri, Jun 24, 2022 at 08:55:08AM +0800, Baolu Lu wrote:
On 2022/6/24 01:02, Jerry Snitselaar wrote:
Hi Baolu & Dave,
I noticed last night that on a Sapphire Rapids system if you boot without
intel_iommu=on, the idxd driver will crash during p
On 2022/6/24 04:00, Nicolin Chen wrote:
diff --git a/drivers/iommu/mtk_iommu_v1.c b/drivers/iommu/mtk_iommu_v1.c
index e1cb51b9866c..5386d889429d 100644
--- a/drivers/iommu/mtk_iommu_v1.c
+++ b/drivers/iommu/mtk_iommu_v1.c
@@ -304,7 +304,7 @@ static int mtk_iommu_v1_attach_device(struct
On 2022/6/24 01:02, Jerry Snitselaar wrote:
Hi Baolu & Dave,
I noticed last night that on a Sapphire Rapids system if you boot without
intel_iommu=on, the idxd driver will crash during probe in
iommu_sva_bind_device().
Should there be a sanity check before calling dev_iommu_ops(), or is the
On 2022/6/23 10:51, Jerry Snitselaar wrote:
The real problem here is that the iommu sequence ID overflows if
DMAR_UNITS_SUPPORTED is not big enough. This is purely a software
implementation issue, I am not sure whether user opt-in when building a
kernel package could help a lot here.
Is this
On 2022/6/22 23:05, Jerry Snitselaar wrote:
On Wed, Jun 22, 2022 at 7:52 AM Baolu Lu wrote:
On 2022/6/16 02:36, Steve Wahl wrote:
To support up to 64 sockets with 10 DMAR units each (640), make the
value of DMAR_UNITS_SUPPORTED adjustable by a config variable,
CONFIG_DMAR_UNITS_SUPPORTED
On 2022/6/22 20:04, Robin Murphy wrote:
Use the new interface to check the capabilities for our device
specifically.
Signed-off-by: Robin Murphy
---
drivers/vfio/vfio.c | 2 +-
drivers/vfio/vfio_iommu_type1.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git
On 2022/6/22 20:04, Robin Murphy wrote:
Since IOMMU groups are mandatory for drivers to support, it stands to
reason that any device which has been successfully be added to a group
must be on a bus supported by that IOMMU driver, and therefore a domain
viable for any device in the group must be
On 2022/6/16 02:36, Steve Wahl wrote:
To support up to 64 sockets with 10 DMAR units each (640), make the
value of DMAR_UNITS_SUPPORTED adjustable by a config variable,
CONFIG_DMAR_UNITS_SUPPORTED, and make it's default 1024 when MAXSMP is
set.
If the available hardware exceeds
On 2022/6/22 17:09, Ethan Zhao wrote:
在 2022/6/22 12:41, Lu Baolu 写道:
The IOMMU driver shares the pasid table for PCI alias devices. When the
RID2PASID entry of the shared pasid table has been filled by the first
device, the subsequent devices will encounter the "DMAR: Setup RID2PASID
failed"
On 2022/6/22 15:17, Robin Murphy wrote:
On 2022-06-22 02:36, Baolu Lu wrote:
On 2022/6/21 23:14, Robin Murphy wrote:
Since .release_device is now called through per-device ops, any call
which gets as far as a driver definitely*is* for that driver, for a
device which has successfully passed
On 2022/6/22 11:31, Tian, Kevin wrote:
From: Baolu Lu
Sent: Wednesday, June 22, 2022 11:28 AM
On 2022/6/22 11:06, Tian, Kevin wrote:
From: Baolu Lu
Sent: Tuesday, June 21, 2022 5:04 PM
On 2022/6/21 13:48, Tian, Kevin wrote:
From: Baolu Lu
Sent: Tuesday, June 21, 2022 12:28 PM
On 2022/6/21
On 2022/6/22 11:06, Tian, Kevin wrote:
From: Baolu Lu
Sent: Tuesday, June 21, 2022 5:04 PM
On 2022/6/21 13:48, Tian, Kevin wrote:
From: Baolu Lu
Sent: Tuesday, June 21, 2022 12:28 PM
On 2022/6/21 11:46, Tian, Kevin wrote:
From: Baolu Lu
Sent: Tuesday, June 21, 2022 11:39 AM
On 2022/6/21 10
On 2022/6/22 10:56, Ethan Zhao wrote:
在 2022/6/20 16:17, Lu Baolu 写道:
The IOMMU driver shares the pasid table for PCI alias devices. When the
RID2PASID entry of the shared pasid table has been filled by the first
device, the subsequent devices will encounter the "DMAR: Setup RID2PASID
failed"
On 2022/6/21 23:14, Robin Murphy wrote:
Since .release_device is now called through per-device ops, any call
which gets as far as a driver definitely*is* for that driver, for a
device which has successfully passed .probe_device, so all the checks to
that effect are now redundant and can be
On 2022/6/21 23:14, Robin Murphy wrote:
Many drivers do nothing meaningful for .release_device, and it's neatly
abstracted to just two callsites in the core code, so let's make it
optional to implement.
Signed-off-by: Robin Murphy
---
drivers/iommu/fsl_pamu_domain.c | 5 -
On 2022/6/21 13:48, Tian, Kevin wrote:
From: Baolu Lu
Sent: Tuesday, June 21, 2022 12:28 PM
On 2022/6/21 11:46, Tian, Kevin wrote:
From: Baolu Lu
Sent: Tuesday, June 21, 2022 11:39 AM
On 2022/6/21 10:54, Tian, Kevin wrote:
From: Lu Baolu
Sent: Monday, June 20, 2022 4:17 PM
@@ -2564,7
On 2022/6/21 13:48, Tian, Kevin wrote:
From: Baolu Lu
Sent: Tuesday, June 21, 2022 12:28 PM
On 2022/6/21 11:46, Tian, Kevin wrote:
From: Baolu Lu
Sent: Tuesday, June 21, 2022 11:39 AM
On 2022/6/21 10:54, Tian, Kevin wrote:
From: Lu Baolu
Sent: Monday, June 20, 2022 4:17 PM
@@ -2564,7
On 2022/6/21 11:46, Tian, Kevin wrote:
From: Baolu Lu
Sent: Tuesday, June 21, 2022 11:39 AM
On 2022/6/21 10:54, Tian, Kevin wrote:
From: Lu Baolu
Sent: Monday, June 20, 2022 4:17 PM
@@ -2564,7 +2564,7 @@ static int domain_add_dev_info(struct
dmar_domain *domain, struct device *dev
On 2022/6/21 10:54, Tian, Kevin wrote:
From: Lu Baolu
Sent: Monday, June 20, 2022 4:17 PM
@@ -2564,7 +2564,7 @@ static int domain_add_dev_info(struct
dmar_domain *domain, struct device *dev)
ret = intel_pasid_setup_second_level(iommu,
domain,
On 2022/6/20 16:31, Yi Liu wrote:
Hi Baolu,
On 2022/6/20 16:17, Lu Baolu wrote:
The IOMMU driver shares the pasid table for PCI alias devices. When the
RID2PASID entry of the shared pasid table has been filled by the first
device, the subsequent devices will encounter the "DMAR: Setup
On 2022/6/17 15:47, Tian, Kevin wrote:
From: Lu Baolu
Sent: Tuesday, June 7, 2022 9:50 AM
+
+static const struct iommu_domain_ops intel_svm_domain_ops = {
+ .set_dev_pasid = intel_svm_attach_dev_pasid,
+ .block_dev_pasid= intel_svm_detach_dev_pasid,
+ .free
On 2022/6/17 15:43, Tian, Kevin wrote:
From: Baolu Lu
Sent: Friday, June 10, 2022 3:16 PM
+#define __IOMMU_DOMAIN_HOST_VA (1U << 5) /* Host CPU virtual
address */
Do you mean general CPU VA? or Host CPU VA, I'm reading the latter as
2nd
stage?
Host CPU VA. In the near futu
On 2022/6/15 23:40, Jason Gunthorpe wrote:
On Fri, Jun 10, 2022 at 01:37:20PM +0800, Baolu Lu wrote:
On 2022/6/9 20:49, Jason Gunthorpe wrote:
+void iommu_free_pgtbl_pages(struct iommu_domain *domain,
+ struct list_head *pages)
+{
+ struct page *page, *next
On 2022/6/16 08:03, Nicolin Chen wrote:
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 44016594831d..0dd13330fe12 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -4323,7 +4323,7 @@ static int prepare_domain_attach_device(struct
On 2022/6/15 14:22, Tian, Kevin wrote:
From: Baolu Lu
Sent: Tuesday, June 14, 2022 3:21 PM
On 2022/6/14 14:49, Tian, Kevin wrote:
From: Lu Baolu
Sent: Tuesday, June 14, 2022 10:51 AM
The disable_dmar_iommu() is called when IOMMU initialization fails or
the IOMMU is hot-removed from
On 2022/6/15 14:13, Tian, Kevin wrote:
From: Baolu Lu
Sent: Wednesday, June 15, 2022 9:54 AM
On 2022/6/14 14:43, Tian, Kevin wrote:
From: Lu Baolu
Sent: Tuesday, June 14, 2022 10:51 AM
The domain_translation_struct debugfs node is used to dump the DMAR
page
tables for the PCI devices
On 2022/6/14 14:43, Tian, Kevin wrote:
From: Lu Baolu
Sent: Tuesday, June 14, 2022 10:51 AM
The domain_translation_struct debugfs node is used to dump the DMAR
page
tables for the PCI devices. It potentially races with setting domains to
devices. The existing code uses a global spinlock
On 2022/6/15 05:12, Steve Wahl wrote:
On Tue, Jun 14, 2022 at 12:01:45PM -0700, Jerry Snitselaar wrote:
On Tue, Jun 14, 2022 at 11:45:35AM -0500, Steve Wahl wrote:
On Tue, Jun 14, 2022 at 10:21:29AM +0800, Baolu Lu wrote:
On 2022/6/14 09:54, Jerry Snitselaar wrote:
On Mon, Jun 13, 2022 at 6
On 2022/6/14 15:19, Tian, Kevin wrote:
From: Baolu Lu
Sent: Tuesday, June 14, 2022 2:13 PM
On 2022/6/14 13:36, Tian, Kevin wrote:
From: Baolu Lu
Sent: Tuesday, June 14, 2022 12:48 PM
On 2022/6/14 12:02, Tian, Kevin wrote:
From: Lu Baolu
Sent: Tuesday, June 14, 2022 11:44 AM
This allows
On 2022/6/14 15:16, Tian, Kevin wrote:
From: Lu Baolu
Sent: Tuesday, June 14, 2022 10:52 AM
The device_domain_lock is used to protect the device tracking list of
a domain. Remove unnecessary spin_lock/unlock()'s and move the necessary
ones around the list access.
Signed-off-by: Lu Baolu
---
On 2022/6/14 15:07, Tian, Kevin wrote:
From: Lu Baolu
Sent: Tuesday, June 14, 2022 10:52 AM
Fold __dmar_remove_one_dev_info() into dmar_remove_one_dev_info()
which
is its only caller. Make the spin lock critical range only cover the
device list change code and remove some unnecessary checks.
On 2022/6/14 14:52, Tian, Kevin wrote:
From: Lu Baolu
Sent: Tuesday, June 14, 2022 10:52 AM
The iommu->lock is used to protect the per-IOMMU domain ID resource.
Moving the lock into the ID alloc/free helpers makes the code more
compact. At the same time, the device_domain_lock is irrelevant to
On 2022/6/14 14:49, Tian, Kevin wrote:
From: Lu Baolu
Sent: Tuesday, June 14, 2022 10:51 AM
The disable_dmar_iommu() is called when IOMMU initialization fails or
the IOMMU is hot-removed from the system. In both cases, there is no
need to clear the IOMMU translation data structures for devices.
Hi Kevin,
Thanks for your reviewing.
On 2022/6/14 14:43, Tian, Kevin wrote:
From: Lu Baolu
Sent: Tuesday, June 14, 2022 10:51 AM
The domain_translation_struct debugfs node is used to dump the DMAR
page
tables for the PCI devices. It potentially races with setting domains to
devices. The
On 2022/6/14 13:36, Tian, Kevin wrote:
From: Baolu Lu
Sent: Tuesday, June 14, 2022 12:48 PM
On 2022/6/14 12:02, Tian, Kevin wrote:
From: Lu Baolu
Sent: Tuesday, June 14, 2022 11:44 AM
This allows the upper layers to set a domain to a PASID of a device
if the PASID feature is supported
On 2022/6/14 12:02, Tian, Kevin wrote:
From: Lu Baolu
Sent: Tuesday, June 14, 2022 11:44 AM
This allows the upper layers to set a domain to a PASID of a device
if the PASID feature is supported by the IOMMU hardware. The typical
use cases are, for example, kernel DMA with PASID and hardware
On 2022/6/14 09:54, Jerry Snitselaar wrote:
On Mon, Jun 13, 2022 at 6:51 PM Baolu Lu wrote:
On 2022/6/14 09:44, Jerry Snitselaar wrote:
On Mon, Jun 13, 2022 at 6:36 PM Baolu Lu wrote:
On 2022/6/14 04:57, Jerry Snitselaar wrote:
On Thu, May 12, 2022 at 10:13:09AM -0500, Steve Wahl wrote
On 2022/6/14 09:44, Jerry Snitselaar wrote:
On Mon, Jun 13, 2022 at 6:36 PM Baolu Lu wrote:
On 2022/6/14 04:57, Jerry Snitselaar wrote:
On Thu, May 12, 2022 at 10:13:09AM -0500, Steve Wahl wrote:
To support up to 64 sockets with 10 DMAR units each (640), make the
value
On 2022/6/14 04:57, Jerry Snitselaar wrote:
On Thu, May 12, 2022 at 10:13:09AM -0500, Steve Wahl wrote:
To support up to 64 sockets with 10 DMAR units each (640), make the
value of DMAR_UNITS_SUPPORTED adjustable by a config variable,
CONFIG_DMAR_UNITS_SUPPORTED, and make it's default 1024 when
On 2022/6/14 04:38, Jerry Snitselaar wrote:
On Thu, May 12, 2022 at 10:13:09AM -0500, Steve Wahl wrote:
To support up to 64 sockets with 10 DMAR units each (640), make the
value of DMAR_UNITS_SUPPORTED adjustable by a config variable,
CONFIG_DMAR_UNITS_SUPPORTED, and make it's default 1024 when
On 2022/6/10 17:01, Tian, Kevin wrote:
From: Baolu Lu
Sent: Friday, June 10, 2022 2:47 PM
On 2022/6/10 03:01, Raj, Ashok wrote:
On Tue, Jun 07, 2022 at 09:49:33AM +0800, Lu Baolu wrote:
@@ -218,6 +219,30 @@ static void dev_iommu_free(struct device *dev)
kfree(param);
}
+static
On 2022/6/10 04:25, Raj, Ashok wrote:
Hi Baolu
Hi Ashok,
some minor nits.
Thanks for your comments.
On Tue, Jun 07, 2022 at 09:49:35AM +0800, Lu Baolu wrote:
The sva iommu_domain represents a hardware pagetable that the IOMMU
hardware could use for SVA translation. This adds some
On 2022/6/10 03:01, Raj, Ashok wrote:
On Tue, Jun 07, 2022 at 09:49:33AM +0800, Lu Baolu wrote:
Use this field to save the number of PASIDs that a device is able to
consume. It is a generic attribute of a device and lifting it into the
per-device dev_iommu struct could help to avoid the
On 2022/6/10 01:25, Raj, Ashok wrote:
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index 4f29139bbfc3..e065cbe3c857 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -479,7 +479,6 @@ enum {
#define VTD_FLAG_IRQ_REMAP_PRE_ENABLED(1
On 2022/6/10 01:06, Raj, Ashok wrote:
On Thu, Jun 09, 2022 at 03:08:10PM +0800, Lu Baolu wrote:
The IOMMU page tables are updated using iommu_map/unmap() interfaces.
Currently, there is no mandatory requirement for drivers to use locks
to ensure concurrent updates to page tables, because it's
On 2022/6/9 21:32, Jason Gunthorpe wrote:
On Thu, Jun 09, 2022 at 02:19:06PM +0100, Robin Murphy wrote:
Is there a significant benefit to keeping both paths, or could we get away
with just always using RCU? Realistically, pagetable pages aren't likely to
be freed all that frequently, except
On 2022/6/9 20:49, Jason Gunthorpe wrote:
+void iommu_free_pgtbl_pages(struct iommu_domain *domain,
+ struct list_head *pages)
+{
+ struct page *page, *next;
+
+ if (!domain->concurrent_traversal) {
+ put_pages_list(pages);
+
On 2022/6/7 19:58, Jason Gunthorpe wrote:
On Tue, Jun 07, 2022 at 03:44:43PM +0800, Baolu Lu wrote:
On 2022/6/6 14:19, Nicolin Chen wrote:
Worths mentioning the exact match for enforce_cache_coherency is removed
with this series, since there's very less value in doing that since KVM
won't
On 2022/6/6 14:19, Nicolin Chen wrote:
Worths mentioning the exact match for enforce_cache_coherency is removed
with this series, since there's very less value in doing that since KVM
won't be able to take advantage of it -- this just wastes domain memory.
Instead, we rely on Intel IOMMU driver
On 2022/6/6 14:19, Nicolin Chen wrote:
+/**
+ * iommu_attach_group - Attach an IOMMU group to an IOMMU domain
+ * @domain: IOMMU domain to attach
+ * @dev: IOMMU group that will be attached
Nit: @group: ...
+ *
+ * Returns 0 on success and error code on failure
+ *
+ * Specifically,
On 2022/6/2 14:29, Tian, Kevin wrote:
From: Baolu Lu
Sent: Wednesday, June 1, 2022 7:02 PM
On 2022/6/1 17:28, Tian, Kevin wrote:
From: Lu Baolu
Sent: Friday, May 27, 2022 2:30 PM
When the IOMMU domain is about to be freed, it should not be set on
any
device. Instead of silently dealing
On 2022/6/1 17:28, Tian, Kevin wrote:
From: Lu Baolu
Sent: Friday, May 27, 2022 2:30 PM
When the IOMMU domain is about to be freed, it should not be set on any
device. Instead of silently dealing with some bug cases, it's better to
trigger a warning to report and fix any potential bugs at the
On 2022/6/1 17:18, Tian, Kevin wrote:
From: Lu Baolu
Sent: Friday, May 27, 2022 2:30 PM
The iommu->lock is used to protect the per-IOMMU pasid directory table
and pasid table. Move the spinlock acquisition/release into the helpers
to make the code self-contained.
Signed-off-by: Lu Baolu
Hi Kevin,
Thank you for the comments.
On 2022/6/1 17:09, Tian, Kevin wrote:
From: Lu Baolu
Sent: Friday, May 27, 2022 2:30 PM
The iommu->lock is used to protect the per-IOMMU domain ID resource.
Move the spinlock acquisition/release into the helpers where domain
IDs are allocated and freed.
On 2022/6/1 09:43, Tian, Kevin wrote:
From: Jacob Pan
Sent: Wednesday, June 1, 2022 1:30 AM
In both cases the pasid is stored in the attach data instead of the
domain.
So during IOTLB flush for the domain, do we loop through the attach data?
Yes and it's required.
What does the attach data
On 2022/6/1 02:51, Jason Gunthorpe wrote:
Oh, I've spent the last couple of weeks hacking up horrible things
manipulating entries in init_mm, and never realised that that was actually
the special case. Oh well, live and learn.
The init_mm is sort of different, it doesn't have zap in quite the
On 2022/5/31 23:59, Jason Gunthorpe wrote:
On Tue, May 31, 2022 at 02:52:28PM +0100, Robin Murphy wrote:
+ break;
+ pgtable_walk_level(m, phys_to_virt(phys_addr),
Also, obligatory reminder that pfn_valid() only means that pfn_to_page()
gets you a valid struct page.
Hi Robin,
Thank you for the comments.
On 2022/5/31 21:52, Robin Murphy wrote:
On 2022-05-31 04:02, Baolu Lu wrote:
On 2022/5/30 20:14, Jason Gunthorpe wrote:
On Sun, May 29, 2022 at 01:14:46PM +0800, Baolu Lu wrote:
[--snip--]
diff --git a/drivers/iommu/intel/debugfs.c
b/drivers/iommu
On 2022/5/31 21:10, Jason Gunthorpe wrote:
On Tue, May 31, 2022 at 11:02:06AM +0800, Baolu Lu wrote:
For case 2, it is a bit weird. I tried to add a rwsem lock to make the
iommu_unmap() and dumping tables in debugfs exclusive. This does not
work because debugfs may depend on the DMA
On 2022/5/31 18:12, Tian, Kevin wrote:
+++ b/include/linux/iommu.h
@@ -105,6 +105,8 @@ struct iommu_domain {
enum iommu_page_response_code (*iopf_handler)(struct
iommu_fault *fault,
void *data);
void *fault_data;
+
Hi Suravee ,
On 2022/5/31 19:34, Suravee Suthikulpanit wrote:
On 4/29/22 4:09 AM, Joao Martins wrote:
.
+static int amd_iommu_set_dirty_tracking(struct iommu_domain *domain,
+ bool enable)
+{
+ struct protection_domain *pdomain = to_pdomain(domain);
+ struct
On 2022/5/30 20:14, Jason Gunthorpe wrote:
On Sun, May 29, 2022 at 01:14:46PM +0800, Baolu Lu wrote:
From 1e87b5df40c6ce9414cdd03988c3b52bfb17af5f Mon Sep 17 00:00:00 2001
From: Lu Baolu
Date: Sun, 29 May 2022 10:18:56 +0800
Subject: [PATCH 1/1] iommu/vt-d: debugfs: Remove device_domain_lock
On 2022/5/27 23:01, Jason Gunthorpe wrote:
On Fri, May 27, 2022 at 02:30:10PM +0800, Lu Baolu wrote:
The disable_dmar_iommu() is called when IOMMU initialzation fails or
the IOMMU is hot-removed from the system. In both cases, there is no
need to clear the IOMMU translation data structures for
On 2022/5/27 22:59, Jason Gunthorpe wrote:
On Fri, May 27, 2022 at 02:30:08PM +0800, Lu Baolu wrote:
Retrieve the attached domain for a device through the generic interface
exposed by the iommu core. This also makes device_domain_lock static.
Signed-off-by: Lu Baolu
On 2022/5/25 23:25, Jason Gunthorpe wrote:
On Wed, May 25, 2022 at 01:19:08PM +0800, Baolu Lu wrote:
Hi Jason,
On 2022/5/24 21:44, Jason Gunthorpe wrote:
diff --git a/drivers/iommu/iommu-sva-lib.c b/drivers/iommu/iommu-sva-lib.c
index 106506143896..210c376f6043 100644
+++ b/drivers/iommu
On 2022/5/25 19:06, Jean-Philippe Brucker wrote:
On Wed, May 25, 2022 at 11:07:49AM +0100, Robin Murphy wrote:
Did you mean @handler and @handler_token staffs below?
struct iommu_domain {
unsigned type;
const struct iommu_domain_ops *ops;
unsigned long
On 2022/5/25 09:31, Nobuhiro Iwamatsu wrote:
+static const struct iommu_ops visconti_atu_ops = {
+ .domain_alloc = visconti_atu_domain_alloc,
+ .probe_device = visconti_atu_probe_device,
+ .release_device = visconti_atu_release_device,
+ .device_group =
Hi Robin,
On 2022/5/24 22:36, Robin Murphy wrote:
On 2022-05-19 08:20, Lu Baolu wrote:
[...]
diff --git a/drivers/iommu/iommu-sva-lib.c
b/drivers/iommu/iommu-sva-lib.c
index 106506143896..210c376f6043 100644
--- a/drivers/iommu/iommu-sva-lib.c
+++ b/drivers/iommu/iommu-sva-lib.c
@@ -69,3
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