On 13 March 2018 at 03:24, Emil Velikov wrote:
> Hi Dave,
>
> On 11 March 2018 at 23:26, Dave Airlie wrote:
>> From: Dave Airlie
>>
>> I'm not sure everyone wants to be updating their dri3 in a forced
>> march setting, this allows a nicer approach, esp wh
From: Dave Airlie
In order to deal with conversions properly we need to extract
non-64bit sources from vectors instead of expanding them as
the 64-bit code does.
We need non-64bit sources for the 32->64 conversion functions.
Signed-off-by: Dave Airlie
---
src/compiler/glsl/lower_64bit.
From: Dave Airlie
In order to handle d2u etc we need to handle the case where the dest
is 32-bit. Instead of compacting things, we just want to mere
the results into a single vector.
Signed-off-by: Dave Airlie
---
src/compiler/glsl/lower_64bit.cpp | 27 ++-
1 file
From: Elie Tournier
This can also be used to lower some double ops.
[airlied:
this is extract from Elie's work into a standalone patch]
Signed-off-by: Dave Airlie
---
src/compiler/Makefile.sources | 2 +-
src/compiler/glsl/ir_optimization.h
From: Dave Airlie
This will ensure the upcoming changes don't start lowering
doubles using int64 functions.
Signed-off-by: Dave Airlie
---
src/compiler/glsl/lower_64bit.cpp | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/compiler/glsl/lower_64bit.cpp
From: Dave Airlie
If this function saw a 32-bit source it would just return the
IR without doing any conversion, this adds the ability to denote
where 32-bit sources are expected and will be used in subsequent
patches to add 32->64 conversions.
Signed-off-by: Dave Airlie
---
src/compiler/g
I've been fixing up Elie's work and although the produced shaders are large,
and really show up the copy prop and sb liveness passes as horrible inefficent
when you have lots of if statements, I think we should start angling towards
upstreaming it.
It now passes 99% of the piglit tests on r600 wit
From: Dave Airlie
This picks the correct double packing and unpacking function,
and type to unpack into.
Signed-off-by: Dave Airlie
---
src/compiler/glsl/lower_64bit.cpp | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/src/compiler/glsl/lower_64bit.cpp
b
Did anything ever comes of this series, trying some soft fp64 shaders,
and glsl copy opt is taking 2-3 seconds on the big ones.
Nearly all spent in hash table insertions.
Dave.
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From: Dave Airlie
This fixes an illegal command buffer on the host seen with
piglit arb_internalformat_query2-max-dimensions
Signed-off-by: Dave Airlie
---
src/gallium/winsys/virgl/drm/virgl_drm_winsys.c | 8 ++--
src/gallium/winsys/virgl/vtest/virgl_vtest_winsys.c | 8 ++--
2
From: Dave Airlie
I'm not sure everyone wants to be updating their dri3 in a forced
march setting, this allows a nicer approach, esp when you want
to build on distro that aren't brand new.
I'm sure there are plenty of ways this patch could be cleaner,
and I've also not
s to 16.
>
Reviewed-by: Dave Airlie
> CC:
> CC: Alex Smith
> ---
> src/amd/vulkan/radv_device.c | 4 ++--
> src/amd/vulkan/radv_private.h | 4 +++-
> 2 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/r
From: Dave Airlie
I'm not sure everyone wants to be updating their dri3 in a forced
march setting, this allows a nicer approach, esp when you want
to build on distro that aren't brand new.
I'm sure there are plenty of ways this patch could be cleaner,
and I've also not
Working under embargoes does suck and quite a lot of people had seen
this code but I think the process falls down a bit when Jason wrote
(even tongue-in-cheek)
"You're 4.5 hours too late, I'm afraid. I'd be happy to take some
patches though. :-)"
I know in this case Dylan writing patches is proba
From: Dave Airlie
It appears its quite legal to do image copies on multisample
images, however due to a bug in our txf handling and incomplete
tests we never actually noticed we didn't do it properly in radv.
This patch implements a compute shader to copy multiple samples
of an image to an
From: Dave Airlie
This is ported from the sb backend, there are some issues with
evergreen stacks on the boundary between entries and ALU_PUSH_BEFORE
instructions.
Whenever we are going to use a push before, we check the stack
usage and if we have to use the workaround, then we switch to
a
On 9 March 2018 at 09:52, Bas Nieuwenhuizen wrote:
> Turns out they did not reset the patch number on release.
Oops and I think I suggested this, sorry!
for the series:
Reviewed-by: Dave Airlie
> ---
> src/amd/vulkan/radv_extensions.py | 4 ++--
> 1 file changed, 2 insertions(+),
From: Dave Airlie
This fixes a memory trashing crash (not the test) seen with
dEQP-GLES3.stress.draw.unaligned_data.random.203
on virgl.
Signed-off-by: Dave Airlie
---
src/gallium/auxiliary/util/u_vbuf.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary
From: Dave Airlie
The spec is pretty clear that this can be 0, and that it operates
as a reserved binding.
Fixes:
dEQP-VK.binding_model.descriptor_update.empty_descriptor.uniform_buffer
Signed-off-by: Dave Airlie
---
src/amd/vulkan/radv_descriptor_set.c | 1 -
1 file changed, 1 deletion
From: Dave Airlie
If it's zero but put it in args we still end up consuming a
register for it.
This fixes some spilling in the NIR paths in Dirt Rally that
isn't seen with TGSI.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 3 +--
1 file changed, 1 inser
in some Bioshock Infinite shaders.
>
>
> While not as bad as Bioshock (which went from 0 -> 268 in three shaders)
> Dirt Showdown VGPR spilling went from 40 -> 67 and 0 -> 17 in a couple of
> shaders also as a result of loop unrolling.
Okay!
Reviewed-by: Dave Airlie
Dave.
For 1,1.5,2
Reviewed-by: Dave Airlie
On 1 March 2018 at 14:24, Timothy Arceri wrote:
> All the tess shader and tgsi equivalents are here and it allows
> use to use llvm_type_is_64bit() in the following patch without
> exposing it externally.
> ---
> src/gallium/drivers/radeo
On 1 March 2018 at 20:54, Samuel Pitoiset wrote:
> Signed-off-by: Samuel Pitoiset
For the series:
Reviewed-by: Dave Airlie
Dave.
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On 2 March 2018 at 07:12, Samuel Pitoiset wrote:
> Imported from RadeonSI.
For the series
Reviewed-by: Dave Airlie
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From: Dave Airlie
This fixes some hangs seen where the recip_ieee opcodes would
end up split across the wrong slots.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_shader.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
From: Dave Airlie
fs outputs don't start above VARYING_SLOT_VAR0, but I assume
that is there for a reason, so make an exception for fragment
outputs.
This fixes with NIR:
tests/spec/arb_enhanced_layouts/execution/component-layout/fs-output.shader_test
Signed-off-by: Dave Airlie
---
src
From: Dave Airlie
This stops a crash when running (still fails):
tests/spec/arb_gpu_shader_fp64/execution/explicit-location-gs-fs-vs.shader_test
Signed-off-by: Dave Airlie
---
src/gallium/drivers/radeonsi/si_shader_nir.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src
From: Dave Airlie
The nir->llvm conversion was using the wrong srcs.
Fixes:
tests/spec/arb_compute_shader/execution/shared-atomics.shader_test
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/
From: Dave Airlie
This matches the tgsi code.
Fixes arb_texture_multisample texelFetch piglit tests.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common
From: Dave Airlie
The delayed loading code was fail if we had control flow.
This fixes:
tests/spec/arb_shader_image_load_store/execution/image_checkerboard.shader_test
v2: don't use temp_reg before setting temp_reg up.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_sha
From: Dave Airlie
The delayed loading code was fail if we had control flow.
This fixes:
tests/spec/arb_shader_image_load_store/execution/image_checkerboard.shader_test
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_shader.c | 18 +++---
1 file changed, 3 insertions
From: Dave Airlie
Previously we had a check for 1d of narrow 2D textures, however
narrow 2d textures caused gpu hangs, but it was correct for 1d
textures.
This fixes a bunch of 1D image piglits for me.
---
src/gallium/drivers/r600/r600_texture.c | 5 +
1 file changed, 5 insertions(+)
diff
From: Dave Airlie
This was segfaulting:
dEQP-VK.memory.pipeline_barrier.host_write_index_buffer.1024
Fixes: 8de6f797070 (ac/radeonsi: add load_base_vertex() to the abi)
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
For the series.
Reviewed-by: Dave Airlie
On 27 February 2018 at 09:37, Bas Nieuwenhuizen
wrote:
> Nothing to do except using a busy wait loop. At least for old kernels.
>
> A better implementation for newer kernels to come later.
>
> Bugzilla: https://bugs.freedesktop.org/
Acked-by: Dave Airlie
On 28 February 2018 at 08:36, Timothy Arceri wrote:
> Ping?
>
> On 02/02/18 08:54, Timothy Arceri wrote:
>>
>> This was added in 425dc4c4b366 but never used. Also since
>> 100796c15c3a native has superseded llvm.
>> ---
>> src/gall
Reviewed-by: Dave Airlie
Though I suspect the test should handle getting either.
Dave.
On 27 February 2018 at 15:49, Timothy Arceri wrote:
> radeonsi, i965 and anv all treat fdd{x,y} opcodes the same as
> fdd{x,y}_coarse by default. The SPIR-V spec lets the implementation
> deci
From: Dave Airlie
This is never used.
Signed-off-by: Dave Airlie
---
src/amd/vulkan/radv_private.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index aa38106..50801e8 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd
From: Dave Airlie
This fixes:
dEQP-VK.glsl.440.linkage.varying.component.*
Fixes: 1c57a6da5e3 (ac/shader: scan vertex inputs usage mask)
Signed-off-by: Dave Airlie
---
src/amd/common/ac_shader_info.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amd/common
From: Dave Airlie
It looks like we had all the pieces in place for this,
just never tested it and turned it on.
I don't see any CTS regressions and the computeshader
demo runs.
Signed-off-by: Dave Airlie
---
src/amd/vulkan/radv_device.c | 2 --
1 file changed, 2 deletions(-)
diff --
On 26 February 2018 at 23:04, Samuel Pitoiset wrote:
> Ported from RadeonSI.
>
> That doesn't fix anything known but I think we need it.
I'd really like it to fix something :-)
How come we don't also need it for the TXF path?
Dave.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac
From: Dave Airlie
Inspired by a passing commit to radeonsi.
---
src/amd/vulkan/radv_device.c | 93 ++-
src/amd/vulkan/radv_private.h | 3 +-
2 files changed, 40 insertions(+), 56 deletions(-)
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan
On 22 February 2018 at 11:58, Dieter Nützel wrote:
> Am 22.02.2018 02:35, schrieb Dave Airlie:
>>
>> 2018-02-22 10:57 GMT+10:00 Dieter Nützel :
>>>
>>> Making all in vulkan
>>> make[3]: Verzeichnis „/opt/mesa/src/vulkan“ wird betreten
>>&
2018-02-22 10:57 GMT+10:00 Dieter Nützel :
> Making all in vulkan
> make[3]: Verzeichnis „/opt/mesa/src/vulkan“ wird betreten
> make[3]: *** Keine Regel vorhanden, um das Ziel
> „/unstable/linux-dmabuf/linux-dmabuf-unstable-v1.xml“,
> benötigt von „wsi/linux-dmabuf-unstable-v1-protocol.c“, zu ers
From: Dave Airlie
Since v2 might take a while to rollout, we should reduce
these inside some gathered minimums and then v2 can increase
them using host values.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/virgl/virgl_winsys.h | 16
1 file changed, 8 insertions(+), 8
From: Dave Airlie
This checks the kernel api is new enough and asks for the
larger caps size since the kernel won't mess it up now.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/virgl/virgl_winsys.h | 25 ++-
src/gallium/winsys/virgl/drm/virgl_drm_winsys.c
From: Dave Airlie
This moves the lds_size calcs into the shader so we have all
the size stuff in one file.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 33 +
src/amd/common/ac_nir_to_llvm.h | 1 +
src/amd/vulkan/radv_pipeline.c | 30
From: Dave Airlie
Move all calculations to shader generation.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 39 +++
src/amd/vulkan/radv_pipeline.c | 11 +++
2 files changed, 30 insertions(+), 20 deletions(-)
diff --git a/src/amd
From: Dave Airlie
This drops the now unneeded scanning and results in favour
of the ones in the info.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 28
src/amd/common/ac_nir_to_llvm.h | 4
src/amd/vulkan/radv_pipeline.c | 7 +++
3
From: Dave Airlie
This removes the last TES-specifc user sgpr.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 51 +
src/amd/common/ac_nir_to_llvm.h | 4 ++--
src/amd/vulkan/radv_pipeline.c | 18 ++-
3 files changed, 20
From: Dave Airlie
This removes the other geometry specific user sgpr.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 37 +++--
src/amd/common/ac_nir_to_llvm.h | 1 -
src/amd/vulkan/radv_pipeline.c | 9 -
3 files changed, 19
From: Dave Airlie
This drops one of the geometry specific user sgprs,
we can work this out at compile time.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 15 +++
src/amd/vulkan/radv_pipeline.c | 9 +
2 files changed, 8 insertions(+), 16 deletions
From: Dave Airlie
TES needs num_patches to do some of the calculations.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 4 +++-
src/amd/common/ac_nir_to_llvm.h | 3 ++-
src/amd/vulkan/radv_pipeline.c | 4
3 files changed, 9 insertions(+), 2 deletions(-)
diff --git a
From: Dave Airlie
Move all calculations to shader generation.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 22 +-
src/amd/vulkan/radv_pipeline.c | 8 ++--
2 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/src/amd/common
From: Dave Airlie
This removes the last TCS specific user sgpr.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 118 ++--
src/amd/common/ac_nir_to_llvm.h | 2 +-
src/amd/vulkan/radv_pipeline.c | 9 ---
src/amd/vulkan/radv_shader.c
From: Dave Airlie
Instead of recalculating the value, use the shader calculated value.
Signed-off-by: Dave Airlie
---
src/amd/vulkan/radv_pipeline.c | 30 ++
1 file changed, 2 insertions(+), 28 deletions(-)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd
From: Dave Airlie
This gathers the ls outputs written by the vertex shader,
and the tcs outputs, these are needed to calculate certain
tcs parameters.
These have to be separate for combined gfx9 shaders.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_shader_info.c | 48
It seems to be season for reducing sgpr usage, but I was looking
at the tess/gs sgprs on radv when I realised nothing in them wasn't
static from the pipeline at compile time, so there is no need to
go passing to the shader via the user sgprs.
This series removes all the tess/gs specific users sgpr
From: Dave Airlie
This just moves this function to an inline so the shader_info
pass can use it.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 22 --
src/amd/common/ac_shader_info.h | 25 +
2 files changed, 25 insertions(+), 22
From: Dave Airlie
Inline all calcs at shader creation.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 27 ++-
src/amd/common/ac_nir_to_llvm.h | 1 +
src/amd/vulkan/radv_pipeline.c | 12 ++--
3 files changed, 25 insertions(+), 15 deletions
From: Dave Airlie
We can precalculate input_vertex_size at compile time.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 30 --
src/amd/common/ac_nir_to_llvm.h | 1 -
src/amd/vulkan/radv_pipeline.c | 10 --
3 files changed, 4 insertions
From: Dave Airlie
This just removes an unneeded variable.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 31cab3b..d0394d3 100644
These are just some cleanups that popped out of a series I was working
on to remove all the tcs/tes user sgprs stuff.
I've got the full patchset working on VI, just need to test on Vega now.
Dave.
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From: Dave Airlie
This just avoids passing this value via user sgprs.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 5 -
src/amd/vulkan/radv_pipeline.c | 2 +-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd
From: Dave Airlie
dEQP-VK.tessellation.invariance.outer_edge_symmetry.triangles_equal_spacing_ccw
was hitting an llvm assert due to one value being an int and the
other a float.
This just casts both values to integer and fixes the test.
Fixes:
dEQP
From: Dave Airlie
We never use it in the shaders.
Signed-off-by: Dave Airlie
---
src/amd/vulkan/radv_pipeline.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index a2dec0e..9990a3e 100644
--- a/src/amd
From: Dave Airlie
Just consolidates some code to make it easier to change.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index
From: Dave Airlie
This just avoids marking it as a used output if we don't
actually use it.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/c
On 15 February 2018 at 01:26, Gert Wollny wrote:
> Am Mittwoch, den 14.02.2018, 17:18 +1000 schrieb Dave Airlie:
>> From: Dave Airlie
>>
>> A bunch of CTS tests led me to write
>> tests/shaders/ssa/fs-while-loop-rotate-value.shader_test
>> which r600/sb alwa
From: Dave Airlie
A bunch of CTS tests led me to write
tests/shaders/ssa/fs-while-loop-rotate-value.shader_test
which r600/sb always fell over on.
This patch fixes it, but I'll probably never be 100% sure why.
Anyways what appears to be happening is when gcm is scheduling
the copy_movs
From: Dave Airlie
A bunch of CTS tests led me to write
tests/shaders/ssa/fs-while-loop-rotate-value.shader_test
which r600/sb always fell over on.
GCM seems to move some of the copys into other basic blocks,
if we don't allow this to happen then it doesn't seem to schedule
From: Dave Airlie
A bunch of CTS tests led me to write
tests/shaders/ssa/fs-while-loop-rotate-value.shader_test
which r600/sb always fell over on.
This patch fixes it, but I'll probably never be 100% sure why.
Anyways what appears to be happening is when gcm is scheduling
the copy_movs
From: Dave Airlie
The gallium query types changed, so we need to remap from the
gallium ones to the virgl ones.
Fixes:
dEQP-GLES3.functional.transform_feedback.basic_types*
Fixes: 3f6b3d9db (gallium: add PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE)
Signed-off-by: Dave Airlie
---
src/gallium
From: Dave Airlie
This enable ARB_sample_shading if the renderer supports it.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/virgl/virgl_encode.c | 3 ++-
src/gallium/drivers/virgl/virgl_protocol.h | 1 +
src/gallium/drivers/virgl/virgl_screen.c | 5 +++--
3 files changed, 6
From: Dave Airlie
This relies on the renderer code landing first.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/virgl/virgl_encode.c | 15 ++-
src/gallium/drivers/virgl/virgl_protocol.h | 12
src/gallium/drivers/virgl/virgl_screen.c | 3 ++-
3 files changed
From: Dave Airlie
Looks like one conversion was missed.
Fixes: e149a0253 (mesa,glsl,nir: reduce gl_state_index size to 2 bytes)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105067
Signed-off-by: Dave Airlie
---
src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp | 2 +-
1 file changed, 1
From: Stéphane Marchesin
This struct allows us to report:
- accurate max point size/line width.
- accurate texel and texture gather offsets
- vertex/geometry limits.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/virgl/virgl_hw.h| 28 ++
src/gallium/drivers
From: Dave Airlie
The size check seems backwards, if userspace gives us a size
larger it is probably asking for a newer version of the caps,
so we just fill in the caps version we have at the smaller
size, and it can work it out from there.
Userspace will probably still need a fallback as old
From: Dave Airlie
Nobody queries these and nobody sets them to anything useful,
the docs say TODO.
Drop them until a use appears.
Signed-off-by: Dave Airlie
---
src/gallium/docs/source/screen.rst | 4
src/gallium/drivers/etnaviv/etnaviv_screen.c | 5 -
src/gallium
From: Dave Airlie
I found a shader with
DCL TEMP[0], LOCAL
DCL TEMP[1..256], ARRAY(1), LOCAL
DCL TEMP[257..512], ARRAY(2), LOCAL
DCL TEMP[513..768], ARRAY(3), LOCAL
DCL TEMP[769], LOCAL
This would remap badly, as it would add up all the spilled sizes
and subtract it from the temp for 0. If the
From: Dave Airlie
This fixes:
KHR-GL45.tessellation_shader.tessellation_control_to_tessellation_evaluation.gl_PatchVerticesIn
---
src/gallium/drivers/r600/r600_shader.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium
From: Dave Airlie
This fixes:
KHR-GL45.texture_gather.swizzle
on cayman and redwood.
---
src/gallium/drivers/r600/r600_shader.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600/r600_shader.c
index
From: Dave Airlie
This ports the texture gather integer workaround from radeonsi.
This fixes:
KHR-GL45.texture_gather.plain-gather-uint/int*
v2: add rect support, fix 2d array shadow
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_shader.c | 162
From: Dave Airlie
This ports the texture gather integer workaround from radeonsi.
This fixes:
KHR-GL45.texture_gather.plain-gather-uint/int*
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_shader.c | 135 +
1 file changed, 135 insertions(+)
diff
From: Dave Airlie
Fixes: 2d5b5d267e (r600: work out target mask at framebuffer bind.)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104989
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_state.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a
From: Glenn Kennard
This is taken from Glenn Kennards scratch series, but separated
out as a cleanup by me.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_shader.c | 37 --
1 file changed, 17 insertions(+), 20 deletions(-)
diff --git a/src
From: Dave Airlie
RX550 fails
dEQP-VK.renderpass.suballocation.multisample.d32_sfloat_s8_uint.samples_2
So increase the range of the workaround.
Fixes: f4c534ef6 (radv: don't enable tc compat for d32s8 + 4/8 samples (v1.1))
Signed-off-by: Dave Airlie
---
src/amd/vulkan/radv_image.
On 6 February 2018 at 14:12, Roland Scheidegger wrote:
> Am 05.02.2018 um 05:29 schrieb Dave Airlie:
>> From: Dave Airlie
>>
>> This cleans up and fixes the previous fix even more.
>>
>> Buffers from textures start at max const,
>> buffers from buf
From: Dave Airlie
This has 3 srcs.
This fixes:
KHR-GL45.shader_atomic_counter_ops_tests.ShaderAtomicCounterOpsExchangeTestCase
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_shader.c | 32 +++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff
From: Dave Airlie
With sb enabled on cayman, this was overwriting the proper
cf index value with random ones if the dst gpr was 2 or 3,
only save the value for a MOVA instruction.
Fixes:
KHR-GL45.gpu_shader5.uniform_blocks_array_indexing
(on cayman with sb)
Signed-off-by: Dave Airlie
---
src
From: Dave Airlie
If we have gaps in the shader mask we have to have 0x1 in them
according to a comment in radeonsi, and this is required to fix
the test at least on cayman.
We also need to record the highest one written to write to the
ps exports reg.
This fixes:
KHR-GL45
From: Dave Airlie
If we only get 1,2,3,6 framebuffers we want a sparse target mask.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/evergreen_state.c | 10 +++---
src/gallium/drivers/r600/r600_pipe.h | 1 +
src/gallium/drivers/r600/r600_state.c | 2 +-
3 files changed
From: Dave Airlie
This cleans up and fixes the previous fix even more.
Buffers from textures start at max const,
buffers from buffers/images come in from the 168 offset.
This fixes a bunch of:
KHR-GL45.shader_storage_buffer_object*
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600
From: Dave Airlie
for frag shaders we get a value in the key, I expect I need
to make compute work better
---
src/gallium/drivers/r600/r600_shader.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600
From: Dave Airlie
Since enhanced layouts allows setting specific MRT outputs, we
can get sparse outputs, so we have to calculate the shader
mask earlier.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/evergreen_state.c | 3 ++-
src/gallium/drivers/r600/r600_pipe.h | 1
From: Dave Airlie
Set render cond and emit atom.
Fixes:
KHR-GL45.compute_shader.conditional-dispatching
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/evergreen_compute.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/r600
From: Dave Airlie
For buffers we want the size in bytes,
For images we want it in elements.
This fixes:
KHR-GL45.shader_storage_buffer_object.advanced-unsizedArrayLength-cs-std430-vec-pad
---
src/gallium/drivers/r600/evergreen_state.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion
From: Dave Airlie
The compute emission path always emits this currently, and emitting
it on the fragment path breaks the blitter.
This fixes gpu hangs in KHR-GL45.compute_shader.resource-texture
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/evergreen_state.c | 6 --
1 file
From: Dave Airlie
We need to get the grid sizes earlier to fill in to the const
buffer.
Fixes:
KHR-GL45.compute_shader.built-in-variables
and
KHR-GL45.compute_shader.dispatch-indirect
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/evergreen_compute.c | 30
From: Dave Airlie
This fixes:
KHR-GL45.enhanced_layouts.xfb_vertex_streams
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_shader.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c
b/src/gallium/drivers/r600/r600_shader.c
On 2 February 2018 at 18:02, Roland Scheidegger wrote:
> Are you sure of that? You only get 11 stride bits to program, and they
> are in bytes. Therefore I can't see how you could program 2048 (unless
> the hw would interpet 0 as 2048 but I think stride 0 is valid there?).
>
Hmm so GL 4.4 defines
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