[Mesa-dev] [PATCH] radv/gfx10: add missing conversions for 16-bit exports

This fixes dEQP-VK.spirv_assembly.instruction.graphics.16bit_storage.input_output_* Found with RADV_DEBUG=checkir Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 9 + 1 file changed, 9 insertions(+) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd

[Mesa-dev] [PATCH] radv: remove unused code in radv_export_param()

It was hack for geometry shaders. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 16 +--- 1 file changed, 1 insertion(+), 15 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 00c7df8574b..a5eb8404108

[Mesa-dev] [PATCH] radv: pass output values to radv_emit_stream_output()

For GFX10 stream output. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 31 ++- 1 file changed, 18 insertions(+), 13 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index e4ab5847729

[Mesa-dev] [PATCH] radv/gfx10: fix crash when emitting NGG GS prologue

ac_nir_context is initialized after the driver emits the NGG GS prologue so it's likely to crash. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 23 +++ 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c

[Mesa-dev] [PATCH 5/6] radv: pass output values to radv_emit_stream_output()

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 31 ++- 1 file changed, 18 insertions(+), 13 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index bc1d72f51bb..5bd938fc046 100644 --- a/src/amd

[Mesa-dev] [PATCH 3/6] radv: allow to emit PS_DONE/CS_DONE with RELEASE_MEM

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/si_cmd_buffer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index a832dbd89eb..089c7d861c8 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan

[Mesa-dev] [PATCH 4/6] radv: allow to select DST_SEL with RELEASE_MEM

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 2 ++ src/amd/vulkan/radv_private.h| 2 +- src/amd/vulkan/radv_query.c | 2 ++ src/amd/vulkan/si_cmd_buffer.c | 8 ++-- 4 files changed, 11 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan

[Mesa-dev] [PATCH 2/6] radv: restore an assertion in handle_vs_outputs()

The NGG GS epilogue no longers call that function so the assertion is just useless now. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c

[Mesa-dev] [PATCH 6/6] radv: add radv_emit_streamout_{begin, end} helpers

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 43 ++-- 1 file changed, 35 insertions(+), 8 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 4f8137906e3..6a0db2b67e9 100644 --- a/src/amd/vulkan

[Mesa-dev] [PATCH 1/6] radv/gfx10: emit ES outputs of TES when it's not NGG

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index e4ab5847729..d5d30bbcf12 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c

[Mesa-dev] [PATCH] radv/gfx10: invalidate everything in L2 when shaders read data

This includes metadata as well. On GFX10, we have to invalidate the L2 metadata cache when shaders read DCC. Note that we still have to implement GFX10 coherency by introducing INV_L2_METATADA but for now just flush L2. This fixes a corruption with DCC and Talos. Signed-off-by: Samuel Pitoiset

[Mesa-dev] [PATCH 3/8] radv/gfx10: launch 2 compute waves per CU before going onto the next CU

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 13 + 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index efb94cdcd23..a58b0d6d006 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src

[Mesa-dev] [PATCH 8/8] radv/gfx10: emit DISABLE_CONSERVATIVE_ZPASS_COUNTS

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index dacd8c8d803..86b5c812405 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan

[Mesa-dev] [PATCH 6/8] radv/gfx10: set HS/GS/CS.WGP_MODE

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_shader.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 8f37c2bfb67..d055b6c96ca 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd

[Mesa-dev] [PATCH 1/8] ac: import ac_get_compute_resource_limits() from RadeonSI

Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_gpu_info.c | 32 + src/amd/common/ac_gpu_info.h | 4 +++ src/gallium/drivers/radeonsi/si_compute.c | 35 ++- .../radeonsi/si_compute_prim_discard.c| 6 ++-- src

[Mesa-dev] [PATCH 4/8] radv/gfx10: enable vertex shaders without export parameters

GFX10 allows this. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 18 +++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index a58b0d6d006..63583a9c6d9 100644 --- a/src/amd/vulkan

[Mesa-dev] [PATCH 7/8] radv/gfx10: init more registers in the graphics preamble

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/si_cmd_buffer.c | 9 + 1 file changed, 9 insertions(+) diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 6d01e0ad7fd..a832dbd89eb 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan

[Mesa-dev] [PATCH 5/8] radv/gfx10: emit GE_PC_ALLOC

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 17 + 1 file changed, 17 insertions(+) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 63583a9c6d9..fdb0ed29ea4 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan

[Mesa-dev] [PATCH 2/8] radv: use ac_get_compute_resource_limits()

No behaviour change. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 23 ++- 1 file changed, 6 insertions(+), 17 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 7720990ba45..efb94cdcd23 100644 --- a/src/amd

Re: [Mesa-dev] [PATCH 1/2] radv: add more assertions to make sure packets are correctly emitted

On 7/12/19 11:54 AM, Bas Nieuwenhuizen wrote: On Fri, Jul 12, 2019 at 11:13 AM Samuel Pitoiset wrote: Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cs.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_cs.h b/src/amd/vulkan/radv_cs.h

[Mesa-dev] [PATCH 2/2] radv/gfx10: fix wrong emission of GE_CNTL

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 41a1b2014b9..7ecf189b0d6 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan

[Mesa-dev] [PATCH 1/2] radv: add more assertions to make sure packets are correctly emitted

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cs.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_cs.h b/src/amd/vulkan/radv_cs.h index 5f8b59c34cb..2ba7da1fb44 100644 --- a/src/amd/vulkan/radv_cs.h +++ b/src/amd/vulkan/radv_cs.h @@ -42,7

[Mesa-dev] [PATCH 2/2] radv: store a pointer to rad_info in the cmdbuffer

Cleanup. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 75 +++- src/amd/vulkan/radv_private.h| 1 + 2 files changed, 37 insertions(+), 39 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index

[Mesa-dev] [PATCH 1/2] radv: store a pointer to rad_info in the pipeline

Cleanup. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 173 - src/amd/vulkan/radv_private.h | 2 + 2 files changed, 87 insertions(+), 88 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index

[Mesa-dev] [PATCH v2] radv/gfx10: enable 1D textures

Mirror RadeonSI. This also fixes crashes in addrlib. v2: - fix ac_nir_to_llvm Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c| 14 +++--- src/amd/vulkan/radv_image.c| 4 ++-- src/amd/vulkan/winsys/amdgpu

[Mesa-dev] [PATCH] radv/gfx10: do not set alignment on the ngg_emit pointer

This is invalid and this fixes a crash in LLVM. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index bf712b7fe45..32548857b57 100644 --- a/src/amd

[Mesa-dev] [PATCH] radv/gfx10: enable 1D textures

Mirror RadeonSI. This also fixes crashes in addrlib. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_image.c| 4 ++-- src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c | 6 -- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan

[Mesa-dev] [PATCH 2/2] radv: report shader stage name when dumping LLVM IR

For debugging purposes. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 21 + 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 32548857b57..e4ab5847729 100644

[Mesa-dev] [PATCH 1/2] radv: tidy up radv_get_shader_name() and add NGG stages

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.c | 4 ++-- src/amd/vulkan/radv_shader.c | 37 +++- src/amd/vulkan/radv_shader.h | 3 ++- 3 files changed, 32 insertions(+), 12 deletions(-) diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan

[Mesa-dev] [PATCH] radv/gfx10: enable 1D textures

Mirror RadeonSI. This also fixes crashes in addrlib. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_image.c| 4 ++-- src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c | 6 -- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan

[Mesa-dev] [PATCH 2/2] radv/gfx10: fix exporting clip/cull distances for GS

This fixes dEQP-VK.clipping.user_defined.clip_distance.*geom*. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 7da061f7f33

[Mesa-dev] [PATCH 1/2] radv/gfx10: fix exporting the subpass view index for GS

This fixes dEQP-VK.multiview.*geometry*. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 16 +++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 11498bc27aa

[Mesa-dev] [PATCH] radv/gfx10: update OVERWRITE_COMBINER_{MRT_SHARING, WATERMARK}

DCC related, mirror RadeonSI. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 20 1 file changed, 4 insertions(+), 16 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index b7ee0ff6422..a2a4cb0adb2 100644

[Mesa-dev] [PATCH] radv/gfx10: fix maximum number of mip levels for 3D images

The dimensions also have to be adjusted if the number of supported mip levels is changed. This fixes dEQP-VK.api.info.image_format_properties.3d.*. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_formats.c | 14 ++ 1 file changed, 10 insertions(+), 4 deletions(-) diff --git

[Mesa-dev] [PATCH] radv/gfx10: disable TC-compat HTILE for multisampled D32_SFLOAT format

For some reasons D32_SFLOAT is also affected on GFX10, it works fine with previous generations. This fixes some dEQP-VK.renderpass2.depth_stencil_resolve.*. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_image.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git

[Mesa-dev] [PATCH 1/9] radv/gfx10: fix number of GS invocations for NGG

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index f259f01bd75..2ea984c8328 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan

[Mesa-dev] [PATCH 8/9] radv/gfx10: Fix NGG GS output mask handlings for LDS indexing.

attribute for the color to be loaded from the wrong indices. Reviewed-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index b5469677d2b

[Mesa-dev] [PATCH 2/9] radv/gfx10: fix VGT_SHADER_STAGES_EN for GS as NGG

The driver shouldn't set the copy shader bit. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 21 +++-- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 2ea984c8328

[Mesa-dev] [PATCH 9/9] radv/gfx10: enable geometry shaders

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index bfd72caa693..273078239c4 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan

[Mesa-dev] [PATCH 4/9] radv/gfx10: Use correct ES shader for es_vgpr_comp_cnt for GS.

From: Bas Nieuwenhuizen Reviewed-by: Samuel Pitoiset --- src/amd/vulkan/radv_shader.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 79418b401fb..1987d439612 100644 --- a/src/amd/vulkan/radv_shader.c

[Mesa-dev] [PATCH 7/9] radv/gfx10: Simplify output mask handling for NGG GS.

From: Bas Nieuwenhuizen We only ever get in this function for a NGG GS proper. Reviewed-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 13 + 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan

[Mesa-dev] [PATCH 5/9] radv/gfx10: implement support for GS as NGG

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 540 +- src/amd/vulkan/radv_pipeline.c| 5 +- src/amd/vulkan/radv_private.h | 24 ++ src/amd/vulkan/radv_shader.c | 5 + 4 files changed, 568 insertions(+), 6 deletions(-) diff

[Mesa-dev] [PATCH 3/9] radv/gfx10: Do not allocate a gs_copy_shader on gfx10.

From: Bas Nieuwenhuizen Will use ngg for any gs anyway. Reviewed-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 5 +++-- src/amd/vulkan/radv_pipeline.c | 5 +++-- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan

[Mesa-dev] [PATCH 6/9] radv/gfx10: Do GS prologue outside of gs_threads if.

From: Bas Nieuwenhuizen Mirror radeonsi. Reviewed-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index dc37c937155..490b16a1f25

[Mesa-dev] [PATCH 1/3] radv/gfx10: allocate ESGS ring space for exporting PrimitiveID

Only VS needs that. We shouldn't hardcode these values but that's complicated to not do that for now. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_shader.c | 22 +- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_shader.c b/src/amd

[Mesa-dev] [PATCH 3/3] radv/gfx10: export the PrimitiveID for ES stages (VS or TES)

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 69 --- 1 file changed, 64 insertions(+), 5 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index d40635c6510..c76c259d271 100644 --- a/src/amd

[Mesa-dev] [PATCH 2/3] radv/gfx10: declare an external symbol for the ESGS ring

It will be used for stream output but for now only declares it if VS and if the PrimitiveID needs to be exported. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 25 + 1 file changed, 25 insertions(+) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c

[Mesa-dev] [PATCH 6/6] radv: switch to the new VS exports path

It will help for GS as NGG on GFX10. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 118 +- 1 file changed, 2 insertions(+), 116 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index

[Mesa-dev] [PATCH 5/6] radv: set the slot_index correctly for VARYING_SLOT_CLIP_DIST1

For selecting a different SQ_EXP_POS target. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index ba0fb557266..597d006284a 100644

[Mesa-dev] [PATCH 2/6] radv: use the generic export path for clip/cull distances

When they are exported to the next stage. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index c0ff3210bd2..b83fee304fb

[Mesa-dev] [PATCH 4/6] radv: add a new function for exporting VS outputs

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 128 ++ 1 file changed, 128 insertions(+) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index fc598222fcf..ba0fb557266 100644 --- a/src/amd/vulkan

[Mesa-dev] [PATCH 1/6] radv: remove an extra memcpy when exporting clip/cull distances

Cleanup. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 11 +-- 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index bd14f9fff1b..c0ff3210bd2 100644 --- a/src/amd/vulkan

[Mesa-dev] [PATCH 3/6] radv: implement new path for exporting generic varyings

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 102 -- 1 file changed, 70 insertions(+), 32 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index b83fee304fb..fc598222fcf 100644 --- a/src/amd

[Mesa-dev] [PATCH 2/2] radv: remove extra code for exporting LayerID to the next stage

Now that the output usage mask is set to 0x1 the LayerID is correctly exported in the loop above. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 19 ++- 1 file changed, 2 insertions(+), 17 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b

[Mesa-dev] [PATCH 1/2] radv: set the LayerId output usage mask if FS needs it

When the stage preceding FS doesn't export it the fragment shader might read it, even if it's 0. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_shader_info.c | 17 + 1 file changed, 17 insertions(+) diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan

Re: [Mesa-dev] [PATCH] radv: fix memory leak when restoring from cache

Reviewed-by: Samuel Pitoiset On 7/10/19 6:11 AM, Timothy Arceri wrote: Fixes: 726a31df705b ("radv: Add the concept of radv shader binaries.") --- src/amd/vulkan/radv_pipeline_cache.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/amd/vulkan/radv_pipeline_cache.c b/src/

[Mesa-dev] [PATCH] radv: compute correct number of input vertices for NGG

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 25 - 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 5942e20dafe..96b20c1c730 100644 --- a/src/amd/vulkan

[Mesa-dev] [PATCH 4/6] radv: emit VGT_GS_MAX_VERT_OUT for legacy and NGG paths for GS

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 703dbe54507..ce315da47c3 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd

[Mesa-dev] [PATCH 6/6] radv: set correct number of VGPRs for GS on GFX10

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_shader.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index b6270136643..8298498fbdc 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan

[Mesa-dev] [PATCH 5/6] radv: fix VGT_ESGS_RING_ITEMSIZE for GS as NGG on GFX10

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index ce315da47c3..147d72d146e 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd

[Mesa-dev] [PATCH 1/6] radv: add radv_pipeline_generate_hw_gs() helper

For legacy GS path. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 29 - 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 91ce108ef92..fc09bad5fe1 100644

[Mesa-dev] [PATCH 2/6] radv: keep track of whether NGG is used for GS on GFX10

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 1 + src/amd/vulkan/radv_pipeline.c| 4 +++- src/amd/vulkan/radv_shader.h | 6 ++ 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan

[Mesa-dev] [PATCH 3/6] radv: emit the geometry shader as NGG if enabled on GFX10

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index bb6f877a6ee..703dbe54507 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src

[Mesa-dev] [PATCH 3/4] radv: fix computing the number of ES VGPRS for TES on GFX10

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_shader.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index b6270136643..ec68f51901f 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan

[Mesa-dev] [PATCH 4/4] radv: fix setting VGT_REUSE_OFF for TES on GFX10

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 91ce108ef92..d2002dd904b 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd

[Mesa-dev] [PATCH 2/4] radv: set max workgroup size to 128 for TES as NGG on GFX10

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 9644185f870..67630c4ee92 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src

[Mesa-dev] [PATCH 1/4] radv: fix allocating USER SGPRs on GFX10

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 15 --- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index b72d1aa0023..9644185f870 100644 --- a/src/amd/vulkan

[Mesa-dev] [PATCH] radv: do not emit VGT_FLUSH on GFX10

We don't need it. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_device.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 5a92e5276d9..09614067a4a 100644 --- a/src/amd/vulkan/radv_device.c +++ b

[Mesa-dev] [PATCH v2] radv: add an option for disabling NGG on GFX10

Will be useful for testing the legacy path. v2: add to get_hash_flags() too Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.h| 1 + src/amd/vulkan/radv_device.c | 1 + src/amd/vulkan/radv_pipeline.c | 5 - src/amd/vulkan/radv_private.h | 2 ++ 4 files changed, 8

[Mesa-dev] [PATCH] radv: add an option for disabling NGG on GFX10

Will be useful for testing the legacy path. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.h| 1 + src/amd/vulkan/radv_device.c | 1 + src/amd/vulkan/radv_pipeline.c | 3 ++- 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_debug.h b/src/amd

[Mesa-dev] [PATCH] ac: select the GFX ring when halting waves with UMR on GFX10

GFX10 has two rings, so UMR want to know which one to halt. Select the first one by default. Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_debug.c | 9 ++--- src/amd/common/ac_debug.h | 3 ++- src/amd/vulkan/radv_debug.c | 3 ++- src/gallium

[Mesa-dev] [PATCH 2/2] radv: do not crash when generating binning state for unknown chips

These values are only useful if binning is disabled. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 44 +- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index

[Mesa-dev] [PATCH 1/2] radv: fix potential crash in the compute resolve path

If the destination attachment is UNUSED. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta_resolve_cs.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c b/src/amd/vulkan/radv_meta_resolve_cs.c index 7d3cc166e0d

Re: [Mesa-dev] [PATCH 2/5] radv: add radv_process_depth_image_layer() helper

On 7/3/19 2:58 AM, Bas Nieuwenhuizen wrote: Wouldn't it be much better if we do all the layers in a single draw instead? Probably, but for now it's just a refactoring. On Tue, Jul 2, 2019 at 2:47 PM Samuel Pitoiset wrote: Signed-off-by: Samuel Pitoiset --- src/amd/vulkan

[Mesa-dev] [PATCH 1/5] radv: add radv_get_depth_pipeline() helper

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta_decompress.c | 66 +-- 1 file changed, 41 insertions(+), 25 deletions(-) diff --git a/src/amd/vulkan/radv_meta_decompress.c b/src/amd/vulkan/radv_meta_decompress.c index 578a287d07b..fa5de24314a 100644

[Mesa-dev] [PATCH 3/5] radv: remove set but unused aspect mask during depth layout transitions

The decompress/resummarize pass always use the depth aspect. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index fc8184200fc..322e705621f 100644 --- a/src

[Mesa-dev] [PATCH 4/5] radv: remove unused code in radv_update_tc_compat_zrange_metadata()

--- src/amd/vulkan/radv_cmd_buffer.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 322e705621f..a89d804aa65 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -1534,8 +1534,6 @@

[Mesa-dev] [PATCH 5/5] radv: only allocate a 32-bit value for the TC-compat range metadata

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_image.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index eeccce0d82f..dc598d9eecf 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan

[Mesa-dev] [PATCH 2/5] radv: add radv_process_depth_image_layer() helper

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta_decompress.c | 137 ++ 1 file changed, 74 insertions(+), 63 deletions(-) diff --git a/src/amd/vulkan/radv_meta_decompress.c b/src/amd/vulkan/radv_meta_decompress.c index fa5de24314a..5bb850a0797 100644

[Mesa-dev] [PATCH v2 2/7] ac: compute the DCC fast clear size per slice on GFX8

v2: - add dcc_slice_fast_clear_size to be more confortable about RadeonSI Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_surface.c | 27 +++ src/amd/common/ac_surface.h | 1 + 2 files changed, 28 insertions(+) diff --git a/src/amd/common/ac_surface.c b/src/amd

[Mesa-dev] [PATCH v2 7/7] radv: enable DCC for layers on GFX8

It's currently only enabled if dcc_slice_size is equal to dcc_slice_fast_clear_size because the driver assumes that portions of multiple layers are contiguous but it's not always true. Still not supported on GFX9. v2: - only if dcc_slice_size == dcc_slice_fast_clear_size Signed-off-by: Samuel

[Mesa-dev] [PATCH v2 6/7] radv: do not enable DCC for mipmapped arrays because performance is worse

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_image.c | 4 1 file changed, 4 insertions(+) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 4099c57aa85..07d89d32edf 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -179,6

[Mesa-dev] [PATCH v2 5/7] radv: implement clearing DCC layers on GFX8

v2: - use dcc_slice_fast_clear_size Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 6 -- src/amd/vulkan/radv_meta_clear.c | 5 +++-- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c

[Mesa-dev] [PATCH v2 4/7] radv: merge radv_dcc_clear_level() into radv_clear_dcc()

This will help for clearing DCC arrays because we need to know the subresource range. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta_clear.c | 52 ++-- 1 file changed, 22 insertions(+), 30 deletions(-) diff --git a/src/amd/vulkan/radv_meta_clear.c b/src

[Mesa-dev] [PATCH v2 3/7] radv: add support for decompressing DCC layers with compute

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta_fast_clear.c | 104 +- 1 file changed, 53 insertions(+), 51 deletions(-) diff --git a/src/amd/vulkan/radv_meta_fast_clear.c b/src/amd/vulkan/radv_meta_fast_clear.c index a642d6243d4..d601686f8f6 100644

[Mesa-dev] [PATCH v2 1/7] ac: compute the size of one DCC slice on GFX8

Addrlib doesn't provide this info. Because DCC is linear, at least on GFX8, it's easy to compute the size of one slice. Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_surface.c | 6 ++ src/amd/common/ac_surface.h | 1 + 2 files changed, 7 insertions(+) diff --git a/src/amd/common

Re: [Mesa-dev] [PATCH 2/3] radv: merge radv_dcc_clear_level() into radv_clear_dcc()

On 7/1/19 2:13 PM, Bas Nieuwenhuizen wrote: On Thu, Jun 27, 2019 at 3:02 PM Samuel Pitoiset wrote: This will help for clearing DCC arrays because we need to know the subresource range. How will it help? I don't think we use it in the next commit in the series? It will help for arrays

[Mesa-dev] [PATCH 3/6] radv: add support for decompressing DCC layers with compute

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta_fast_clear.c | 104 +- 1 file changed, 53 insertions(+), 51 deletions(-) diff --git a/src/amd/vulkan/radv_meta_fast_clear.c b/src/amd/vulkan/radv_meta_fast_clear.c index a642d6243d4..d601686f8f6 100644

[Mesa-dev] [PATCH 4/6] radv: implement clearing DCC layers on GFX8

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 3 ++- src/amd/vulkan/radv_meta_clear.c | 6 -- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 1f3fdd1abd0..c79543a3246 100644

[Mesa-dev] [PATCH 6/6] radv: enable DCC for layers on GFX8

Still not supported on GFX9. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_image.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 07d89d32edf..8ac6e63a209 100644 --- a/src/amd/vulkan/radv_image.c

[Mesa-dev] [PATCH 5/6] radv: do not enable DCC for mipmapped arrays because performance is worse

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_image.c | 4 1 file changed, 4 insertions(+) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 4099c57aa85..07d89d32edf 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -179,6

[Mesa-dev] [PATCH 1/6] ac: compute the size of one DCC slice on GFX8

Addrlib doesn't provide this info. Because DCC is linear, at least on GFX8, it's easy to compute the size one slice. Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_surface.c | 6 ++ src/amd/common/ac_surface.h | 1 + 2 files changed, 7 insertions(+) diff --git a/src/amd/common

[Mesa-dev] [PATCH 2/6] ac: compute the DCC fast clear size per slice on GFX8

Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_surface.c | 25 + 1 file changed, 25 insertions(+) diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index 9e45bd44b72..cc4aea5f8d9 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common

[Mesa-dev] [PATCH] radv: only enable VK_AMD_gpu_shader_{half_float, int16} on GFX9+

VK_AMD_gpu_shader_half_float is exposed. Note that AMDVLK only enables these extensions on GFX9+. Cc: 19.1 Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_extensions.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_extensions.py b/src/amd/vulkan

[Mesa-dev] [PATCH 1/3] radv: make sure to mark the image as compressed when clearing DCC levels

Found while working on DCC for arrays. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 22 ++ src/amd/vulkan/radv_meta.h | 3 --- src/amd/vulkan/radv_meta_clear.c | 10 ++ 3 files changed, 8 insertions(+), 27 deletions(-) diff --git

[Mesa-dev] [PATCH 3/3] radv: fix decompressing DCC levels with compute

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta_fast_clear.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_meta_fast_clear.c b/src/amd/vulkan/radv_meta_fast_clear.c index f18f7637593..a642d6243d4 100644 --- a/src/amd/vulkan

[Mesa-dev] [PATCH 2/3] radv: merge radv_dcc_clear_level() into radv_clear_dcc()

This will help for clearing DCC arrays because we need to know the subresource range. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta_clear.c | 52 ++-- 1 file changed, 22 insertions(+), 30 deletions(-) diff --git a/src/amd/vulkan/radv_meta_clear.c b/src

[Mesa-dev] [PATCH] radv: only export clip/cull distances if PS reads them

and Hitman 2. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 13 + src/amd/vulkan/radv_pipeline.c| 4 src/amd/vulkan/radv_shader.h | 2 ++ 3 files changed, 15 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/sr

[Mesa-dev] [PATCH] radv: fix FMASK expand if layerCount is VK_REMAINING_ARRAY_LAYERS

This doesn't fix anything known, but it's likely going to break if layerCount is ~0U. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta_fmask_expand.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_meta_fmask_expand.c b/src/amd/vulkan

[Mesa-dev] [PATCH 3/4] radv: gather if a vertex shaders needs the instance ID

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_shader_info.c | 18 ++ 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c index e771ad79878..dcf8d395374 100644 --- a/src/amd/vulkan

<    1   2   3   4   5   6   7   8   9   10   >