Re: [PEDA] Metric Chart for Speed of a Signal
Jami Are you unemployed ? - Original Message - From: JaMi Smith [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Cc: JaMi Smith [EMAIL PROTECTED] Sent: Monday, January 20, 2003 1:54 PM Subject: Re: [PEDA] Metric Chart for Speed of a Signal And of course for those who think metric . . . Chart for determining the speed of a signal in relationship to the Effective Dielectric Constant of the Material in which the signal is embedded. Metric Version by JaMi Smith Er psec mmdly psecvelocityvelocity eff per mm per psec per mm factorfactor / 1 1.00 3.33560.299792 0. 1. 1. 1.05 3.41800.292567 0.0824 0.9759 1.0247 1.10 3.49840.285841 0.1628 0.9535 1.0488 1.15 3.57710.279558 0.2414 0.9325 1.0724 1.20 3.65400.273672 0.3184 0.9129 1.0954 1.25 3.72940.268143 0.3937 0.8944 1.1180 1.30 3.80320.262935 0.4676 0.8771 1.1402 1.35 3.87570.258020 0.5400 0.8607 1.1619 1.40 3.94680.253371 0.6111 0.8452 1.1832 1.45 4.01660.248964 0.6810 0.8305 1.2042 1.50 4.08530.244780 0.7497 0.8165 1.2247 1.55 4.15280.240799 0.8172 0.8032 1.2450 1.60 4.21930.237007 0.8836 0.7906 1.2649 1.65 4.28470.233388 0.9491 0.7785 1.2845 1.70 4.34910.229930 1.0135 0.7670 1.3038 1.75 4.41260.226622 1.0770 0.7559 1.3229 1.80 4.47520.223452 1.1396 0.7454 1.3416 1.85 4.53700.220412 1.2013 0.7352 1.3601 1.90 4.59790.217492 1.2622 0.7255 1.3784 1.95 4.65800.214686 1.3223 0.7161 1.3964 2.00 4.71730.211985 1.3817 0.7071 1.4142 2.05 4.77590.209384 1.4403 0.6984 1.4318 2.10 4.83380.206876 1.4982 0.6901 1.4491 2.15 4.89100.204457 1.5554 0.6820 1.4663 2.20 4.94760.202120 1.6119 0.6742 1.4832 2.25 5.00350.199862 1.6678 0.6667 1.5000 2.30 5.05870.197677 1.7231 0.6594 1.5166 2.35 5.11340.195563 1.7778 0.6523 1.5330 2.40 5.16760.193515 1.8319 0.6455 1.5492 2.45 5.22110.191530 1.8855 0.6389 1.5652 2.50 5.27410.189605 1.9385 0.6325 1.5811 2.55 5.32660.187737 1.9910 0.6262 1.5969 2.60 5.37860.185923 2.0429 0.6202 1.6125 2.65 5.43000.184161 2.0944 0.6143 1.6279 2.70 5.48100.182448 2.1454 0.6086 1.6432 2.75 5.53150.180782 2.1959 0.6030 1.6583 2.80 5.58160.179160 2.2460 0.5976 1.6733 2.85 5.63120.177582 2.2956 0.5923 1.6882 2.90 5.68040.176044 2.3448 0.5872 1.7029 2.95 5.72920.174546 2.3935 0.5822 1.7176 3.00 5.77750.173085 2.4419 0.5774 1.7321 3.05 5.82540.171661 2.4898 0.5726 1.7464 3.10 5.87300.170271 2.5374 0.5680 1.7607 3.15 5.92020.168914 2.5845 0.5634 1.7748 3.20 5.96700.167589 2.6313 0.5590 1.7889 3.25 6.01340.166295 2.6778 0.5547 1.8028 3.30 6.05950.165030 2.7239 0.5505 1.8166 3.35 6.10520.163794 2.7696 0.5464 1.8303 3.40 6.15060.162585 2.8150 0.5423 1.8439 3.45 6.19570.161403 2.8600 0.5384 1.8574 3.50 6.24040.160246 2.9048 0.5345 1.8708 3.55 6.28480.159113 2.9492 0.5307 1.8841 3.60 6.32890.158004 2.9933 0.5270 1.8974 3.65 6.37270.156919 3.0371 0.5234 1.9105 3.70 6.41620.155855 3.0806 0.5199 1.9235 3.75 6.45940.154812 3.1238 0.5164 1.9365 3.80 6.50240.153790 3.1667 0.5130 1.9494 3.85 6.54500.152788 3.2094 0.5096 1.9621 3.90 6.58740.151806 3.2517 0.5064 1.9748 3.95 6.62950.150842 3.2938 0.5032 1.9875 4.00 6.67130.149896 3.3356 0.5000 2. 4.05 6.71280.148968 3.3772 0.4969 2.0125 4.10 6.75420.148057 3.4185 0.4939 2.0248 4.15 6.79520.147162 3.4596 0.4909 2.0372 4.20 6.83600.146284 3.5004 0.4880
Re: [PEDA] Polygon Filled Planes
Thanks Guys, I would tend to agree about the extra work with multiple big pieces. It really seems to work well if you keep that mechanical layer outline of the big plane for ref. Because by the statement of (1) place the inner pours and fill them. (2) place the outer pour and fill it. This would confirm it for me, I was not really 100% sure I needed to remove the big plane first for editing inner planes or whether it was a problem with my system. But the above 12 would then imply if I need to change one of the small-inner pours I really do need to delete the outer first then fix inner and fill it, then replace outer and fill it. Usually the outer is an easy shape to recreate so this should be less work than dealing with multiple planes to fix one small inner plane. If the big one is gone while editing the inners ones it does seem to work very well. Thanks Bob Wolfe * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Gerber Import / Viewing in P99SE
OK, this may be a silly question... but how about using that free copy of Camtastic that came with P99SE to view the Gerbers? The 'auto load' works with just about everything I've thrown at it so far. Regards, Andy Gulliver -Original Message- From: Terry Creer [mailto:[EMAIL PROTECTED]] Sent: 21 January 2003 05:48 To: 'Protel EDA Forum' Subject: Re: [PEDA] Gerber Import / Viewing in P99SE Thanks for responding Brad and Ian, I'm not sure what application the Gerbers were generated in (they came from our PCB manufacturer), but I guess you guys are right then. Ian - I would appreciate that Macro, if you don't mind :) [EMAIL PROTECTED] Thanks very much! -Original Message- From: Ian Capps [mailto:[EMAIL PROTECTED]] Sent: Tuesday, 21 January 2003 4:02 PM To: Protel EDA Forum Subject: Re: [PEDA] Gerber Import / Viewing in P99SE Terry As Brad as said in his reply the gerbers need to be generated from protel in the first place to be directly importable. For some gerber files you can get away with changing the header and for others it takes a bit more fuddling around. I have a word macro that I have used in the past. It's very clunky but has worked every time if you want it let me know. Ian Capps [cut] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Gerber Import / Viewing in P99SE
Andy, I believe you can surmise from various details of Terry's comments, he is loading some fabricator's Gerbers into Protel to create a new database. So he wants the Gerber in Protel to form his traces or to act as a template layer for his routing and generation of a new database. Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. Microwave Products Tel (604) 292-9089 (direct line) Fax (604) 292-9010 email: [EMAIL PROTECTED] http://www.norsat.com -Original Message- From: Andy Gulliver [mailto:[EMAIL PROTECTED]] Sent: Tuesday, January 21, 2003 9:31 AM To: Protel EDA Forum Subject: Re: [PEDA] Gerber Import / Viewing in P99SE OK, this may be a silly question... but how about using that free copy of Camtastic that came with P99SE to view the Gerbers? The 'auto load' works with just about everything I've thrown at it so far. Regards, Andy Gulliver * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Polygon Filled Planes
Abd, Please see below, JaMi - Original Message - From: Abd ul-Rahman Lomax [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Monday, January 20, 2003 3:13 PM Subject: Re: [PEDA] Polygon Filled Planes At 03:31 PM 1/20/2003, JaMi Smith wrote: Respecting your having one larger Polygon Plane over several smaller ones, I am assuming that you are speaking of the case where the smaller ones are of a different net. If this is the case, you would then be relying on Protel to not flood over the smaller Polygon Planes simply be virtue of the net being different. While this may in fact work, I myself would not rely on it, and would not trust Protel to handle it properly in all cases, and would try to work around the problem in a different manner. The method is reliable. Remember, if Protel were to pour incorrectly, it would create error reports. Polygon pours are checked as if they were what they are: a pile of individual lines. I am not quite sure that I want to buy into the reliability just yet. Protel has been known to do some pretty strange things at some pretty strange times, and for me, reliability must be demonstrated. And speaking of Protel reliability, I am not quite sure what exactly Bob ment in his earlier post respecting an exception error about a .dll with respect to pcb which he thought was related to the Polygon Plane, and which apparently no one has really addressed, and just where that plugs into the who issue of Polygon Planes and reliability. I use large Polygons as fills on signal layers on most of the high speed things that I do (usually connected to ground or a supply), and aside from them bringing Protel to its knees speed-wise, reliability-wise they seem to be responsible for a large number of the crashes that I have had with Protel, and hence I am very careful with them, and take my time placing them. I find that if I take my time here, that I do not have to come back and change them or redo them. What I have been successful in doing in the past, and more importantly what I feel comfortable and confident about doing, is simply this: [...] While it takes a little more work to do it this way, I never have to rely on Protel to understand what I really want it to do, and there is no chance for error. The method which Mr. Smith describes seems to me to be a *lot* more work. The previously given method I will repeat: (1) place the inner pours and fill them. (2) place the outer pour and fill it. Yes they do take more time this way, but we are only talking a few minutes more for each large Polygon, and if you can't spend a few extra minutes on doing something carefully, then you must not put too much care into your boards. One of the benefits that I forgot to mention about doing it this way, is that you have complete control over your gaps in between Polygon Plane segments, which allows you do handle different areas differently if you so desire. This method also prevents minor catastrophes which might happen if I accidently deleted or renamed an inner Polygon Plane segment and then repoured an outer Polygon Plane Segment. The catastrophe is truly minor. If one is truly concerned about a pour being accidentally changed (remember, DRC will still detect shorts and opens), one can simply reduce the pour to primitives. (Tools/Convert/etc.). And fixing it can take more time than it would have taken to do it the other way to begin with. So how much time did you really save or lose? Isn't the time issue really minor here anyway? What if that catastrophe happens to the next guy who works on the board, and he doesn't understand it? In short, you can draw larger Polygon Planes in smaller overlapping segments, providing that they have the same net, and it is actually preferable to have some overlap to prevent a gap in the gerbers, but it is not advisable to overlap Polygon Planes which are not intended to be the same net. Well, it doesn't hurt for there to be an overlap, certainly, but if one is designing on-grid using consistent units such that round-off doesn't bite you, it isn't necessary. (i.e., if one uses, say, a 1 mil grid for primitive placements and uses imperial units for gerber generation and the line widths are in mils, no overlap is necessary, the films will fill completely with zero gap; in fact, we recommend setting grid to 0 for polygon pours, which informs the pour routines to place track at zero clearance. Is this the Lomax Virtual Short now applied to Polygons? I overlap simply because I have had Protel bite me on this one in the past, and have actually had a very narrow little gap of about 0.010 and about 0.200 long, show up between two adjoining segments in a small finished board, which fortunately was not related to functionality, although it looked like s***. I tried to find a reason for it in the Protel database and in the gerbers, all of which said it shouldn't have happened, but rather I
Re: [PEDA] Polygon Filled Planes
Bob, Please see below, JaMi - Original Message - From: Robert M. Wolfe [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Tuesday, January 21, 2003 6:22 AM Subject: Re: [PEDA] Polygon Filled Planes . . . This would confirm it for me, I was not really 100% sure I needed to remove the big plane first for editing inner planes or whether it was a problem with my system. But the above 12 would then imply if I need to change one of the small-inner pours I really do need to delete the outer first then fix inner and fill it, then replace outer and fill it. Usually the outer is an easy shape to recreate so this should be less work than dealing with multiple planes to fix one small inner plane. If the big one is gone while editing the inners ones it does seem to work very well. Respecting whether or not you need to delete or move a big plane or outer plane so that you can work on some area, either an inner plane in your case, or simply some traces or component placements or something similar, I have found the following little trick very effective. Notwithstanding that there is a plow through planes option somewhere, when I am working with a Polygon Plane on a signal layer, and I temporarily need some space around the area that I am working so that I can move or add something, or do some other editing, I simply select a track segment of some different net than the Polygon that is in the area on the same layer, and temporarily change its width to gargantuian, say 500 mils or 1000 mils. I then repour the large Polygon, which will now repour around the large track segment. I then go back and reset the track segment to it's original size, and this gives me a large open hole in the middle of the Polygon Plane where I can now work unobstructed. When I am all done, I do a final repour of the original Polygon which will now fill in around the area that I was working in. While this may sound like a lot of work or steps, it really isn't, and it opens up the Polygon so that I can work on it where I need to, and also see things on other layers that woulf otherwise be obscured, and it should also work well for your situation of a small inner Polygon Plane also. Hope this is of help, JaMi * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] perforation
Hi all I'm curently designing a panelisied pcb. The panel is not the problem, but the break-away-tabs (or however they are called) I've created following thing: http://www.ihe.ch/temp/nutzen.pcb The large pads indicates the start/end points of the router bit. Is the perforation to strong / to weak / exactly right? How wide should the border be? This is a 1.5mm FR4 two sided mixed smd/th board. The break excess should be less than 0.5mm Any comments? TIA Edi Im Hof + IH electronic+ Phone: ++41 52 320 90 00 + + Edi Im Hof + Fax: ++41 52 320 90 04 + + Doernlerstrasse 1, Sulz + URL: http://www.ihe.ch + + CH-8544 Rickenbach-Attikon + E-Mail: [EMAIL PROTECTED] + + Switzerland + + * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] perforation
Edi, here are a couple of suggestions that I could make. 1) I would reduce your perforations to 4 drill hits evenly spaced per tab. 2) You mention it is mixed SMT and Thru hole. Is it to be wave soldered? Wave soldering severely weakens the tabs while the board is hot and the boards may submarine in the wave if the panellized boards droop too much. IS there a chance for a board carrier if you are wave soldering the Thruhole parts. 3) I would align the top and bottom tabs vertically. Then if you do not have an issue with wave soldering, the board can be packed nearly edge to edge with a single router pass between two rows of boards (a number of additional boards per panel, greater efficiency (no frame between boards) and reduced cost per board). 4) Border? At the edge of the panel or around each PCB? At the edge of the panel it is up to the PCB fabricator. Most fabricators are fine with 1 panel edges, some may allow you to go down to 1/2. Around each PCB it is an assembly issue. Again it partially goes back to are you wave soldering. If you are wave soldering you will want more frame to support the boards when the panel is heated. If you aren't wave soldering, can you put the boards nearly edge to edge with no frame, just tabs between them. You should check with the assembly house for other assembly issues particular to your assembly. Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. Microwave Products Tel (604) 292-9089 (direct line) Fax (604) 292-9010 email: [EMAIL PROTECTED] http://www.norsat.com -Original Message- From: Edi Im Hof [mailto:[EMAIL PROTECTED]] Sent: Tuesday, January 21, 2003 1:04 PM To: Protel EDA Forum Subject: [PEDA] perforation Hi all I'm curently designing a panelisied pcb. The panel is not the problem, but the break-away-tabs (or however they are called) I've created following thing: http://www.ihe.ch/temp/nutzen.pcb The large pads indicates the start/end points of the router bit. Is the perforation to strong / to weak / exactly right? How wide should the border be? This is a 1.5mm FR4 two sided mixed smd/th board. The break excess should be less than 0.5mm Any comments? TIA Edi Im Hof * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] perforation
Let the manufacture panelize and or creat the breakaways them for you. -Original Message- From: Edi Im Hof [mailto:[EMAIL PROTECTED]] Sent: Tuesday, January 21, 2003 3:04 PM To: Protel EDA Forum Subject: [PEDA] perforation Hi all I'm curently designing a panelisied pcb. The panel is not the problem, but the break-away-tabs (or however they are called) I've created following thing: http://www.ihe.ch/temp/nutzen.pcb The large pads indicates the start/end points of the router bit. Is the perforation to strong / to weak / exactly right? How wide should the border be? This is a 1.5mm FR4 two sided mixed smd/th board. The break excess should be less than 0.5mm Any comments? TIA Edi Im Hof + IH electronic+ Phone: ++41 52 320 90 00 + + Edi Im Hof + Fax: ++41 52 320 90 04 + + Doernlerstrasse 1, Sulz + URL: http://www.ihe.ch + + CH-8544 Rickenbach-Attikon + E-Mail: [EMAIL PROTECTED] + + Switzerland + + * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Polygon Filled Planes
JaMi wrote And speaking of Protel reliability, I am not quite sure what exactly Bob ment in his earlier post respecting an exception error about a .dll with respect to pcb which he thought was related to the Polygon Plane, and which apparently no one has really addressed, and just where that plugs into the who issue of Polygon Planes and reliability. Well Guys, I am still getting that error on this one design. It is an exception error and a .dll is mentioned. Can't actually say whether it is related to the polygon filled plane. But whenever there is an attempt to rebuild the large one this error shows up. It can be ignored or close the application. I can capture the exact text of the error tomorrow as I do not have that design home at this time. I was just trying to see if I was missing a step that needed to be done, or if there might be other issues at play. I will try to spend a bit more time with that design tomorrow to possibly shed some more light on this error. It cropped up again because the footprints needed to be unlocked to take care of assembly drawing, an dwhen that is done it wants to rebuild check everything so the error comes back. Thanks Bob * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
