Re: [PEDA] 0 Gap Means Touch or Not?
I concur that DRC should assure minimum widths are attained. Further, I believe DRC should detect angles less than 45 degrees, and also trace ends incompletely buried in pads, vias pours, etc. However, it is best to learn to use the tools in such a way that you always end on centers. Employing marginal methods (even though they work most of the time) will eventually result in getting bit. Jeff Condit - Original Message - From: Abd ulRahman Lomax [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Friday, May 14, 2004 5:58 AM Subject: Re: [PEDA] 0 Gap Means Touch or Not? At 11:33 PM 5/13/2004, [EMAIL PROTECTED] wrote: In theory, A 0 gap between two entites should be regard as connected, but it is very critical, especially in the tangent condition (Line to circle or arc, and so on), I think regard it as open is more reasonable. It should actually be caught by the width rule. Yes, there is a connection. Whether on the real PCB there is a connection or not could be difficult to predict. If the board is over-etched, the connection may be lost, if it is underetched, it might remain. But the fact is that the connection does not meet the minimum width rule for the net. And I suspect that there are some other ways that minimum width could be violated that may not be checked. I've never tried it: what if a long thin fill was used to make a connection. Is the width of the fill checked? This report, while not surprising, does point out a DRC deficiency. One may set a rule that the minimum *track* width is 10 mils, and it is easy to assume that the minimum *connection* width will therefore be 10 mils. It's not the case. Connection width is not measured in 99SE, as far as I know. Connections on inner planes can be below 10 mils; in fact, connections can be broken on inner planes due to overlap of the clearance flashes. And connection width is not measured in the case described, and possibly in some others, I haven't checked. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 0 Gap Means Touch or Not?
At 11:33 PM 5/13/2004, [EMAIL PROTECTED] wrote: In theory, A 0 gap between two entites should be regard as connected, but it is very critical, especially in the tangent condition (Line to circle or arc, and so on), I think regard it as open is more reasonable. It should actually be caught by the width rule. Yes, there is a connection. Whether on the real PCB there is a connection or not could be difficult to predict. If the board is over-etched, the connection may be lost, if it is underetched, it might remain. But the fact is that the connection does not meet the minimum width rule for the net. And I suspect that there are some other ways that minimum width could be violated that may not be checked. I've never tried it: what if a long thin fill was used to make a connection. Is the width of the fill checked? This report, while not surprising, does point out a DRC deficiency. One may set a rule that the minimum *track* width is 10 mils, and it is easy to assume that the minimum *connection* width will therefore be 10 mils. It's not the case. Connection width is not measured in 99SE, as far as I know. Connections on inner planes can be below 10 mils; in fact, connections can be broken on inner planes due to overlap of the clearance flashes. And connection width is not measured in the case described, and possibly in some others, I haven't checked. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 0 Gap Means Touch or Not?
Luo, Were the track and via meant to be connected? If so, then the gerber files must have been adjusted during the manufacturing. Im not sure if im reading the problem right. jjg -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] Sent: Thursday, 13 May 2004 1:12 PM To: [EMAIL PROTECTED] Subject: [PEDA] 0 Gap Means Touch or Not? Dear Members, P99SE, The gap between a track and a via is exact 0, DRC does not show this issue, obviously, It consider the track and the via is connected. Verify the gerber with IPC-D-356A netlist, also does not find this issue, But on the finish board, the track and the via is broken. So I got a question as topic, Does anyone have a good idea to find this problem, except much more carefulness during design. Thanks. Best Regards, Luo. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 0 Gap Means Touch or Not?
On 09:04 AM 14/05/2004, John Girvan said: Luo, Were the track and via meant to be connected? If so, then the gerber files must have been adjusted during the manufacturing. Im not sure if im reading the problem right. I think that the problem is something like: 1) the track and via should have been touching 2) the track end was just touching the via sufficiently to keep DRC happy 3) etching tolerances or mechanical stress broke the connection on the manufactured PCB There is no check I know that ensures a certain minimum copper width connection to a via, nor is there a check that connections are routed to the centre of a pad. I am not sure whether CAM checking (in Camtatstic) would be better able to check a marginal connection like this - maybe. Ian * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 0 Gap Means Touch or Not?
I think the gap between entities suggests the gap between edge features on each entity, not between centers. While the entities MAY be touching within the virtual world, etch-back at the real-world board-house may mean that what you thought was an electrical connection becomes an open circuit. -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] Sent: Wednesday, May 12, 2004 11:12 PM To: [EMAIL PROTECTED] Subject: [PEDA] 0 Gap Means Touch or Not? Dear Members, P99SE, The gap between a track and a via is exact 0, DRC does not show this issue, obviously, It consider the track and the via is connected. Verify the gerber with IPC-D-356A netlist, also does not find this issue, But on the finish board, the track and the via is broken. So I got a question as topic, Does anyone have a good idea to find this problem, except much more carefulness during design. Thanks. Best Regards, Luo. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 0 Gap Means Touch or Not?
Some comments about this. There really isn't a minimum copper DRC. There should be, it would not be terribly difficult. But there isn't. The problem situation, I read the same as Ian. A track was retracted from a via so that it terminated outside the via, but in contact with the via. This is enough to satisfy DRC. Normally, a situation like this would be caught by a good fabricator, it is visible as a likely error. As to how to design to avoid the situation, I've *never* seen this situation in Protel. I recall having it once in Tango, which, if you plotted holes, would retract track so that the holes would remain clear, thus creating a problem situation under some circumstances. Why haven't I seen the situation? Because if you use the normal routing tools, track will always terminate at via center, you have to turn off some options that should best be left on, or make a direct edit, say, to move a via, or something like that, in order to create the situation described. For example, with proper option settings, if you pick up a via, it will carry the track end(s) with it. I think, also, that if you lock all the tracks and run an autorouter pass, it will still rip up and reroute any situations where a track does not terminate on pad center That might possibly be useful if you've been designing in ways that can create this situation * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 0 Gap Means Touch or Not?
what you thought was an electrical connection becomes an open circuit Yes, this is my problem. Recently, I found an error in a design, a Track and a via with same net is tangent, It is connected in the virtual world but at the real world is broken, So I think, In theory, A 0 gap between two entites should be regard as connected, but it is very critical, especially in the tangent condition (Line to circle or arc, and so on), I think regard it as open is more reasonable. -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] Sent: Thursday, May 13, 2004 8:21 PM To: [EMAIL PROTECTED] Subject: Re: [PEDA] 0 Gap Means Touch or Not? I think the gap between entities suggests the gap between edge features on each entity, not between centers. While the entities MAY be touching within the virtual world, etch-back at the real-world board-house may mean that what you thought was an electrical connection becomes an open circuit. -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] Sent: Wednesday, May 12, 2004 11:12 PM To: [EMAIL PROTECTED] Subject: [PEDA] 0 Gap Means Touch or Not? Dear Members, P99SE, The gap between a track and a via is exact 0, DRC does not show this issue, obviously, It consider the track and the via is connected. Verify the gerber with IPC-D-356A netlist, also does not find this issue, But on the finish board, the track and the via is broken. So I got a question as topic, Does anyone have a good idea to find this problem, except much more carefulness during design. Thanks. Best Regards, Luo. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] 0 Gap Means Touch or Not?
Dear Members, P99SE, The gap between a track and a via is exact 0, DRC does not show this issue, obviously, It consider the track and the via is connected. Verify the gerber with IPC-D-356A netlist, also does not find this issue, But on the finish board, the track and the via is broken. So I got a question as topic, Does anyone have a good idea to find this problem, except much more carefulness during design. Thanks. Best Regards, Luo. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
