When simulating the Wenzel divider its important to include the input
protection diodes or the input signal at the D input of the FF becomes
unrealistically large even with a finite Q inductor.
Bruce
> On 03 July 2020 at 20:18 glenlist wrote:
>
>
> Bravo Microchip for extending the ECL
You might also look at the IGLOO nano from Actel (now microsemi). Low
power, small package, 250MHz, as few as 100 logic elements. Unfortunately
Microsemi. -- mike
On Fri, Jul 3, 2020 at 7:44 AM Hal Murray wrote:
>
> jim...@earthlink.net said:
> > 1) All those clever handbook designs and data
jim...@earthlink.net said:
> 1) All those clever handbook designs and data sheets that I grew up with in
> the 70s,80s, and 90s are just the ticket, but you can't actually get the SSI
> MSI parts any more.
Are families like AC OK to your Reliability people? Any projections on how
long they
Jim,
At the risk of knocking over another bucket of worms, if your definition
of "low power" can be extended to just beating the needs of the current
part (circa 1W?), then you can look at ECL and its more modern
derivatives, which are quite extensive. The classic bi-quinary ECL
counter is
For fixed frequency operation there's always Wenzel's divider using a D FF with
LC feedback:
http://www.wenzel.com/wp-content/uploads/dividers.pdf
At least the power consumption is low.
Bruce
> On 03 July 2020 at 12:35 Bob kb8tq wrote:
>
>
> Hi
>
> > On Jul 2, 2020, at 6:38 PM, jimlux
Hi
> On Jul 2, 2020, at 6:38 PM, jimlux wrote:
>
> On 7/2/20 2:50 PM, Bob kb8tq wrote:
>> Hi
>>> On Jul 2, 2020, at 5:30 PM, jimlux wrote:
>>>
>>> On 7/2/20 11:37 AM, ed breya wrote:
It's been fun reminiscing about all these dividers and techniques, but
getting back to the OP, the
On 7/2/20 2:50 PM, Bob kb8tq wrote:
Hi
On Jul 2, 2020, at 5:30 PM, jimlux wrote:
On 7/2/20 11:37 AM, ed breya wrote:
It's been fun reminiscing about all these dividers and techniques, but getting back to
the OP, the original search was for a divide by 5 with "low power" and
operation from
On 7/2/20 2:13 PM, Peter McCollum wrote:
Another way to achieve divide-by-N is with a non-retriggerable one-shot,
adjusted to the appropriate time value.
Back in the 40's/50's, the common tube circuit was called a Phantastron
(really, look it up!).
Phantastron dividers were used in several of
Hi
> On Jul 2, 2020, at 5:30 PM, jimlux wrote:
>
> On 7/2/20 11:37 AM, ed breya wrote:
>> It's been fun reminiscing about all these dividers and techniques, but
>> getting back to the OP, the original search was for a divide by 5 with "low
>> power" and operation from 5 to possibly 3.3V, and
On 7/2/20 11:37 AM, ed breya wrote:
It's been fun reminiscing about all these dividers and techniques, but
getting back to the OP, the original search was for a divide by 5 with
"low power" and operation from 5 to possibly 3.3V, and clocking properly
at 50 MHz. One would assume also minimal
Another way to achieve divide-by-N is with a non-retriggerable one-shot,
adjusted to the appropriate time value.
Back in the 40's/50's, the common tube circuit was called a Phantastron
(really, look it up!).
Phantastron dividers were used in several of the early HP counters (i.e.
HP524B), because
Hi
> On Jul 2, 2020, at 2:34 PM, Hal Murray wrote:
>
>
>> Funny, just yesterday I was looking at the design of a laboratory cesium
>> beam standard from 1963. Sorry, there's no divide-by-5 example in there. But
>> the attached images show the 108x multiplier (8.5 MHz to 9180 MHz). Sure
>>
> Funny, just yesterday I was looking at the design of a laboratory cesium
> beam standard from 1963. Sorry, there's no divide-by-5 example in there. But
> the attached images show the 108x multiplier (8.5 MHz to 9180 MHz). Sure
> enough, spot the 12AX7 and 6J6 tubes in use...
Neat. Thanks.
On Thu, 2 Jul 2020 19:23:03 +0200, you wrote:
>Makes me think one could use the input signal edge to synchronize a 2N6027
>based programmable unijunction oscillator, thus effecting a divide by 5.
>Unlikely the 6027 would be fast enough for 50 MHz, but maybe a 2 transistor
>equivalent using RF
On 7/2/20 6:48 AM, Tom Van Baak wrote:
> I'm surprised nobody has suggested using the 12AX7 or 6J6 dual triodes.
Jim,
Funny, just yesterday I was looking at the design of a laboratory cesium
beam standard from 1963. Sorry, there's no divide-by-5 example in there.
But the attached images
It's been fun reminiscing about all these dividers and techniques, but
getting back to the OP, the original search was for a divide by 5 with
"low power" and operation from 5 to possibly 3.3V, and clocking properly
at 50 MHz. One would assume also minimal size and complexity, and low cost.
%-60%
range, though. Might just have to build one for fun.
> Sent: Thursday, July 02, 2020 at 8:37 AM
> From: "jimlux"
> To: time-nuts@lists.febo.com
> Subject: Re: [time-nuts] low power divide by 5
...
> I'm surprised nobody has suggested using the
The sum of propagation delay (~15 ns) and setup time (~5 ns)
in the 74AC161 gives just enough time to operate at 50 MHz,
based on the data sheet. Of course, at room temp, the chip
will beat the data sheet by an undetermined margin.
The fact that the clock frequency is specified at 103 MHz
That's a very early use of "MHz" rather than "Mc"!
On Jul 2, 2020, 9:50 AM, at 9:50 AM, Tom Van Baak wrote:
>> I'm surprised nobody has suggested using the 12AX7 or 6J6 dual
>triodes.
>
>Jim,
>
>Funny, just yesterday I was looking at the design of a laboratory
>cesium
>beam standard from 1963.
Hi
For vacuum tube divide by 5 / 10 circuits, take a look at the schematics of the
Beckman EPUT meters…..
Bob
> On Jul 2, 2020, at 9:48 AM, Tom Van Baak wrote:
>
> > I'm surprised nobody has suggested using the 12AX7 or 6J6 dual triodes.
>
> Jim,
>
> Funny, just yesterday I was looking at
161 and 163 are candidates. Back in the early 70's my favorite for my counter
work was the 74S112 dual JK. So I went to DigiKey to check on CD74AC112 they
have in stock so with two of those along with an AND gate you can make as many
divide as 5 as you need. Just like the S112 it clocks over
On 7/1/20 11:21 PM, Gerhard Hoffmann wrote:
Am 02.07.20 um 00:35 schrieb jimlux:
On 7/1/20 1:41 PM, ed breya wrote:
Yeah, I know. I was just lamenting the lack of nice medium-density
count functions in 74AC. It's hard to beat the simplicity of a '390
when you
16 bore holes just to deploy
treff: Re: [time-nuts] low power divide by 5
Gesendet von: "time-nuts"
Take a look at the "modified" shift-register like counter in the attached
jpg file. When simulated online it behaved as expected for a divide by 5.
I believe it also is self-clearing from illega
Am 02.07.20 um 00:35 schrieb jimlux:
On 7/1/20 1:41 PM, ed breya wrote:
Yeah, I know. I was just lamenting the lack of nice medium-density
count functions in 74AC. It's hard to beat the simplicity of a '390
when you
16 bore holes just to deploy 4 flip flops is not what I'd call
On 7/1/20 1:41 PM, ed breya wrote:
Yeah, I know. I was just lamenting the lack of nice medium-density count
functions in 74AC. It's hard to beat the simplicity of a '390 when you
Anyway, I've always liked having a wide assortment of MSI logic devices
available in all families, that you
I designed a marine radio in 1976 that used 74LS161's.
They could do something like 15 MHz on a good day
at room temperature. I did a lot of characterization
on them. 100 MHz? In your dreams...
BTW, if you want to divide by ten in the LS family,
the 74LS160 is a better choice, because it will
There was once upon the time a very good data/application-book from
Fairchild for TTL logic, they published many different modulo frequency
dividers with 50% duty-cycle for the "9316" which is the functional
equivalent grandfather for 74161 and therefore for the AC161 to.
For frequency
>When I was looking for a 100 MHz divide by 10 in a dip package I was
advised by someone on the list to use the 74LS161.
It's available on Ebay on ebay from several sources for reasonable
prices.
74LS161 won't go that fast - 20-25 MHz is max.
Pete
On Wed, Jul 1, 2020 at 2:46 PM Perry Sandeen
Tom wrote:
"Ed, For division, there's less need for a dedicated divide-by-10
counter since the '161 and '163 are *presettable* synchronous binary
counters. As such you can wire them to divide by anything from 2 to 16,
which includes 10. In addition they are *cascadable*, which means that
you
Learned List
When I was looking for a 100 MHz divide by 10 in a dip package I was advised by
someone on the list to use the 74LS161.
It's available on Ebay on ebay from several sources for reasonable prices.
Regards,
Perrier
___
time-nuts mailing
On 7/1/20 5:24 AM, Detlef Schuecker via time-nuts wrote:
Hi,
there are three JK-FF, with Q1 as MSB, Q3 as LSB. J1,K1 ist input to Q1,
etc. .
There are 8^6 possibilties (6 inputs to the Qx or QxNOT or to HIGH or to
LOW) of which
2069 generate a cycle length of 5.
The following wiring will
: 4
Date: Wed, 1 Jul 2020 00:47:32 +0200
From: dschuecker
To:time-nuts@lists.febo.com
Subject: Re: [time-nuts] low power divide by 5
Message-ID:
Content-Type: text/plain; charset=utf-8; format=flowed
Hi,
a divide by five should possible with a synchronous state-machine made
of 3 ( sufficiently fast
Hi,
there are three JK-FF, with Q1 as MSB, Q3 as LSB. J1,K1 ist input to Q1,
etc. .
There are 8^6 possibilties (6 inputs to the Qx or QxNOT or to HIGH or to
LOW) of which
2069 generate a cycle length of 5.
The following wiring will generate the cycle 1 3 5 2 4 :
J1=Q2
K1=Q1
J2=Q3
K2=Q2
hm,
first example of divide by 5 needs an additional AND, second example
gets stuck in an unused state :(
Cheers
Detlef
Am 01.07.2020 um 02:14 schrieb David:
Here's a web page with several JK flip-flop dividers, including divide
by 5:
Am 01.07.20 um 03:04 schrieb Hal Murray:
What logic family might be appropriate for a divide by 5 from 50 to 10MHz,
low power, running off 3.3 or 5V?
How important is the "low" power? Do you have other logic/CPU around?
Do you need 50/50 duty cycle (or close) or is 20/80 OK?
How about a CPU
m illegal states, but the other
> simulator I tested that in wasn't good for documenting the design.
>
> Bob L.
>
> > Sent: Tuesday, June 30, 2020 at 6:47 PM
> > From: "dschuecker"
> > To: time-nuts@lists.febo.com
> > Subject: Re: [time-nuts] low power divide
gn.
Bob L.
> Sent: Tuesday, June 30, 2020 at 6:47 PM
> From: "dschuecker"
> To: time-nuts@lists.febo.com
> Subject: Re: [time-nuts] low power divide by 5
>
> Hi,
>
> a divide by five should possible with a synchronous state-machine made
> of 3 ( sufficiently
On 6/30/20 5:04 PM, Richard (Rick) Karlquist wrote:
On 6/30/2020 3:47 PM, dschuecker wrote:
Hi,
a divide by five should possible with a synchronous state-machine made
of 3 ( sufficiently fast-) JK-FlipFlops.
All 3 FFs are clocked with the input freq. , the outputs of the FFs
are fed back
> What logic family might be appropriate for a divide by 5 from 50 to 10MHz,
> low power, running off 3.3 or 5V?
How important is the "low" power? Do you have other logic/CPU around?
Do you need 50/50 duty cycle (or close) or is 20/80 OK?
How about a CPU with a counter/timer block setup to
On 6/30/2020 3:47 PM, dschuecker wrote:
Hi,
a divide by five should possible with a synchronous state-machine made
of 3 ( sufficiently fast-) JK-FlipFlops.
All 3 FFs are clocked with the input freq. , the outputs of the FFs are
fed back to the the JK-inputs, the divided freq. is output of
Here's a web page with several JK flip-flop dividers, including divide
by 5:
http://www.play-hookey.com/digital/counters/frequency_dividers.html
Dave
On 2020-06-30 15:47, dschuecker wrote:
> Hi,
>
> a divide by five should possible with a synchronous state-machine made of 3 (
>
Hi,
a divide by five should possible with a synchronous state-machine made
of 3 ( sufficiently fast-) JK-FlipFlops.
All 3 FFs are clocked with the input freq. , the outputs of the FFs are
fed back to the the JK-inputs, the divided freq. is output of one of
the FFs.
Additional
> You might try the 74AC161, which works to 73MHz at 3.3V or 103 MHz at 5V, -40
> to 85C.
> Set the data inputs to DCBA = 1011 and connect an inverter from the carry
> output (pin 15) to the Load input (pin 9) to divide by 5. See http://
> www.techlib.com/electronics/74161Divider.htm
You
To divide by 5 with a '161/'163 counter, connect
the 8's bit output to the /preset enable input.
Then set the input bits to 12. The counter will
count: 12, 13, 14, 15, 0, 12, 13, 14, 15, 0 ...
This is the fastest configuration. It avoids
external gate delay and the slower carry output.
You can
Am 29.06.20 um 18:43 schrieb jimlux:
What logic family might be appropriate for a divide by 5 from 50 to
10MHz, low power, running off 3.3 or 5V?
In the picture is probably what you need, and maybe more.
The left third is a comparator that generates valid CMOS levels from a
vaguely defined
Looks like the AC161 and AC163 are readily available, so they may be
rigged for divide 5. It seems that of the counters surviving into AC,
only binary ones are included, and the oddballs like decade are
considered unnecessary - apparently nobody divides by 10 anymore, except
inside of a
Well, data sheets are out there, but I don't know about the actual
parts. Unfortunately, the 74AC family has far fewer members than the
74HC and others. I think each step in the evolution loses some types
that aren't expected to be high enough in volume for the most modern
applications. For
I just looked around for some AC390s - it appears they may have been
made only by Toshiba and Hitachi, and have gone obsolete. Looks like you
can't just call Mouser to order some up. But, looking at this site, it
appears that a lot exist - at least a million pieces floating around out
there,
You might try the 74AC161, which works to 73MHz at 3.3V or 103 MHz at 5V,
-40 to 85C.
Set the data inputs to DCBA = 1011 and connect an inverter from the carry
output (pin 15) to the Load input (pin 9) to divide by 5. See
http://www.techlib.com/electronics/74161Divider.htm
On Mon, Jun 29, 2020
On 6/29/20 10:41 AM, ed breya wrote:
74AC logic would do it just fine, but needs 5V nominal for full-speed
specs. Lower supply voltage should work, but probably not all the way
down to 3.3V with 50 MHz clocking. The spec sheets should indicate the
possible range.
The 74AC390 can provide
I just looked at the 74AC390 sheet - it does say it will run to 60 MHz
clocking with 3.3V supply, but that's at 25 deg C Tj. So, it looks
doable, but depends on your desired operating temperature range.
Ed
___
time-nuts mailing list --
74AC logic would do it just fine, but needs 5V nominal for full-speed
specs. Lower supply voltage should work, but probably not all the way
down to 3.3V with 50 MHz clocking. The spec sheets should indicate the
possible range.
The 74AC390 can provide divide by 5 directly, with another divide
What logic family might be appropriate for a divide by 5 from 50 to
10MHz, low power, running off 3.3 or 5V?
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