There is a legacy Ettus E100 github repo that may or may not be useful:
https://github.com/EttusResearch/ettus_oe
This product has been EOL for >5 years, so as Philip points out, the
institutional memory of it is basically non-existent.
On Mon, Nov 23, 2020 at 5:22 AM Sébastien DI MERCURIO via US
The X310 does not support White Rabbit or IEEE 1588.
The N310/N320 have only been validated using a White Rabbit Master such as
this one: https://sevensols.es/index.php/index/timing-products/wr-len/
A simple PTP Master will almost certainly not work with the WR FPGA
bitstream.
On Thu, Oct 29, 20
This branch will allow you to build UHD 4.0.0 from source on Ubuntu 20.04:
https://github.com/EttusResearch/uhd/tree/atrnati/ubuntu-20.04-workaround
You could also try disabling the GPSDO if you don't need it with the cmake
argument *-DENABLE_GPSD=OFF*
On Thu, Oct 29, 2020 at 5:21 AM Baroch Or
When a group of former Ettus engineers who helped develop the N320
investigated, Alex Williams discovered that FP0 for USRP N320 was added to
the host side in UHD v.3.15, but was not included in UHD v.3.14. Upgrading
to UHD v.3.15 should solve your problem.
On Wed, Sep 2, 2020 at 11:29 AM Sumit
The code for the CPLDs on the USRP daughtercards (UBX, N310, N320) is not
open source. Under normal circumstances, there should be no reason to
modify it.
On Wed, Sep 2, 2020 at 5:48 PM 张忠山 via USRP-users <
usrp-users@lists.ettus.com> wrote:
> There is a cpld (U38 epm570) on daughter board u
The AD9361 calibrations are described in great detail in the first 15 pages
or so of the AD9361 Reference Manual (ADI UG-570). The TX QEC calibration
in particular takes a long time-- something like 100K RF clock cycles. You
can disable the various calibrations by mucking around with the register
The phase ambiguity is introduced by the divide-by-2 in the PLLs of the
Analog Devices AD9361 RF integrated transceiver on the B200. These
dividers randomly introduce a 0-degree or 180-degree phase shift when they
come up.
On Fri, Jun 12, 2020 at 4:08 PM Aaron Smith via USRP-users <
usrp-users
Since the release of UHD v3.15.0.0 and GNU Radio v.3.8.1.0, the Ubuntu
18.04 dependencies to build from source have evolved. The
documentation has not.
I've been looking for an excuse to learn how to use Docker containers,
so I created a Dockerfile based on Ubuntu 18.04 with the latest and
greates
What version of UHD are you using? If memory serves, you'll need Vivado
2017.4 for UHD versions up to v.3.14.x.x. v.3.15 uses 2018.3 I think.
On Mon, Apr 20, 2020 at 11:24 AM Harris, Dan via USRP-users <
usrp-users@lists.ettus.com> wrote:
>
>
> Is the windows Cygwin build of the E310_SG3 target
Hi Lukas. Most USRP X310 Linux users employ 10gigE to connect to the host
PC. PCIe on the USRP X310 uses a proprietary ASIC and the driver is, as
you discovered, built on an obsolete kernel. You could attempt to appeal
directly to NI for support if switching to 10 gigE isn't an option for you.
The N310 motherboard does not have a PCIe interface, proprietary or
otherwise. Schematic p. 20 was a PoE controller on earlier, unreleased
versions of the N310, but it was omitted because it could not source enough
current to the device when both RF daughtercards were enabled. The PoE
components
What USRP are you targeting?
Also, I'm not sure it makes sense to enable DPDK on an XPS15 laptop with a
USRP. It was targeted by Ettus for use with the USRP X3x0 and N3x0, which
most people use with desktop PCs with dual10gigE NICs or a QSFP in the
case of the N320/N321.
On Sun, Oct 27, 2019 a
Python 3 has been the default for MPM on the N310 since June of 2017.
https://github.com/EttusResearch/uhd/commit/5f99240bd283da3da71588fcb1c1886937693928
On Mon, Oct 21, 2019 at 9:37 AM Jason Matusiak via USRP-users <
usrp-users@lists.ettus.com> wrote:
> I am just starting to play with the N310
The E310/E312 has a small-ish FPGA that does not have enough resources to
accommodate the overhead associated with 14 RFNoC blocks. You have
discovered empirically that you run out of space above 5 blocks.
On Wed, Oct 16, 2019 at 10:06 AM Jonathan Lockhart via USRP-users <
usrp-users@lists.ettus
Hi Johannes. Things tend to go badly when the UHD and FPGA bitstream
versions on the N310 SD card don't match those on the host for the N3xx.
Avoid using master with the N310 out of the box because the
filesystem/FPGA images most likely don't exist.
Burn this SD card image:
http://files.ettus.co
You can convert your .bit file to a .bin file with this utility:
https://github.com/EttusResearch/uhd/blob/UHD-3.14/mpm/python/usrp_mpm/fpga_bit_to_bin.py
On Mon, Oct 7, 2019 at 12:02 PM Marcus D. Leech via USRP-users <
usrp-users@lists.ettus.com> wrote:
> On 10/07/2019 11:19 AM, Francesco Restu
Hi Baroch.
When you update UHD on the host, you should also update the N310 SD card
filesystem to the corresponding version. In your case:
http://files.ettus.com/binaries/cache/n3xx/meta-ettus-v3.14.0.0/
DIrections on how to update the SD card can be found here:
https://kb.ettus.com/Writing_the_
Your output indicates that you're executing UHD v.3.10.0.3, not version
3.14.1, so you must have multiple versions installed.
Go to /usr/local/lib (or wherever you installed UHD on your machine) and
make sure it looks something like this when you type in "ls -l uhd*":
lrwxrwxrwx 1 root root
Does this help?
https://kb.ettus.com/Building_and_Installing_the_USRP_Open-Source_Toolchain_(UHD_and_GNU_Radio)_on_Linux#Configuring_USB
On Wed, Sep 11, 2019 at 1:08 PM Javier Uranga via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Dear Members in the List,
>
> I'm working with an old USRP B
> [ 25.414692] libphy: nixge_mii_bus: probed
> [ 25.451582] libphy: nixge_mii_bus: probed
> [ 25.469428] nixge 4000.ethernet sfp0: renamed from eth1
> [ 25.713083] rfnoc_crossbar crossbar0: NI Platform RFNoC Crossbar
> registered
> [ 25.751871] nixge 40008000.ethernet
Hi Austin. Is *enx70886b87f283 *a 1 gigE or 10gigE connection? If it's
1gigE, my guess is that your problem may be that the new SD card is loading
the XG FPGA image, which expects 10 gigE connections to the host on both
ports SFP0 and SFP1. You'll need to update the SD card to load the HG
image
What Neel says in the previous is correct, but it doesn't answer your
question. This error is telling you that the script is having issues with
the Vivado licenses on your PC. One of the first things that the
*uhd_image_builder.py
*script does is execute *setupenv.sh *in *fpga/usrp3/top/x300*. T
[image: e320_mini_hdmi.png]
Here's the pinout of the E320 GPIO connector. Someone from Ettus Support
(i.e., who is still employed by NI) will have to comment on when the E320
schematics will be available.
On Tue, Aug 27, 2019 at 1:06 PM Aaron Holtzman via USRP-users <
usrp-users@lists.ettus.com>
Did you follow the instructions in the output and resize the rmem and wmem
buffers?
Please run: sudo sysctl -w net.core.rmem_max=2426
Please run: sudo sysctl -w net.core.wmem_max=2426
On Wed, Aug 14, 2019 at 12:24 PM Marcus D. Leech via USRP-users <
usrp-users@lists.ettus.com> wrote:
> On
It looks like UHD didn't build because it's missing the Python library
numpy. You can try "pip install numpy" and rerunning PyBombs, but to be
honest you might have better luck starting over and installing from source
by following these instructions--
https://kb.ettus.com/Building_and_Installing_
Sorry, I misunderstood your question-- did you set up the mode in UHD
correctly?
http://files.ettus.com/manual/page_dboards.html
Also, you might want to double-check the SMA connections just in case.
Not sure if the subdev spec has changed in the last year. Someone who
knows the UHD codebase bett
The RF capabilities of USRPs are determined by the daughterboards that are
installed in the X300. From your uhd_usrp_probe output, you have a BasicTX
and BasicRX installed in your device, which only support 1 bare bones
transmit channel and one receive channel.
Check out the daughtercard section
The USRP E313 is an E310 in a weatherproof enclosure with PoE capability.
As Marcus points out, the network interface to the PC (over 1gigE RJ-45)
has far less bandwidth than an Ettus-branded USRP X310 or NI USRP 294x or
295x using a PCIe or 2x10 gigE link to a host PC.
On Mon, Jul 15, 2019 at
Hi Mike.
Did you try putting the original (not the cloned) SD card in the 2nd unit?
Do you still observe the same error? Doing so would eliminate an issue
with a corrupted SD card during duplication.
-Robin
On Thu, Jul 11, 2019 at 1:35 PM Michael Don via USRP-users <
usrp-users@lists.ettus.com
See interleaved responses below.
On Wed, Jul 10, 2019 at 6:42 AM Samuel Berhanu via USRP-users <
usrp-users@lists.ettus.com> wrote:
> The N310 design (i have tried both the HG and XG ) specify the following:
> UART0 on MIO pin 14:15,
> PJTAG on pin 10:13
> UART1 on MIO pin 8:9
> I2C0 on MIO pin 5
After cloning the gnuradio repo, you can edit this file:
https://github.com/gnuradio/gr-recipes/blob/master/uhd.lwr
On Fri, Jun 28, 2019 at 3:39 PM Andrew Thommesen via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi,
>
> When installing rfnoc using pybombs is it possible to specify the vers
Maybe the contents of this file will point you in the right direction?
https://github.com/EttusResearch/meta-ettus/blob/master/meta-e31x/recipes-support/uhd/uhd-fpga-images_git.bbappend
On Fri, Jun 28, 2019 at 1:19 PM Marcus D. Leech via USRP-users <
usrp-users@lists.ettus.com> wrote:
> On 06/28/
One debugging technique you could try would be to connect Tx to Rx directly
via an SMA cable with ~30dB of inline attenuation to eliminate any RF
propagation effects.
On Thu, Jun 27, 2019 at 10:58 AM Marcus D. Leech via USRP-users <
usrp-users@lists.ettus.com> wrote:
> On 06/27/2019 12:22 PM, Ja
Hi Bob.
You could try downloading the file from Github and copying it into the
correct location once you've expanded the tarball.
https://github.com/EttusResearch/uhd/blob/v3.13.1.0/images/manifest.txt
-Robin
On Tue, Jun 25, 2019 at 11:33 AM Tillson, Bob (US) via USRP-users <
usrp-users@lists.et
If you need higher BW streaming to a host PC in network mode with a similar
front end to the E310, take a look at the USRP E320 if you need a 10gigE link
or the B210 if USB 3.0 data rates are sufficient.
The E310 was designed to be a standalone embedded SDR, not a networked device
with full BW
You could try using the .deb or .rpm pre-built binaries if you're running
on Linux. See, for instance:
http://files.ettus.com/binaries/uhd/uhd_003.004.000-release/
On Wed, May 8, 2019 at 2:09 PM Joe Martin via USRP-users <
usrp-users@lists.ettus.com> wrote:
> I’ve successfully built UHD v3.9.0 b
You might want to try this:
https://forums.xilinx.com/t5/Configuration/Is-it-possible-to-convert-bin-file-to-bit-file-or-mcs-file/td-p/870351
but YMMV.
-Robin
On Wed, May 8, 2019 at 11:04 AM Joe Martin wrote:
> Very good, Marcus. I would greatly appreciate it.
>
> If we can get our hands on
Hi Joe and Jason. So, I took a walk down Memory Lane and discovered that
the N210 was first released by Ettus Research in November 2010, which was
about 6 months after we were acquired by National Instruments.
It is a true statement that v2 of the hardware is quite geriatric and no
longer supporte
Are you using USB 3.0? USB 2.0 will max out at about 8 Ms/s.
Robin Coxe | Chief R&D Program Manager, SDR | Santa Clara, CA | 408.610.6363
From: USRP-users on behalf of Rensi Mathew
via USRP-users
Sent: Friday, May 3, 2019 9:17 PM
To: Vsr Ravi via USRP-users
Hi Marc.
Are you trying to connect using 1 gigE or 10gigE?
The default N310 FPGA bitstream is the HG image, which expects 10gigE on
SFP port 1 (192.168.20.2) and/or 1 gigE on SFP port 0 (192.168.10.2).
-Robin
On Tue, Mar 12, 2019 at 10:43 AM Nate Temple via USRP-users <
usrp-users@lists.ettus.c
The B200/B210 has an Analog Devices analog PLL (ADF4002) [U101].
The B200mini series are intended as small form factor, low-cost SDRs, not
high-precision devices. The PLL is implemented as digital logic in the
FPGA to minimize both cost and PCB board space, but limits the phase and
frequency accu
You may have multiple versions of GNU Radio and/or UHD libraries still
installed on your PC. Try navigating to the wherever you installed them (e.g.,
/usr/local/lib) and deleting the ones you don’t want by hand.
Robin Coxe | Chief R&D Program Manager, SDR | Santa Clara, CA | 408.610.6363
___
https://kb.ettus.com/N300/N310#Front_Panel
The AD9371 has a divide-by-2 PLL and the input baluns are optimized for RF
center frequencies 300 MHz-4 GHz (external LO inputs 600 MHz-8 GHz). Consult
the AD9371 user guide on the Analog Devices website for more details on what
goes on inside the RF
To clarifiy, the B200mini, B200mini-i, and B205mini-i do not have an
on-board GPSDO, but they do have 1 PPS and 10 MHz Reference Inputs.
-Robin
On Wed, Nov 14, 2018 at 12:46 PM Marcus D. Leech via USRP-users <
usrp-users@lists.ettus.com> wrote:
> On 11/14/2018 02:37 PM, Chintan Patel via USRP-u
Hi Stephan. Your issue looks similar to one that has been previously
reported. The Hardware Sustaining Engineering team is currently
investigating.
Would it be possible for you to try powering the GPSDO module from a lab
supply instead of plugging it in to the N210 motherboard and checking if
y
Hi Immi. This paper is one of the better overviews of the CORDIC
algorithm in FPGAs: http://www.andraka.com/files/crdcsrvy.pdf
Also, if you search the archives of this list, there are threads regarding
the specific application of the CORDIC algorithm in the USRP FPGA designs.
For example:
http:
Hi Andrew. It looks like your USRP B210 is connected via USB2. Do you
still see the same error when connected to a USB3 port?
-Robin
On Wed, Oct 17, 2018 at 1:00 PM Harper, Andrew via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi, I'm having trouble receiving samples with my B210. I get
Hi Chintan. Yes, it is an intentional omission. The PCIe circuitry uses an NI
proprietary ASIC and that portion of the schematic cannot be released.
-Robin
Robin Coxe | Chief R&D Program Manager, SDR | Santa Clara, CA | 408.610.6363
From: 32042062500n behalf of
Minor typo in the link. Try this one!
https://github.com/EttusResearch/uhd/blob/master/host/docs/ni_rio_kernel.dox
On Wed, Sep 5, 2018 at 12:36 PM, ALEJANDRO BLANCO PIZARRO via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi all,
>
> I am really happy about the upgrading of the NI RIO dri
Hi Andy. The E310 external power connector is capable of handling 5-15 VDC
@ max current of 3.5 A. So if you use an external battery pack with the
correct mating connector instead of the wall wart, it should work without
modification, although it is not an officially supported configuration.
You
You should be able to just recompile MPM to get yourself unstuck.
On Wed, Aug 15, 2018 at 1:08 PM, Rob Kossler wrote:
> Oh. Forgot to ask. Do I need to re-flash the whole OS or can I just
> recompile MPM on the device?
> Rob
>
> On Wed, Aug 15, 2018 at 4:05 PM Rob Kossler wrote:
>
>> Ok. Tha
Hi Rob. Have you updated MPM on your N310 device? This particular issue
was an MPM bug that should have been resolved in the UHD v. 3.13.0.1
filesystem, so updating the SD card should also resolve the issue. If you
just update UHD on the host PC without updating MPM on the device, it will
not f
Hi Alejandra.
The Octoclock (NI CDA-2990) user manual lives on the National Instruments
website:
http://www.ni.com/pdf/manuals/375747c.pdf
Here is the product page:
http://sine.ni.com/nips/cds/view/p/lang/en/nid/213460
-Robin
On Thu, Jul 26, 2018 at 9:18 AM, Alejandra Mercado via USRP-users <
Hi Bob. The USRP N310 Letter of Volatility lives on the National
Instruments website.
http://www.ni.com/pdf/manuals/377420a.pdf
-Robin
On Thu, Jul 26, 2018 at 8:34 AM, Tillson, Bob (US) via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello,
>
>
>
> I was looking on the kb, but did not se
Hi Dan. Such a product is in the works. It was mentioned in Manuel Uhm's
presentation at GRCon 2017-- the USRP E320.
Single board approximately the size of a B210, AD9361, RFNoC-capable with
larger Zynq FPGA than E310 (XC7Z045).
Ettus Research intends to demo the E320 at GRCon 2018, so sign up t
ou use the MCS mechanism, however that’s not included in the
> factory FPGA image, (though I have used it in custom images) so you also
> see some phase ambiguity here too between REF locked USRP's
> -Ian
>
>
> On Jun 25, 2018, at 9:15 PM, Robin Coxe via USRP-users <
Marcus is correct and the schematics do in fact provide the answer.
Please refer to p.1 of the B210 schematic. It contains an ADF4002 analog
PLL.
The B200mini clocking circuitry is on p. 4 of the schematic. The PLL is
digital and implemented inside the FPGA.
There is a divide-by-2 for the exter
Hi Brais. We have not confirmed, but the older version of the Xilinx
Platform USB cable should work. The NI/Digilent USB programming cable for
Xilinx FPGAs definitely works. The E310 JTAG Interface cable accessory kit
for the E310 is simply a passthrough adapter for the somewhat odd Xilinx
JTAG
Hi Alvin.All Ettus Research USRP SDRs ship with default FPGA bitstreams
that have the same basic functionality: 1) a digital interface to the RF
front end (ADCs/DACs), 2) digital up and down converters, 3) interpolation
and decimation blocks to adjust the sample rate, and 4) digital logic for
c
Hi Jon. First of all, you should not be using a SG1 image with the E313.
All E313s contain E310s with Speed Grade 3 FPGAs.
The behavior you describe is a result of a corrupted bit in the AVR EEPROM
firmware that results in the power on sequence requiring the power button
to be pushed. This corr
Hi Zhongyuan. The USRP N310 does not have any internal lighting surge
protection. It is intended as a benchtop SDR. For other use cases, you
are free to customize the device as you see fit. Marcus's suggestions are
good ones.
-Robin
On Fri, May 11, 2018 at 10:06 AM, Marcus D. Leech via U
...and to confirm, you have the correct GPSDO module.783173-01 GPSDO
(OCXO) (LC_XO with OCXO)
On Tue, Apr 17, 2018 at 9:10 AM, Derek Kozel via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello Martin,
>
> Yes, you can just install the GPSDO in and have the full functionality.
> The sw
B200.v is the top level Verilog file. If you inspect this file, you will
see that B200_core.v and B200_io.v are instantiated within it.
All of our FPGA code is freely available-- please take some time to look
through the files in the usrp3/lib directories here: https://github.com/
EttusResearch/f
Hi Rob. You are specifying use of the RX external LO correctly via device
arguments. Each of the daughtercards on the N310 contains a single Analog
Device AD9371 2 TX x 2 Rx RF integrated transceiver. The two Tx channels
share an LO and the 2 Rx channels share an LO. Consequently, the TX or R
Hi Rob. Thank you for pointing out the issue with the USB cable and
connector. We have discovered that the cable is out of spec. and are
investigating alternative vendors.
Also, did you try uhd_find_devices with the IP address as an argument
(i.e., uhd_find_devices --args "addr=192.168.10.2")?
Hi Rob. See interleaved responses below.
-Robin
On Wed, Mar 28, 2018 at 12:42 PM, Rob Kossler via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi,
> I recently received a new N310 and I have a few questions:
> 1) Is it true that it is not possible to share LO signals among channels
> wit
Hi Devin. You'll need a Torx-T8 driver.
You can buy a socket set like this one:
https://www.amazon.com/dp/B019ZSK57K/ref=sspa_dk_detail_2?pd_rd_i=B019ZSK57K&pd_rd_wg=wZFLO&pd_rd_r=WZRD45JZ9JXAQTKBXND9&pd_rd_w=MuS17&th=1
-Robin
On Wed, Mar 21, 2018 at 11:21 AM, Devin Kelly via USRP-users <
usrp-
Hi Dave. The official product announcement of the USRP N310 was just
posted today. The N310 is now orderable!
On Mon, Mar 5, 2018 at 2:11 PM, Dave NotTelling via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Just saw that the N310 is officially on the ettus.com website. Curious
> about th
Also:
https://kb.ettus.com/Synchronization_and_MIMO_Capability_with_USRP_Devices
https://files.ettus.com/manual/page_sync.html
On Thu, Mar 1, 2018 at 8:45 AM, Neel Pandeya via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello Professor Mercado:
>
> Our apologies, you have stumbled on a typo
Hi Shrishail. Did you follow the instructions in the error message?
>From the Linux command line, type: /usr/local/lib/uhd/utils/
uhd_images_downloader.py
Then try running *uhd_find_devices* again.
The FPGA bitstreams and firmware images for USRPs must be downloaded
separately.
This application
The Analog Devices AD9361 RF integrated transceiver in the B205mini has a
divide-by-2 PLL inside when using an external reference input, so there
will always be a 180 degree phase ambiguity.
See this post from my former colleague (also named Robin) at ADI:
https://ez.analog.com/thread/73543
-Robi
On p.8 of B200 schematic:
T801 is Macom ETC1-1-13TR (RF2)
T800 is Minicircuits TC1-1-43A+ (RF3)
U802 is Anaren BD3150L50100AHF (RF1)
On Thu, Feb 1, 2018 at 5:45 PM, Ron Economos via USRP-users <
usrp-users@lists.ettus.com> wrote:
> There's also a balun on the AD9361 input. Unfortunately, the balu
Hi Dan. Both the B200 and the E312 use the Analog Devices AD9361 RF
integrated transceiver. This chip does have an integrated LNA. Perhaps
there's some sort of mismatch between your DUTs and this integrated LNA at
<1 GHz?
ADI publishes the RX S-parameters:
https://ez.analog.com/thread/41208#13
Due to the immense volumes of Chinese spam this list has been receiving
recently (hundreds of messages per hour), I have asked the cloud hosting
provider for usrp-users@lists.ettus.com to block all incoming messages from
qq.com.
If you are located in China and have a legitimate post for the usrp-u
Hi Hu. Before you start desoldering chips from the circuit board, could
you be more specific about how your E312 "didn't work"? It may be
possible to resurrect your E312 by means of less extreme measures.
What were you trying to do with it? Did it boot? If not, could you
connect to the device
Hi Mark. Have you tried ISE on Windows machine? The Xilinx Linux cable
drivers from that era were quite unreliable.
Alternatively, there are also some old blog posts about Linux workarounds:
http://dreamrunner.org/blog/2012/09/12/install-xilinx-ise-on-the-ubuntu/
-Robin
On Mon, Nov 13, 2017 a
Hi Michal. The USRP2 is a discontinued product that was introduced before
Ettus Research was integrated into the National Instruments manufacturing
infrastructure.Unfortunately, the only schematics and FPGA pin
constraints files that we have on hand are the ones that you have already
located.
Hi Mark. One thought-- Vivado does not support the Spartan-3A FPGA on the
USRP N210.The JTAG protocol should in principal be the same, but Vivado
definitely does not include Xilinx device files for older FPGAs.
Have you tried to resurrect the device using Xilinx ISE 14.7 Labtools?
https://www
Matt gave this talk again at GR Con 2015 in Boulder. Slides here:
https://drive.google.com/file/d/0B6ccrJyAZaq3UHpEQld1YmZjbWs/view
On Mon, Oct 16, 2017 at 1:56 PM, Sumit Kumar via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi,
>
> I was wondering if anyone has the materials for the famou
Easy answer-- refer to p. 8 of the schematic.
http://files.ettus.com/schematics/b200/b210.pdf
-Robin
On Fri, Oct 13, 2017 at 4:58 AM, Jose Benito Diéguez Teixeira via
USRP-users wrote:
> Hello,
>
> Easy question, can the B210 deal with another input voltage than 6V (as
> the power supply has)?
Hi Jose. The temperature ranges quotes for the B200mini in the enclosure
were derived from thermal test results. The B210 enclosure will extend
the operational temperature range, but Ettus Research has not performed
thermal testing on this configuration and we have no immediate plans to do
so.
Hi Billy. C674 is Kemet T495C107K016ATE200
CAP,SM,100UF,16V,10%,TANTALUM,6032.
Schematics for the B210 are available here:
http://files.ettus.com/schematics/b200/b210.pdf
-Robin
On Fri, Sep 22, 2017 at 8:23 PM, Billy Jones via USRP-users <
usrp-users@lists.ettus.com> wrote:
> I have been usi
Hi Arthur. As the Ettus Knowledge Base points out, the DBSRX2 is a very
old product and has been EOLed. The schematic is available here:
http://files.ettus.com/schematics/dbsrx2/dbsrx2.pdf .
The tunable filter capability is provided by the MAX2112 IC. Datasheet
here: https://datasheets.maximint
Hi Snehasish. The NI USRP 2954R has UBX-160 daugthercards and a GPSDO
module. The TwinRX is in the NI USRP 2945/2955 (with GPSDO)
-Robin
On Thu, Aug 10, 2017 at 7:56 AM, Snehasish Kar via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello i am using NI usrp 2954 R, which I believe is us
Hi Jon. The XCVR2450 has been EOLed by Ettus Research. We will never
have official X310 support for this board, as it is an obsolete product.
The XCVR2450 will work with the USRP N210 or the USRP1.
Alternatively, the UBX, SBX, or CBX daughterboards will cover that same
frequency range and will
Hi Thomas. Ettus Research is preparing to offer GPIO and JTAG interface
cables for the B20Xmini series for sale in the next few months. If you
have an urgent need for one, please email supp...@ettus.com.
-Robin
On Thu, Jul 27, 2017 at 10:00 PM, Thomas Teisberg via USRP-users <
usrp-users@list
Hi Snehasish. The NI USRP-2942R does not actually have an integrated
GPSDO, the* NI USRP-2952R* does. That may be your problem.
-Robin
On Wed, Jul 26, 2017 at 7:43 AM, Snehasish Kar via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello
>
>
> I have procured a NI USRP 2942R, which has an
Hi Roy. The hottest components on the B200mini-i are the ADI RF Integrated
Transceiver (AD9364), the Xilinx Spartan 6 FPGA (XC6SLX75-3CSG484I), and
the Cypress FX3 USB chip (CYUSB3014-BZXI). Consult the datasheets for the
max. recommended junction temperature of these devices.
-Robin
On Mon,
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