[email protected] said: > I'm pretty certain the outer that the PPS interrupt handler reads in on the > CPU chip. The counter counts nanoseconds but the lower digits are always > zero. I don't think a PCI bus is involved
On most CPU architectures, the low level hardware has a register that counts on the CPU clock. On Intel systems, it's read by the rdtsc instruction which reads a 48 bit counter: TSC, time stamp counter. http://en.wikipedia.org/wiki/Time_Stamp_Counter On DEC/Alpha it was rpcc, 32 bits. (read processor cycle counter) MIPS had a similar counter, but it wasn't available from user space. I'm not familiar with other architectures. There was a tangle when Intel started changing the CPU clock frequency on the fly to save power. I don't know how they fixed that. POSIX/Linux/*BSD has 2 calls to read the (software) clock. gettimeofday returns seconds and microseconds in a struct timeval. clock_gettime returns seconds and nanoseconds in a struct timespec. (nanoseconds fit in a 32 bit word) -- These are my opinions. I hate spam. _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
