The control loop (of which A9 is a part) ultimately locks the OCXO in the 5065
to the Rb
transition. Gain in the control loop suppresses the noise of the OCXO, making
better than it would have been stand alone.
Ok so far? Bob’s not off the tracks (yet)?
The various processes that create ADEV (or whatever you want to call it) on the
could be translated back to an “equivalent EFC noise” number at various
More or less, assume an ideal OCXO and blame all the problems on some little
source in series with the EFC line. Very much like blaming all the noise in an
op amp on
the input stage.
Still ok (if a bit unconventional) ?
At this point one should be able to sum the magic EFC noise with op amp noise
else you are worried about and compare their magnitudes. If one is 1/100th of
then maybe it’s not the thing to worry about. Yes, you could carry it on
through the various
control loop equations and get things even more correct.
No, I haven’t done all of this, but it seems to be a way to come up with a
fairly detailed answer
to “what’s good enough” in the control loop,
> On Feb 22, 2018, at 9:04 AM, Charles Steinmetz <csteinm...@yandex.com> wrote:
>> A is the LT1793 the best choice the time constant is 0.05 seconds with a
>> 10 K resistor and 5 uF Capacitor
>> B should we add resistors and decoupling on the + - 15 volt op amp
>> C Gold plating the edge connecter, does any one know a reasonable
>> source, or is doing it at home an option and if yes, how best way to do so.
> A. The 1793 is a good choice. You should look at the LT1012 also. The
> headlines on the 1793 datasheet suggest it is significantly quieter than the
> 1012. HOWEVER: you are particularly interested in frequencies well below
> 10Hz, and due to an extremely low 1/f noise corner, the 1012 is actually 5x
> quieter than the 1793 between 0.1 and 10 Hz (0.5uV for the 1012 p-p vs. 2.4uV
> p-p for the 1793). The 1012 can also be overcompensated, which could be a
> significant advantage in this application. [Note that the 1793 has lower
> input current noise than the 1012, but that is irrelevant in the HP circuit
> because of the relatively low impedances at the op-amp inputs. Because of
> that, the input voltage noise dominates the total noise.]
> B. If you do this, the decoupling has to be good down through at least
> milliHz, maybe even microHz. That would require capacitors in the 1F range
> with suitable decoupling resistors (100 ohms or below). The op amp is fed by
> dedicated +/- regulators, so you'll get the best result by just using the
> lowest-noise regulators available. That means the LT3042 for V+. You will
> have to pore through datasheets to find the lowest-noise negative regulator
> available today (as above, paying particular attention to the noise specs
> below 1Hz).
> C. You normally just tell the board house to plate the edge fingers. It is
> not outrageously expensive. OR, here is another, heretical suggestion: I
> have designed a number of plug-in daughterboards using ENIG finish on the
> whole board, including the edge fingers. *NOTE* this is an "off-label" use
> of ENIG finish. The board house I used for the first batch of ENIG-plated
> fingers (ITEAD Studio) gave me very robust plating, so I have continued to
> use them for boards with ENIG-plated edge fingers.
> I tested a number of the cards over more than 100 insertion-removal cycles,
> and viewed under magnification there was very little wear and absolutely no
> nickel or copper showing ("ENIG" stands for "electroless nickel immersion
> gold," meaning the copper is coated first with nickle and then with gold.
> The boards I've tested have not worn through the gold even after >100
> insertion-removal cycles -- way, way more than any plug-in board is likely
> ever to see.)
> *NB:* ENIG plating varies widely from one board house to another, and very
> likely varies somewhat from one batch to another at any particular board
> house, so YMMV!!! I've done a dozen or so projects with ENIG-plated fingers
> using ITEAD Studio, and have been very pleased with the results each time.
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