JackOfAll wrote: > Triode, > > Was trying to figure out the logic behind the magic numbers, 23 and 37, > found this.... > > > Code: -------------------- > > > /* > * spdif0_clk will be 454.7MHz divided by ccm dividers. > * > * 44.1KHz: 454.7MHz / 7 (ccm) / 23 (spdif) = 44,128 Hz ~ 0.06% error > * 48KHz: 454.7MHz / 4 (ccm) / 37 (spdif) = 48,004 Hz ~ 0.01% error > * 32KHz: 454.7MHz / 6 (ccm) / 37 (spdif) = 32,003 Hz ~ 0.01% error > */ > -------------------- > >
That's rather interesting. That means the SPDIF output is using the USB PLL rather than the audio PLL. The audio PLL has a fractional N synthesizer with 30 bits precision, which means it can be set to almost any frequency desired to a high precision. With this you can get the clockroot feeding SSI and SPDIF sections to be the standard audio clock frequencies. The table on page 5022 of the manual shows how to do this for different frequencies. The actual PLL registers take three numbers, a divider select, a numerator and a denominator. The equation is: fout = 24MHz * (div_sel + (num/denom)) The fraction should be between 0-1.0. There are then a series of dividers to get the audio frequency clock (say 11.2896), then the SSI or SPDIF block divide this down to the actual bit clock and word clock. I just don't understand why we are trying to come up with "magic numbers " to get close to the real thing, when by using the audio PLL you CAN get the real thing. The only reason I can think of is that somebody wanted different sample rates on I2S and SPDIF. John S. It seems to me this would be better than using a USB PLL frequency that is not a nice multiple of the audio frequencies. ------------------------------------------------------------------------ JohnSwenson's Profile: http://forums.slimdevices.com/member.php?userid=5974 View this thread: http://forums.slimdevices.com/showthread.php?t=98544 _______________________________________________ unix mailing list [email protected] http://lists.slimdevices.com/mailman/listinfo/unix
