Re: [Mesa-dev] [PATCH] radeonsi: fix a crash when binding a sampler buffer

bug.cgi?id=94091 Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> --- src/gallium/drivers/radeonsi/si_descriptors.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c index 3

Re: [Mesa-dev] [PATCH 3/3] gallium/radeon: drop support for LLVM 3.5

nt si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm, diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c index dab27df..7823759 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c @@ -176,8 +176,7 @@ static boolean do_winsys_init(struct amdgpu_winsys *ws) /* LLVM 3.6 is required for VI. */ if (ws->info.chip_class >= VI && - (HAVE_LLVM < 0x0306 || -(HAVE_LLVM == 0x0306 && MESA_LLVM_VERSION_PATCH < 1))) { + HAVE_LLVM == 0x0306 && MESA_LLVM_VERSION_PATCH < 1) { fprintf(stderr, "amdgpu: LLVM 3.6.1 is required, got LLVM %i.%i.%i\n", HAVE_LLVM >> 8, HAVE_LLVM & 255, MESA_LLVM_VERSION_PATCH); goto fail; While you're at it, maybe change the comment to LLVM 3.6.1. Including the gs copy shader addition, the series is Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] radeonsi: fix build with LLVM 3.6

Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> On 11.02.2016 11:50, Marek Olšák wrote: From: Marek Olšák <marek.ol...@amd.com> Broken by this cleanup: 3dc1cb0cc7605a2f3128311f5a6052f740fc7b0d --- src/gallium/drivers/radeonsi/si_shader.c | 2 +- 1 file changed, 1 ins

Re: [Mesa-dev] [PATCH 2/2] radeonsi: Allow dumping LLVM IR before optimization passes

On 04.02.2016 13:52, Tom Stellard wrote: On Thu, Feb 04, 2016 at 09:15:26AM +0100, Nicolai Hähnle wrote: From: Nicolai Hähnle <nicolai.haeh...@amd.com> Set R600_DEBUG=preoptir to dump the LLVM IR before optimization passes, to allow diagnosing problems caused by optimization passes.

Re: [Mesa-dev] [PATCH 1/1] r600, compute: Do not overwrite pipe_resource.screen

On 05.02.2016 17:54, Jan Vesely wrote: found by inspection. Signed-off-by: Jan Vesely Pushed, thanks! --- src/gallium/drivers/r600/evergreen_compute.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/evergreen_compute.c

Re: [Mesa-dev] [PATCH] radeonsi: don't emit unnecessary NULL exports for unbound targets (v2)

Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> On 05.02.2016 17:51, Marek Olšák wrote: From: Marek Olšák <marek.ol...@amd.com> v2: remove semantic index == 0 checks add the else statement to remove shadowing of args --- src/gallium/drivers/radeonsi/si_s

Re: [Mesa-dev] [PATCH 4/4] radeonsi: fix Hyper-Z on Stoney

On 29.01.2016 15:02, Marek Olšák wrote: From: Marek Olšák Cc: 10.0 10.1 "11.0 11.1" --- src/gallium/drivers/radeon/r600_texture.c | 4 1 file changed, 4 insertions(+) diff --git a/src/gallium/drivers/radeon/r600_texture.c

Re: [Mesa-dev] [PATCH 3/4] radeonsi: rework RB+ for Stoney

Patches 1-3: Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> On 29.01.2016 15:02, Marek Olšák wrote: From: Marek Olšák <marek.ol...@amd.com> This fixes it. States which also need to be taken into account: - SPI color formats - each down-conversion format supports only a

Re: [Mesa-dev] [PATCH 1/7] gallium: Add PIPE_CAP_FRAMEBUFFER_LAYERS

On 31.01.2016 15:11, Ilia Mirkin wrote: This seems odd. When would this not just be MaxArrayTextureLayers? IMO a plain enable cap, like PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENTS makes more sense here. From the GL_ARB_framebuffer_no_attachments spec overview: Additionally, this extension provides

Re: [Mesa-dev] [PATCH 4/4] radeonsi: fix Hyper-Z on Stoney

On 01.02.2016 15:16, Marek Olšák wrote: On Fri, Jan 29, 2016 at 7:46 PM, Marek Olšák <mar...@gmail.com> wrote: On Fri, Jan 29, 2016 at 4:15 PM, Nicolai Hähnle <nhaeh...@gmail.com> wrote: On 29.01.2016 15:02, Marek Olšák wrote: From: Marek Olšák <marek.ol...@amd.com> Cc: 1

Re: [Mesa-dev] [PATCH 0/5] Memory info extensions

part are Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> Please review. src/gallium/drivers/freedreno/freedreno_screen.c | 1 + src/gallium/drivers/i915/i915_screen.c | 1 + src/gallium/drivers/ilo/ilo_screen.c | 1 + src/gallium/drivers/llvmpipe/lp_sc

[Mesa-dev] [PATCH 0/4] radeonsi: experimental support for GPUPerfStudio

Hi, this bunch of patches meets GPUPerfStudio half-way in supporting the timing features on CI+ hardware. The latest version of GPUPerfStudio is required. With these patches, GPUPerfStudio should recognize our driver as supported and offer its frame profiling features without crashing. It should

[Mesa-dev] [PATCH 3/4] radeonsi: re-order the SQ_xx performance counter blocks

From: Nicolai Hähnle <nicolai.haeh...@amd.com> This is yet another change motivated by appeasing AMD GPUPerfStudio's hardcoding of performance counter group numbers. --- src/gallium/drivers/radeon/r600_perfcounter.c | 38 --- src/gallium/drivers/radeon/r600_q

[Mesa-dev] [PATCH 4/4] radeonsi: add placeholder MC and SRBM performance counter groups

From: Nicolai Hähnle <nicolai.haeh...@amd.com> Yet another change motivated by AMD GPUPerfStudio compatibility. These groups are not directly accessible from userspace, and AMD GPUPerfStudio does not actually query them - it just requires them to be there. Hence, adding a placeholder f

[Mesa-dev] [PATCH 2/4] radeonsi: re-order the perfcounter hardware blocks

From: Nicolai Hähnle <nicolai.haeh...@amd.com> As documented in the comment, AMD GPUPerfStudio unfortunately hardcodes the order of performance counter groups. Let's do the pragmatic thing and present the same order as Catalyst/Crimson. --- src/gallium/drivers/radeonsi/si_perfcounter.

[Mesa-dev] [PATCH 1/4] gallium/radeon: add GPIN driver query group

From: Nicolai Hähnle <nicolai.haeh...@amd.com> This group was used by older versions of AMD GPUPerfStudio (via AMD_performance_monitor) to identify the GPU family, and GPUPerfStudio still complains when it isn't available. --- src/gallium/drivers/radeon/r600_query.

[Mesa-dev] [PATCH 1/2] gallium/radeon: emit LLVM `ret void` before radeon_llvm_finalize_module

From: Nicolai Hähnle <nicolai.haeh...@amd.com> This allows dumping a consumable LLVM module before the initial optimization passes are run. --- The missing `ret void` is why the IR would not be accepted. I suspect Marek has something similar for the concatenating shaders, but this is

[Mesa-dev] [PATCH 2/2] radeonsi: Allow dumping LLVM IR before optimization passes

From: Nicolai Hähnle <nicolai.haeh...@amd.com> Set R600_DEBUG=preoptir to dump the LLVM IR before optimization passes, to allow diagnosing problems caused by optimization passes. Note that in order to compile the resulting IR with llc, you will first have to run at least the mem2reg pas

[Mesa-dev] [PATCH 4/4] st/mesa: bail out of try_pbo_upload_common when constant upload fails

From: Nicolai Hähnle <nicolai.haeh...@amd.com> Also fixes a resource leak when an upload_mgr is used for constants. --- src/mesa/state_tracker/st_cb_texture.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/mesa/state_tracker/st_cb_texture.c b/src/mesa/state_t

[Mesa-dev] [PATCH 1/4] st/mesa: do uploads earlier in try_pbo_upload_common

From: Nicolai Hähnle <nicolai.haeh...@amd.com> While rather unlikely, uploads _can_ fail. Doing them earlier means we'll have to restore less state when they do fail, and it's slightly easier to check the restore code. --- src/mesa/state_tracker/st_cb_texture.

[Mesa-dev] [PATCH 2/4] st/mesa: reduce the scope of sampler_view in try_pbo_upload_common

From: Nicolai Hähnle <nicolai.haeh...@amd.com> We can get rid of our reference immediately, since the driver will hold onto it for us. --- src/mesa/state_tracker/st_cb_texture.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mesa/state_tracker/st_cb_textur

[Mesa-dev] [PATCH 3/4] st/mesa: bail out of try_pbo_upload_common when vertex upload fails

From: Nicolai Hähnle <nicolai.haeh...@amd.com> At the same time, fix a memory leak noticed by Ilia Mirkin. --- src/mesa/state_tracker/st_cb_texture.c | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/src/mesa/state_tracker/st_cb_texture.c b/src/mesa/state_t

Re: [Mesa-dev] [PATCH 2/7] radeonsi: use SPI_SHADER_COL_FORMAT fields instead of export_16bpc

On 19.01.2016 11:11, Marek Olšák wrote: From: Marek Olšák This does change the behavior slightly: If a shader writes COLOR[i] and that color buffer isn't bound, the shader will export MRT_NULL instead and discard the IR tree that calculates the output. The only

Re: [Mesa-dev] [PATCH 7/7] radeonsi: disable SPI color outputs the shader doesn't write

Apart from two comments on patch #2, the series is Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> On 19.01.2016 11:11, Marek Olšák wrote: From: Marek Olšák <marek.ol...@amd.com> --- src/gallium/drivers/radeonsi/si_shader.h| 4 src/gallium/driv

Re: [Mesa-dev] [PATCH 3/4] radeonsi: allow tessellation on CU1 and ES on CU0

On 20.01.2016 19:20, Marek Olšák wrote: On Wed, Jan 20, 2016 at 6:30 PM, Nicolai Hähnle <nhaeh...@gmail.com> wrote: On 19.01.2016 20:20, Marek Olšák wrote: From: Marek Olšák <marek.ol...@amd.com> We don't use on-chip GS, so it's not required to reserve CU1 for ES. Why i

[Mesa-dev] [PATCH] radeonsi: fix discard-only fragment shaders (v2)

From: Nicolai Hähnle <nicolai.haeh...@amd.com> When a fragment shader is used that has no outputs but does conditional discard (KILL_IF), all fragments are killed without this patch. By comparing various register settings, my conclusion is that the exec mask is either not properly for

[Mesa-dev] [PATCH] radeonsi: fix discard-only fragment shaders (11.1 version)

From: Nicolai Hähnle <nicolai.haeh...@amd.com> When a fragment shader is used that has no outputs but does conditional discard (KILL_IF), all fragments are killed without this patch. By comparing various register settings, my conclusion is that the exec mask is either not properly for

[Mesa-dev] [PATCH] radeonsi: fix discard-only fragment shaders

From: Nicolai Hähnle <nicolai.haeh...@amd.com> When a fragment shader is used that has no outputs but does conditional discard (KILL_IF), all fragments are killed without this patch. By comparing various register settings, my conclusion is that the exec mask is either not properly for

Re: [Mesa-dev] [PATCH 3/3] mesa: Deal with size differences between GLuint and GLhandleARB in GetAttachedObjectsARB

Wow... did you actually run into that crash? On 20.01.2016 20:14, Jeremy Huddleston Sequoia wrote: Signed-off-by: Jeremy Huddleston Sequoia --- src/mesa/main/shaderapi.c | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git

Re: [Mesa-dev] [PATCH 2/3] mesa: Fix format warnings

Patches 1 & 2 are Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> On 20.01.2016 20:14, Jeremy Huddleston Sequoia wrote: main/shaderapi.c:1318:51: warning: format specifies type 'unsigned int' but the argument has type 'GLhandleARB' (aka 'unsigned long') [-Wformat] _mesa

Re: [Mesa-dev] [PATCH] r600g: don't leak driver const buffers

gnotas <nota...@gmail.com> --- No commit access, if the patch is ok someone please commit it. LGTM. Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> This should probably also be Cc: <mesa-sta...@lists.freedesktop.org> src/gallium/drivers/r600/r600_pipe.c | 6 ++

Re: [Mesa-dev] [PATCH 3/3] mesa: Deal with size differences between GLuint and GLhandleARB in GetAttachedObjectsARB

On 21.01.2016 11:34, Jeremy Huddleston Sequoia wrote: On Jan 21, 2016, at 07:51, Nicolai Hähnle <nhaeh...@gmail.com> wrote: Wow... did you actually run into that crash? No. I was just paying attention to compiler warnings ;) I'm glad someone does ;) On 20.01.2016 20:14,

[Mesa-dev] [PATCH v2 9/9] gallium/radeon: support PIPE_CAP_SURFACE_REINTERPRET_BLOCKS

From: Nicolai Hähnle <nicolai.haeh...@amd.com> This is already used internally in si_resource_copy_region for compressed textures, so the only real change here is the adjusted surface size computation. Reviewed-by: Marek Olšák <marek.ol...@amd.com> --- src/gallium/drivers/r600

Re: [Mesa-dev] [PATCH 0/3] Misc GLhandleARB GLuint cleanup

On 20.01.2016 20:21, Jeremy Huddleston Sequoia wrote: This series includes 3 changes related to help reconcile the differences in declaration between Apple's vs Mesa's GLhandleARB type. The first, I expect to be mostly uncontroversial as they are mainly cleaning up and correcting some

Re: [Mesa-dev] [PATCH] radeonsi: Add option for SI scheduler

until it has landed. Once it has, Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> src/gallium/drivers/radeon/r600_pipe_common.c | 1 + src/gallium/drivers/radeon/r600_pipe_common.h | 1 + src/gallium/drivers/radeonsi/si_pipe.c| 6 +- 3 files changed, 7 insertions(+)

Re: [Mesa-dev] [PATCH 1/2] r600: Typos and whitespace fixes

minant variant of English in the Linux kernel is Incorrect English, followed by American, British, and Indian. Similarly, I don't think we're following a consistent style in Mesa. Might be best for your sanity to tell your editor to be a bit more lenient ;) In any case, Reviewed-by: Nicolai

[Mesa-dev] [PATCH 3/7] radeonsi: replace use of is_gs_copy_shader in si_shader_vs

From: Nicolai Hähnle <nicolai.haeh...@amd.com> We now have an explicit parameter that contains the same information, and this will allow us to get rid of is_gs_copy_shader in the si_shader struct. --- src/gallium/drivers/radeonsi/si_state_shaders.c | 2 +- 1 file changed, 1 insertion

[Mesa-dev] [PATCH 7/7] radeonsi: emit rw_buffers for tes_shader only if tes_shader present

From: Nicolai Hähnle <nicolai.haeh...@amd.com> --- src/gallium/drivers/radeonsi/si_descriptors.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c index d157a9f..a

[Mesa-dev] [PATCH 0/7] radeonsi: geometry shader bug fix and cleanup

Hi, this series was prompted by a rendering bug reported for Dolphin. The bug is fixed in the first two patches, and the remainder is assorted cleanups that I noticed while working on the fix. Please review. Thanks, Nicolai -- .../drivers/radeonsi/si_descriptors.c| 8 +-

[Mesa-dev] [PATCH 2/7] radeonsi: ensure that VGT_GS_MODE is sent when necessary

From: Nicolai Hähnle <nicolai.haeh...@amd.com> Specifically, when the API switches from using a GS to not using a GS and then back to using the same GS again, we do not have to re-send all the GS state, but we do have to send VGT_GS_MODE. So make VGT_GS_MODE consistently be a part of the VS

[Mesa-dev] [PATCH 1/7] radeonsi: extract the VGT_GS_MODE calculation into its own function

From: Nicolai Hähnle <nicolai.haeh...@amd.com> Cc: "11.0 11.1" <mesa-sta...@lists.freedesktop.org> --- src/gallium/drivers/radeonsi/si_state_shaders.c | 47 +++-- 1 file changed, 28 insertions(+), 19 deletions(-) diff --git a/src/gallium/drivers/radeo

[Mesa-dev] [PATCH 6/7] radeonsi: do not set the shader->key for gs copy shaders

From: Nicolai Hähnle <nicolai.haeh...@amd.com> The key for a geometry shader would be interpreted as the key for a vertex shader further down the line, which really doesn't make sense. This does not affect the contents of shader->key because geometry shaders don't have any key entri

[Mesa-dev] [PATCH 5/7] radeonsi: si_llvm_emit_vs_epilogue is never used with gs copy shaders

From: Nicolai Hähnle <nicolai.haeh...@amd.com> Hence remove the misleading branch on is_gs_copy_shader. --- src/gallium/drivers/radeonsi/si_shader.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/ra

[Mesa-dev] [PATCH 4/7] radeonsi: move is_gs_copy_shader to si_shader_context

From: Nicolai Hähnle <nicolai.haeh...@amd.com> It is only used during shader creation now, so no need to keep it around afterwards. --- src/gallium/drivers/radeonsi/si_shader.c | 10 +- src/gallium/drivers/radeonsi/si_shader.h | 1 - 2 files changed, 5 insertions(+), 6 del

Re: [Mesa-dev] [PATCH] util/ralloc: Remove double zero'ing of rzalloc buffers

On 22.01.2016 16:02, Kenneth Graunke wrote: On Friday, January 22, 2016 12:09:18 PM PST Nicolai Hähnle wrote: On 22.01.2016 02:53, Jordan Justen wrote: Juha-Pekka found this back in May 2015: <1430915727-28677-1-git-send-email-juhapekka.heikk...@gmail.com> From the discussion, obv

Re: [Mesa-dev] gallium r300 driver for PowerPC

c14 in __libc_start_main (argc=, argv=, ev=, auxvec=, rtld_fini=0xb7fcfad0 <_dl_fini>, stinfo=, stack_on_entry=) at ../sysdeps/unix/sysv/linux/powerpc/libc-start.c:94 #19 0x0000 in ?? () (gdb) q On Dec 14, 2015, at 11:13 AM, Nicolai Hähnle <nhaeh...@gmail.com> wrote:

Re: [Mesa-dev] [PATCH 17/17] st/mesa: expose ARB_compute_shader when compute is supported

On 25.01.2016 10:04, Ilia Mirkin wrote: Yeah so this isn't going to fly. r600/radeonsi both expose PIPE_CAP_COMPUTE, for clover, but won't support these compute shaders quite yet. Not sure what the solution is here... maybe just add another cap? PIPE_CAP_GLSL_COMPUTE or something? Or require a

Re: [Mesa-dev] gallium r300 driver for PowerPC

. However, the block is still reachable, which usually indicates something that is not a genuine problem. It seems everything is working fine, so I still don't understand what you're worried about. Nicolai Sent from my iPhone On Jan 25, 2016, at 9:41 AM, Nicolai Hähnle <nhaeh...@gmail.com>

Re: [Mesa-dev] [PATCH 3/3] si-report.py: process Max Waves

For the series: Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> On 23.01.2016 11:07, Marek Olšák wrote: From: Marek Olšák <marek.ol...@amd.com> --- si-report.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/si-report.py b/si-report.py index 12e1

[Mesa-dev] [PATCH 2/2] gallium/ddebug: add 'verbose' option

From: Nicolai Hähnle <nicolai.haeh...@amd.com> This currently just writes out the name of dump files, which can be useful to easily correlate those files with other log outputs (driver debug output, apitrace calls, etc.) --- src/gallium/drivers/ddebug/dd_draw.c| 3 ++- src/gallium/d

[Mesa-dev] [PATCH 1/2] gallium/ddebug: make 'noflush' also affect 'always' mode

From: Nicolai Hähnle <nicolai.haeh...@amd.com> This changes the default behavior of 'always' mode to be consistent with hang detection mode. I have used this to more easily compare dumped command streams using diff. --- src/gallium/drivers/ddebug/dd_draw.c | 3 +++ src/gallium/drivers/

Re: [Mesa-dev] [PATCH] radeonsi: fix shader precompilation for shader-db

On 23.01.2016 11:04, Marek Olšák wrote: From: Marek Olšák <marek.ol...@amd.com> The addition of spi_shader_col_format killed all color outputs in precompiled shaders. Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> --- src/gallium/drivers/radeonsi/si_state_sh

[Mesa-dev] [PATCH] radeonsi: use llvm.amdgcn.s.barrier instead of llvm.AMDGPU.barrier.local

From: Nicolai Hähnle <nicolai.haeh...@amd.com> The new name for the intrinsic was introduced in LLVM r258558. --- src/gallium/drivers/radeonsi/si_shader.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/d

Re: [Mesa-dev] [PATCH 04/17] gallium: disable compute shaders for meta ops

On 24.01.2016 16:09, Samuel Pitoiset wrote: Loosely based on tessellation shaders. Do we actually need this? The graphics pipeline and the compute pipeline are separate; draw commands should be unaffected by the currently set compute shader. Or am I missing something? Cheers, Nicolai

Re: [Mesa-dev] [PATCH 2/2] radeonsi: implement SAMPLEPOS system value without a constant buffer load

Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> On 19.01.2016 20:39, Marek Olšák wrote: From: Marek Olšák <marek.ol...@amd.com> We always get per-sample input position. --- src/gallium/drivers/radeonsi/si_shader.c | 15 +-- 1 file changed, 13 insertions(+),

Re: [Mesa-dev] [PATCH 4/4] radeonsi: enable late VS allocation (v2)

Patches 1, 2 & 4 are Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> On 19.01.2016 20:20, Marek Olšák wrote: From: Marek Olšák <marek.ol...@amd.com> --- src/gallium/drivers/radeonsi/si_state.c | 21 +++-- 1 file changed, 19 insertions(+), 2 deletion

Re: [Mesa-dev] [PATCH 3/4] radeonsi: allow tessellation on CU1 and ES on CU0

On 19.01.2016 20:20, Marek Olšák wrote: From: Marek Olšák We don't use on-chip GS, so it's not required to reserve CU1 for ES. Why is a deadlock not possible with an off-chip GS ring? Nicolai --- src/gallium/drivers/radeonsi/si_state.c | 4 ++-- 1 file changed, 2

Re: [Mesa-dev] [PATCH 1/2] radeonsi: add max waves / CU to shader stats

e kernel starts using traps, we need to remember to conditionally add 16 here. Right now that's irrelevant. Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> + else + max_waves = MIN2(max_waves, 512 / conf->num_sgprs); + }

[Mesa-dev] [PATCH] radeonsi: add DCC buffer for sampler views on new CS

From: Nicolai Hähnle <nicolai.haeh...@amd.com> This fixes a VM fault and possible lockup in high memory pressure situations. Cc: "11.0 11.1" <mesa-sta...@lists.freedesktop.org> --- src/gallium/drivers/radeonsi/si_descriptors.c | 33 +++ 1 file

Re: [Mesa-dev] [PATCH] radeonsi: use llvm.amdgcn.s.barrier instead of llvm.AMDGPU.barrier.local

On 26.01.2016 06:55, Marek Olšák wrote: On Mon, Jan 25, 2016 at 10:49 PM, Nicolai Hähnle <nhaeh...@gmail.com> wrote: From: Nicolai Hähnle <nicolai.haeh...@amd.com> The new name for the intrinsic was introduced in LLVM r258558. --- src/gallium/drivers/radeonsi/si_shader.c | 7

Re: [Mesa-dev] [PATCH 17/17] st/mesa: expose ARB_compute_shader when compute is supported

On 25.01.2016 23:45, Ilia Mirkin wrote: On Mon, Jan 25, 2016 at 11:00 PM, Michel Dänzer <mic...@daenzer.net> wrote: On 26.01.2016 01:17, Nicolai Hähnle wrote: On 25.01.2016 10:04, Ilia Mirkin wrote: Yeah so this isn't going to fly. r600/radeonsi both expose PIPE_CAP_COMPUTE, for

[Mesa-dev] [PATCH] gallium: fix the documentation of PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE

From: Nicolai Hähnle <nicolai.haeh...@amd.com> This parameter is equivalent to the corresponding OpenGL implementation limit which is in texels, not bytes. --- Based on a discussion in IRC; I plan to push it with the rest of the series on PBO uploads. src/gallium/docs/source/screen.r

Re: [Mesa-dev] [PATCH] gallium: make image views non-persistent objects

On 18.01.2016 22:08, Ilia Mirkin wrote: Make them akin to shader buffers, with no refcounting/etc. Just used to pass data about the bound image in ->set_shader_images. Signed-off-by: Ilia Mirkin --- I don't really see a reason why these were refcounted objects. It seems

Re: [Mesa-dev] [PATCH 1/9] gallium: Add PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY

On 19.01.2016 10:45, Fredrik Höglund wrote: On Tuesday 19 January 2016, Nicolai Hähnle wrote: On 18.01.2016 18:50, Ilia Mirkin wrote: On Mon, Jan 18, 2016 at 5:22 PM, Nicolai Hähnle <nhaeh...@gmail.com> wrote: diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.c b/src/gallium/d

Re: [Mesa-dev] [PATCH 1/4] radeonsi: allow using all CUs for tessellation and on-chip GS (v2)

This series is Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> On 22.01.2016 09:18, Marek Olšák wrote: From: Marek Olšák <marek.ol...@amd.com> v2: After more discussion with hw teams, the kernel already contains the optimal settings allowing us to use all CUs. ---

Re: [Mesa-dev] [PATCH] util/ralloc: Remove double zero'ing of rzalloc buffers

eader)); + void *block = + always_allocate_zeroed_memory ? + calloc(1, size + sizeof(ralloc_header)) : + malloc(size + sizeof(ralloc_header)); There's an integer overflow here which would be good to fix. Since it was there already in the older version, the patch is Rev

Re: [Mesa-dev] [PATCH 00/10] vbo: introduce a minmax_index cache (v3)

On 11.01.2016 21:32, Nicolai Hähnle wrote: here is a new version of the series. I'm calling it v3 even though I never sent v2 because it contains v3 of the main patch. Changes relative to v1: - disable cache on USAGE_TEXTURE_BUFFER and bool/GLboolean nit - disable cache only temporarily when

[Mesa-dev] [PATCH 2/2] draw: use util_pstipple_* function for stipple pattern textures and samplers

From: Nicolai Hähnle <nicolai.haeh...@amd.com> This reduces code duplication. Suggested-by: Jose Fonseca <jfons...@vmware.com> --- src/gallium/auxiliary/draw/draw_pipe_pstipple.c | 121 +++- src/gallium/auxiliary/util/u_pstipple.c | 4 +- src/gallium/au

[Mesa-dev] [PATCH 1/2] draw: use util_pstipple_create_fragment_shader

From: Nicolai Hähnle <nicolai.haeh...@amd.com> This reduces code duplication. It also adds support for drivers where the fragment position is a system value. Suggested-by: Jose Fonseca <jfons...@vmware.com> --- A basic polygon stippling test shows no regression on llvmpipe, but that'

[Mesa-dev] [PATCH v2 4/9] st/mesa: Accelerate PBO uploads

From: Fredrik Höglund <fred...@kde.org> Create a PIPE_BUFFER sampler view on the pixel-unpack buffer, and draw the image on the texture with a fragment shader that maps fragment coordinates to buffer coordinates. Modifications by Nicolai Hähnle: - various cleanups and fixes (e.g. error ha

[Mesa-dev] [PATCH v2 5/9] st/mesa: implement PBO upload for multiple layers

From: Nicolai Hähnle <nicolai.haeh...@amd.com> Use instancing to generate two triangles for each destination layer and use a geometry shader to route the layer index. v2: - directly write layer in VS if supported by the driver (Marek Olšák) --- src/mesa/state_tracker/st_cb_texture.c

[Mesa-dev] [PATCH v2 7/9] st/mesa: redirect CompressedTexSubImage to our own implementation

From: Nicolai Hähnle <nicolai.haeh...@amd.com> This is where PBO upload will go. --- src/mesa/state_tracker/st_cb_texture.c | 24 ++-- 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/src/mesa/state_tracker/st_cb_texture.c b/src/mesa/state_t

[Mesa-dev] [PATCH v2 3/9] st/mesa: use the correct address generation functions in st_TexSubImage blit

From: Nicolai Hähnle <nicolai.haeh...@amd.com> We need to tell the address generation functions about the dimensionality of the texture to correctly implement the part of Section 3.8.1 (Texture Image Specification) of the OpenGL 2.1 specification which says: "For the purposes

[Mesa-dev] [PATCH v2 8/9] st/mesa: implement PBO upload for glCompressedTex(Sub)Image

From: Nicolai Hähnle <nicolai.haeh...@amd.com> v2: - use st->pbo_upload.enabled flag --- src/mesa/state_tracker/st_cb_texture.c | 115 + 1 file changed, 115 insertions(+) diff --git a/src/mesa/state_tracker/st_cb_texture.c b/src/mesa/stat

[Mesa-dev] [PATCH v2 1/9] gallium: Add PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY

From: Nicolai Hähnle <nicolai.haeh...@amd.com> This cap indicates that the driver only supports R, RG, RGB and RGBA formats for PIPE_BUFFER sampler views. v2: move into "unsupported features" section for nouveau (Ilia Mirkin) --- src/gallium/docs/source/screen.rst

[Mesa-dev] [PATCH v2 0/9] st/mesa: accelerate texture uploads from PBOs

Hi everybody, here's an updated version of the series. I decided to keep BUFFER_SAMPLER_VIEW_RGBA_ONLY as is, following Fredrik's point that it affects not only the sampler swizzle but also the texture format itself. The major functionality changes are that we now try to fulfill larger

[Mesa-dev] [PATCH v2 2/9] gallium: Add PIPE_CAP_SURFACE_REINTERPRET_BLOCKS

From: Nicolai Hähnle <nicolai.haeh...@amd.com> This cap indicates whether pipe->create_surface can reinterpret a texture as a surface with a format of different block width/height (but equal block size). v2: fix whitespace --- src/gallium/docs/source/screen.rst | 7 +++

[Mesa-dev] [PATCH v2 6/9] st/mesa: inline the implementation of _mesa_store_compressed_teximage

From: Nicolai Hähnle <nicolai.haeh...@amd.com> We will write our own version of texsubimage for PBO uploads, and we will want to call that here as well. --- src/mesa/state_tracker/st_cb_texture.c | 28 +++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git

Re: [Mesa-dev] [PATCH 00/10] vbo: introduce a minmax_index cache (v3)

On 22.01.2016 15:17, Marek Olšák wrote: On Fri, Jan 22, 2016 at 6:17 PM, Nicolai Hähnle <nhaeh...@gmail.com> wrote: On 11.01.2016 21:32, Nicolai Hähnle wrote: here is a new version of the series. I'm calling it v3 even though I never sent v2 because it contains v3 of the main patch. C

Re: [Mesa-dev] [PATCH] winsys/amdgpu: optionally use buffer lists with all allocated buffers

On 22.01.2016 15:19, Marek Olšák wrote: From: Marek Olšák <marek.ol...@amd.com> Set RADEON_ALL_BOS=1 to use it. Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> --- src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 21 + src/gallium/winsys/amdgpu/drm

Re: [Mesa-dev] [PATCH 1/1] configure: Bail out on llvm-config component error

ve the right answer when llvm is a built as a +1 for making the build process more user-friendly. Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] st/mesa: new st_DrawAtlasBitmaps() function for drawing bitmap text

code refactoring, the vertex definition code could probably be shared. Except for the potential (trivial) interaction with my comments on the first patch, this is Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> --- src/mesa/state_tracker/st_cb_bitmap.c

Re: [Mesa-dev] [PATCH 1/2] mesa: implement a display list / glBitmap texture atlas

On 12.02.2016 20:07, Brian Paul wrote: This improves the performance of applications which use glXUseXFont() or wglUseFontBitmaps() and glCallLists() to draw bitmap text. Basically, we collect all the glBitmap images from the display lists and put them into a texture atlas. To render the

Re: [Mesa-dev] [PATCH] glsl: reject explicit location on atomic counter uniforms

On 12.02.2016 17:53, Timothy Arceri wrote: On Thu, 2016-02-11 at 20:10 -0500, Ilia Mirkin wrote: This fixes dEQP-GLES31.functional.uniform_location.negative.atomic_fragment dEQP-GLES31.functional.uniform_location.negative.atomic_vertex Both of which have lines like layout(location = 3,

Re: [Mesa-dev] [PATCH 1/2] mesa: implement a display list / glBitmap texture atlas

On 15.02.2016 11:31, Brian Paul wrote: On 02/15/2016 08:45 AM, Nicolai Hähnle wrote: On 12.02.2016 20:07, Brian Paul wrote: This improves the performance of applications which use glXUseXFont() or wglUseFontBitmaps() and glCallLists() to draw bitmap text. Basically, we collect all

[Mesa-dev] [PATCH] st/mesa: count shader images in MaxCombinedShaderOutputResources

From: Nicolai Hähnle <nicolai.haeh...@amd.com> --- This is on top of Ilia's Gallium images series. Ilia, I think it makes sense for you to include this in your initial push if you agree. src/mesa/state_tracker/st_extensions.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sr

Re: [Mesa-dev] [PATCH 09/25] radeonsi: add code for combining and uploading shaders from 3 shader parts

pilog->rodata_size); Strictly speaking it should be possible for main to have rodata if there is a prolog but no epilog, right? In any case, patches 1-9 are Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> + r600_resource_re

Re: [Mesa-dev] [PATCH 11/25] radeonsi: first bits for non-monolithic shaders

like max parameters plus attributes. Can you replace it by the appropriate defines? Apart from this, patches 10-11 are Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> unsigned i, last_array_pointer, last_sgpr, num_params; + unsigned num_returns = 0; v2i32 =

Re: [Mesa-dev] [PATCH 12/25] radeonsi: add VS prolog

On 15.02.2016 18:59, Marek Olšák wrote: From: Marek Olšák This is disabled with use_monolithic_shaders = true. --- src/gallium/drivers/radeonsi/si_pipe.c | 19 +++ src/gallium/drivers/radeonsi/si_pipe.h | 3 + src/gallium/drivers/radeonsi/si_shader.c | 236

Re: [Mesa-dev] [PATCH 09/25] radeonsi: add code for combining and uploading shaders from 3 shader parts

On 16.02.2016 11:10, Marek Olšák wrote: On Tue, Feb 16, 2016 at 4:53 PM, Nicolai Hähnle <nhaeh...@gmail.com> wrote: On 15.02.2016 18:59, Marek Olšák wrote: From: Marek Olšák <marek.ol...@amd.com> --- src/gallium/drivers/radeonsi/si_shader.c | 35 ---

Re: [Mesa-dev] [PATCH 13/25] radeonsi: add VS epilog

On 15.02.2016 18:59, Marek Olšák wrote: From: Marek Olšák It only exports the primitive ID. Also used by TES when it's compiled as VS. The VS input location of the primitive ID input is v2. So the reason for having two unused outputs/return values of the main VS is so

Re: [Mesa-dev] [PATCH 14/25] radeonsi: add TCS epilog

On 15.02.2016 18:59, Marek Olšák wrote: From: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.c | 1 + src/gallium/drivers/radeonsi/si_pipe.h | 1 + src/gallium/drivers/radeonsi/si_shader.c | 163 ---

Re: [Mesa-dev] [PATCH 16/25] radeonsi: add PS prolog

So, patches 12-16 also look good to me except for the comments I've sent on 12-14. I'm a bit worried though that there is a lot of "almost code duplication" around the handling of input and output positions etc., and maintaining the two different code paths for monolithic and non-monolithic

Re: [Mesa-dev] [PATCH 21/25] radeonsi: use smaller types for some si_shader members

rface_vgpr_index; - unsignedvs_output_param_offset[PIPE_MAX_SHADER_OUTPUTS]; + ubyte vs_output_param_offset[40]; Magic number - please replace with an appropriate #define or at least explain. Apart from that, patches 17-21: Reviewed-by: Nic

Re: [Mesa-dev] [PATCH 25/25] radeonsi: implement binary shaders & shader cache in memory

On 15.02.2016 18:59, Marek Olšák wrote: From: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.c | 5 +- src/gallium/drivers/radeonsi/si_pipe.h | 16 ++ src/gallium/drivers/radeonsi/si_shader.h| 4 +-

Re: [Mesa-dev] [PATCH 24/25] gallium/radeon: remove unused radeon_shader_binary_free_* functions

Patches 22-24 are also Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> Very nice series overall! On 15.02.2016 18:59, Marek Olšák wrote: From: Marek Olšák <marek.ol...@amd.com> --- src/gallium/drivers/radeon/radeon_elf_util.c | 19 --- src/gallium/dr

Re: [Mesa-dev] [PATCH 11/25] radeonsi: first bits for non-monolithic shaders

On 16.02.2016 11:39, Marek Olšák wrote: On Tue, Feb 16, 2016 at 5:01 PM, Nicolai Hähnle <nhaeh...@gmail.com> wrote: On 15.02.2016 18:59, Marek Olšák wrote: From: Marek Olšák <marek.ol...@amd.com> --- src/gallium/drivers/radeonsi/si_pipe.c | 1 + src/gallium/drivers/radeon

Re: [Mesa-dev] [PATCH] mesa: implement a display list / glBitmap texture atlas

Nicolai Hähnle: - check the max tex rect size is at least 1024. - add comment in dd.h that texture_rectangle is required. - in _mesa_DeleteLists(), try to delete the atlas before the list(s) Thanks! Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> --- src/mesa/main/dd.h | 9 ++

[Mesa-dev] [PATCH] st/mesa: disable depth/stencil/alpha tests in PBO upload

From: Nicolai Hähnle <nicolai.haeh...@amd.com> Noticed by Brian Paul. --- src/mesa/state_tracker/st_cb_texture.c | 8 1 file changed, 8 insertions(+) diff --git a/src/mesa/state_tracker/st_cb_texture.c b/src/mesa/state_tracker/st_cb_texture.c index d09c360..8ee95d2 100644 ---

Re: [Mesa-dev] [PATCH] st/mesa: fix pbo uploads

ampler view Fine by me. Honestly, I'd prefer to relax the requirements for TXF/buffer textures, but if that's difficult for Nouveau I can accept it. Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> This makes PBO uploads work again on nouveau. Signed-off-by: Ilia Mirkin <imir.

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