hi randy,
the sync outputs from the adc yellow block are a copy of
the signal that is injected into the adc's sync input SMA connector.
(in your case, the 1 PPS signal). all four syncs are identical.
to know which adc sample is taken on the 1 second tick, one needs to
calibrate by looking at a known source on the sky, or by coupling
the 1 PPS signal into the analog input. this offset can change everytime
the boards are powered up (there is a divide by four counter in the adc).
best wishes,
dan
On 3/4/2010 11:06 AM, Randy Mccullough wrote:
Given the following scenario...
A high speed sampler comprised of...
1 iBOB with logic fabric running at 200MHz, derived from ADC0
1 ADC2x1000-8 operating in its interleaved mode with an 800MHz
sampling clock
1 1PPS Site Timing Reference applied to the ADC's SYNC IN
Is it possible, using the four SYNC outputs of the ADC block, to
ascertain which of the 8 samples presented during a logic clock
cycle was most closely aligned with an in-coming 1PPS signal?
Randy
