Hi, Le Fri, 29 Oct 2010 10:07:51 +0800, Adam Wang <[email protected]> a écrit : > * Add notch to mark pin 1 of J3 on silkscreen > > Changed, also J5.
OK > * Use red, green and blue connectors for J18 > > SCP662CNS257U00G<http://downloads.qi-hardware.com/hardware/milkymist_one/datasheet/VideoIn/SCP662CNS257U00G.pdf> > is > now for this. OK (I haven't carefully checked the dimensions though...) > * We might want a larger soldered area under the pads of U10 > > To improve this, used several GND via instead of "cross" pad on GND > plate to let heat conducted on both top / bottom GND plate to get > good dissipation. Also changed U13's cross to have a bigger GND plate. I was talking about having a look at the solder area under the normal pads (not the thermal pad) which seems a bit small for me, but perhaps it is OK. You can leave the bigger thermal pad, it won't hurt though it isn't absolutely necessary (the board does not dissipate a lot...) unless someone connects some extension that sucks a lot of power of course :) > * Indicate "+/- 5%" and pinout (positive in the middle) near J11 on > silkscreen > > Added, but may add an icon of positive dot and negative ring. OK > * To reduce audio output noise, power the LM4550 analog supply > through an additional TPS76301 set to 4.3V. > > Added part circuits of U23. It's placed near to J12. OK > * In order to be able to detect board revisions, route 4 FPGA I/O > pins to placeholders for 0402 pull-up resistors. The combination of > placed and non-placed resistors encodes the board revision. The RC2 > board should be encoded as 0001 (ie place only 1 resistor) to > distinguish it from RC1 which does not have any resistor. Use 1K > resistors for pull-ups. R176/177/178/179 are placed in a row on Top. OK > * FPGA decoupling: place the 0402 1V2 capacitors closer to the center. > The larger 0805 capacitors can go further away from the center. For > example, C53 and C54 should be moved somewhere else and their current > position taken by 0402 capacitors. Move as many 0402 1V2 capacitors > as possible under the FPGA and close to the center. > > Even though can not implement well above to move all 1V2 capacitors > close to center. RC1 even shares 2 ~ 6 pins on one via on 1V2 > power/gnd and got work well. Yes, it was bad. But the newest RC2 > routing gets good power/gnd driving capability more than RC1 > definitely. Right now the capacitors placed surrounding center area. OK, current capacitor placement seems good to me. > * Add more and bigger decoupling capacitors and more power vias > around the SDRAM > * You do not need to add that many 100uF capacitors on the DRAM. It's > mostly high frequency noise that we are filtering. Use only one extra > 100uF per chip instead of 4. > > Finally added C240/C248/C242/C243/C244/C245/C250/C251/C252. Forgot to > delete C247, will delete C247. OK > * Use several vias to connect decoupling capacitors whenever possible, > especially the big ones (>= 10uF) > > Modified on each 100uF capactiors. > > * I can't find the footprint "SO8-10-2.54" for the optoisolator in > MilkymistOne.PcbLib - please add it. Also, link the footprint in > MilkymistOne.SchLib like it's done for other parts. > > Added and linked. Please remove the text "U6" from the PCB footprint, it does not belong there. > > * What is the reference document you used for making the optoisolator > PCB footprint (so I can check it)? Is it the Fairchild datasheet that > you've linked in the BoM? In this case I need to update the > milkymist-datasheets repository that contains a datasheet for Vishay > parts with different footprints. > > Used SMDIP-B of http://www.fairchildsemi.com/ds/6N/6N138.pdf > The dimension I checked it 's correct, you can confirm it again. Confirmed > * change the inner diameter of 4 mechanical through holes on board > from 3 to 3.2mm. > > Done. OK > * All 0402 footprint changed to be same as > http://en.qi-hardware.com/wiki/File:0603_0402_stencil_aperture_dimension.png OK, just double check that Altium is using the updated PCB footprint from the library everywhere. By the way, I can't recompile MilkymistOne.LibPkg, and MilkymistOne.SchLib does not match the schematics (see the USB connector for example). It seems you have changed the schematics symbols through another means than MilkymistOne.SchLib and forgot to update the library. Please fix this. > * Other discovery: According to p27 of LM4550B data sheet, R1 is not > required for the LM4550B. Addition of > this resistor will slightly increase the temperature coefficient of > the internal bandgap reference and slightly decrease the THD > performance, but overall performance will still be better than the > LM4550. Or ref. to p10 of http://www.national.com/an/AN/AN-1528.pdf > So I'll DNP R1. Nice catch! Thanks, S. _______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkym...@freenode Twitter: www.twitter.com/milkymistvj
