At 10:53 AM 3/8/2010, you wrote:
I am using Elecric-8.11 Here is the extarcted SPICE netlist of the
inverter "inv_1x{lay}" of "muddlib07" library downloaded from
<http://www.staticfreesoft.com/productsLibraries.html>http://www.staticfreesoft.com/productsLibraries.html
which is "standard cell library" of 32-bit MIPS Microprocessor
designed by students of Harvey Mudd College:
*** SPICE deck for cell inv_1x{lay} from library muddlib07
*** Created on Thu Nov 16, 2006 08:36:32
*** Last revised on Wed Apr 25, 2007 18:38:24
*** Written on Mon Mar 08, 2010 23:10:57 by Electric VLSI Design System,
*version 8.11
*** Layout tech: mocmos, foundry MOSIS
*** UC SPICE *** , MIN_RESIST 4.0, MIN_CAPAC 0.1FF
.OPTIONS NOMOD NOPAGE
.options parhier=local
*** Lambda Conversion ***
.opt scale=0.3U
*** TOP LEVEL CELL: inv_1x{lay}
mn...@0 y a gnd gnd N L=2 W=7 AS=67 AD=42.5 +PS=56 PD=27
mp...@0 y a vdd vdd P L=2 W=10 AS=82 AD=42.5 +PS=62 PD=27
.END
It seems that Electric donot uses the standard AS/AD and PS/PD
formulas i.e. AS/AD = W x Length of drain/source and PS/PD =
2(Length of drain/source) + W. What formulas Electric uses to
calculate AS/AD and PS/PD? How is it possible that AD and PD of PMOS
and NMOS are equal while PMOS is larger than NMOS?
Many people are asking how Electric calculates the simple parasitics
(AS/AD). The answer is that it looks at the Active areas connected
to the transistor (but NOT including the area of the actual
transistor). When multiple transistors connect to a common Active
area, that area is divided by the number of transistors connected.
-Steven Rubin
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