The simple answer is that you need to provide creepage and clearance distances in secondary circuits to avoid arcing when the circuit is subjected to the absolute worst case surges and transients that the circuit might see. Since this can be difficult to determine, most people just use the tables found in the standard. These tables are also found in the IP Standards used by PCB CAD programs.
Notice that Table 6 says, "circuits derived from Mains", which means circuits that are or can be affected by commonly known surges and transients on the AC Mains. These tables are created as a guide to take some of the guess work and testing out of the equation. Circuits that are highly isolated or independently generated may not be subject to junk that gets onto the AC Mains. But keep in mind that there are some transients, such as from relays, solenoids, switch contacts, etc. that can be quite strong in a local circuit, so you must be careful not to underdesign. I think the old version of the 61010-1 standard had an equation that took into account the maximum transient overvoltage, but I think that has now been integrated into Table 6 in Ed. 3 of the standard. If you can run tests on your secondary circuits and can determine the worst case surges and transients, you can design to those distances. Also keep in mind the use of PCB coatings, potting, pollution degree, etc.. Inner layers of a PCB can have closer trace distances in most cases. Good luck and have fun with it. The Other Brian On Thu, Dec 1, 2022 at 3:51 PM Steve Brody <sgbr...@comcast.net> wrote: > I have a client who has a secondary pwb that has traces and vias that may > have 100 vdc on them adjacent to ground. > > Per 61010-1 there is a requirement for spacing and/or dielectric test, > both depending on what the mains voltage is. > > The question is why is the mains voltage a consideration or concern if the > 100vdc secondary voltage is several layers of impedance and circuitry from > the mains? > > Is it a concern that a surge on the mains would trickle down to the > secondary circuit, or is there another reason/rationale? > > I suggested that a dielectric test per Table 6 [in A1] would suffice and > put the issue to rest for this product, but the question from the designers > remains as to why is it a concern in the standard of what the mains voltage > is. > > Is there anything in the standard, that I haven't found, that does not > require Table 6 to be followed if there is no way for a mains surge to > impact the secondary voltage? > > I look to the experts for an explanation. > > Thanks, > > Steve Brody > sgbr...@comcast.net > C - 603 617 9116 > - > ---------------------------------------------------------------- > > This message is from the IEEE Product Safety Engineering Society emc-pstc > discussion list. To post a message to the list, send your e-mail to < > emc-p...@ieee.org> > > All emc-pstc postings are archived and searchable on the web at: > http://www.ieee-pses.org/emc-pstc.html > > Website: http://www.ieee-pses.org/ > Instructions: http://www.ieee-pses.org/list.html (including how to > unsubscribe) <http://www.ieee-pses.org/list.html> > List rules: http://www.ieee-pses.org/listrules.html > > For help, send mail to the list administrators: > Mike Cantwell <mcantw...@ieee.org> > > For policy questions, send mail to: > Jim Bacher <j.bac...@ieee.org> > David Heald <dhe...@gmail.com> > ------------------------------ > > To unsubscribe from the EMC-PSTC list, click the following link: > https://listserv.ieee.org/cgi-bin/wa?SUBED1=EMC-PSTC&A=1 > - ---------------------------------------------------------------- This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. To post a message to the list, send your e-mail to <emc-p...@ieee.org> All emc-pstc postings are archived and searchable on the web at: http://www.ieee-pses.org/emc-pstc.html Website: http://www.ieee-pses.org/ Instructions: http://www.ieee-pses.org/list.html (including how to unsubscribe) List rules: http://www.ieee-pses.org/listrules.html For help, send mail to the list administrators: Mike Cantwell <mcantw...@ieee.org> For policy questions, send mail to: Jim Bacher: <j.bac...@ieee.org> David Heald: <dhe...@gmail.com> _________________________________________________ To unsubscribe from the EMC-PSTC list, click the following link: https://listserv.ieee.org/cgi-bin/wa?SUBED1=EMC-PSTC&A=1
