On Fri, 4 Apr 2008, Jon Elson wrote:
> Date: Fri, 04 Apr 2008 11:46:04 -0600
> From: Jon Elson <[EMAIL PROTECTED]>
> Reply-To: "Enhanced Machine Controller (EMC)"
> <[email protected]>
> To: [EMAIL PROTECTED],
> "Enhanced Machine Controller (EMC)" <[email protected]>
> Subject: Re: [Emc-users] Another Mesa question
>
> Ray Henry wrote:
>> Hi Eric
>>
>> I've tried all sorts of things with this problem of unknown pin
>> condition during PC start and stop and came to the personal conclusion
>> that there is nothing short of a charge pump that I can be absolutely
>> certain of.
>>
> I went to great lengths in my boards to prevent this kind of
> problem. The outputs can only be enabled when the E-stop
> circuit is in the OK mode. There is a watchdog timer that
> command an E-stop if the computer is not updating the board
> continuously. And, there is a power-on reset that puts it in
> E-stop.
>
> When EMC starts up, it begins writing new velocity commands (of
> zero when it is not yet in "machine-on" state) to the board.
> That satisfies the watchdog timer, so then EMC can call for it
> to come out of E-stop.
>
> Jon
The 5I20 is no different, At power up or PC reset, the I/O pins are in
a defined state (all high) and will not change until the FPGA is programmed
and EMC enables the outputs. This all high state disables all 7I33/7I65 analog
outputs and Opto22 or 7I37 output switches. In addition the HostMot Firmware
has a watchdog that can disable analog outputs (Its sets Enables false and
PWMs off at timeout). The current (HostMot) watchdog does not affect the GPIO
pins but new HostMot2s watchdog also controls the GPIO pins so a timeout will
restore all IO to the startup state (and set a flag indicating that the
watchdog has bitten)
I think Erics problem has to do with the desired GPIO bit state at
startup (looks like he wants low at startup), which will require either an
inverter or a changing the pullup resistors to pulldown resistors to change
the startup GPIO state from high to low.
Peter Wallace
Mesa Electronics
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