At 01:52 AM 5/18/01 -0700, Dwight Harm wrote:
>A DRC question/problem...
>I've built a thermal dissipation area. Top & bottom layers are polygon
>pours; I have two internal planes, which were already split, so I had to
>add a third split to each for the thermal pads. I tried to follow the
>help file directions, wrapping the boundary of one split around the
>other. The four layers are 'stapled' with a series of vias. The device
>is SM, and its pad is in the center of the top-layer polygon. The net
>only contains that single pin. The polygons, planes, and vias are all
>assigned the same net.
I'm going to flesh the description out. Mr Harm will correct me if I get it
wrong. He wants copper on four layers to be thermally connected to a pad on
the top side. He doesn't really care about electrical connection, except
that a copper thermal connection will also conduct. Further, I don't know a
way to make a hole connect to an inner plane without making it have the
same net as the plane or split plane through which it passes. So, because
he wanted inner plane connections, he assigned a net to the heat transfer
pad on the device, and likewise the same net to the other primitives he
mentions.
I would presume that he would also set all vias connection to this inner
copper to direct-connect, since he does not want thermal relief.
The necessity for this dummy net is driven by the requirements of inner
planes, which are calculated planes, you can't directly control copper on
those planes except to remove it. This is not the case with positive
layers, where you can make whatever pattern you want. When inner planes
will not behave as desired, or nested split planes are required, make the
whole layer a positive layer and use copper pour to fill it.
As has been pointed out, Protel does not recognise nested split planes,
even though a nested plane is completely and fully specified, it is not
ambiguous. Where one split is entirely contained within another, it is no
more ambiguous than is any split plane which is contained within the mail
layer plane. It just takes a bit more math to figure out if the boundaries
overlap. If the boundaries overlap, *then* there will be ambiguity. Protel
should fix this. It is quite common to need an island of a different net
within a split plane. Right now we are forced to use copper pours for this.
>Now when I run DRC, I get:
>
>Processing Rule: Broken-Net constraint (on the board)
> Violation: Net FET-pad-A
> Warning - Connection to overlapping split planes.
I think this is just an artifact of how Protel classifies possible broken
nets which may have been created by a split plane overlap. The most likely
explanation for the message is that you have split planes overlapping, like
it says. If one plane is contained within another, it is overlapping as far
as Protel is concerned. If the boundaries cross at any place, it is
overlapping.
But there may be something else happening here. I just did a fair amount of
experimenting with the behavior of split planes when they overlap and when
they are close to overlapping. I was not happy with what I found. I was
able to create a short between two adjacent split planes using a through
pad that was assigned to one of them. thermal reliefs were generated for
the pad, including the portion of the pad which extended into the split
with a different net name.
I'm going to post a file in the filespace for
[EMAIL PROTECTED] for comment. This is a list which is
being used for a database and living FAQ about protel "issues." That's a
polite term for "bugs," though, to be fair, it also includes suggestions
for improvement. For the time being, however, please comment here if you
have time to look at this file, please don't use that list for discussion.
(The list procedures are under discussion on the Association list,
[EMAIL PROTECTED])
the URL for the filespace is
http://groups.yahoo.com/group/protel-users-issues/files/
and the filename is
"split plane short.pcb"
This is an attempt at a URL to download the file, but if it doesn't work
you can go to the filespace as above. The filespace should be set for
public access.
http://groups.yahoo.com/group/protel-users-issues/files/split%20plane%20short.zip
[EMAIL PROTECTED]
Abdulrahman Lomax
P.O. Box 690
El Verano, CA 95433
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