AMD General Hi,
> -----Original Message----- > From: Jiang, Haochen <[email protected]> > Sent: 21 July 2026 12:37 > To: Sharma, Dipesh <[email protected]>; [email protected] > Cc: Liu, Hongtao <[email protected]>; [email protected]; > [email protected]; Kumar, Venkataramanan > <[email protected]> > Subject: RE: [PATCH v2 7/7] [X86]: Add Sub-byte element extration and > Symmetric-signed saturation narrow support. > > Caution: This message originated from an External Source. Use proper > caution when opening attachments, clicking links, or responding. > > > > From: Dipesh Sharma <[email protected]> > > Sent: Monday, July 20, 2026 2:25 AM > > > > diff --git a/gcc/config/i386/i386-expand.cc > > b/gcc/config/i386/i386-expand.cc index aea2ac7b31a..e9b9b2c9ff5 100644 > > --- a/gcc/config/i386/i386-expand.cc > > +++ b/gcc/config/i386/i386-expand.cc > > @@ -13572,6 +13575,12 @@ ix86_expand_args_builtin (const struct > > builtin_description *d, > > error ("the last argument must be a 5-bit immediate"); > > return const0_rtx; > > > > + case CODE_FOR_vunpackbv16qi_mask: > > + case CODE_FOR_vunpackbv32qi_mask: > > + case CODE_FOR_vunpackbv64qi_mask: > > + error ("the last argument must be a 5-bit immediate in > > + range > > 8-63"); > > + return const0_rtx; > > + > > We could check more strictly here with more logic here, i.e., > > if ((icode == CODE_FOR_avx10_2_vunpackbv16qi_mask) > || (icode == CODE_FOR_avx10_2_vunpackbv32qi_mask) > || (icode == CODE_FOR_avx10_2_vunpackbv64qi_mask)) > { > char val = INTVAL (op); > if ((val & 0xc0) > || (!(val & 0x18)) > || ((val & 0x02) && ((val & 0x1c) != 0x08)) > || ((val & 0x01) && (((val & 0x1c) >> 2) > 0x4))) > { > error ("the last argument must not use reserved value > immediate"); > return const0_rtx; > } > } > > I put them in default, but maybe putting in case like your handle is better. > You could still keep a less strict operand predicate in pattern since all the > call > need to pass i386-expand.cc. I think adding a predicate is better, I'll update the error message. > > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index > > 6fd38e9273b..901da35bef9 100644 > > --- a/gcc/config/i386/sse.md > > +++ b/gcc/config/i386/sse.md > > @@ -34528,3 +34530,150 @@ > > > > +;; VPMOVSSDB - Symmetric signed saturation narrow (32-bit to 8-bit) > > + > > +(define_mode_iterator VPMOVSSDB_PART [V4SI V8SI]) > > +(define_mode_iterator VPMOVSSDB_MODES [V4SI V8SI V16SI]) > > +(define_mode_attr pmovssdb_out > > + [(V4SI "V4QI") (V8SI "V8QI") (V16SI "V16QI")]) (define_mode_attr > > +pmovssdb_pad > > + [(V4SI "V12QI") (V8SI "V8QI")]) > > +(define_mode_attr pmovssdbmask > > + [(V4SI "QI") (V8SI "QI") (V16SI "HI")]) > > + > > +(define_insn "*vpmovssdb<mode>" > > It is actually a symmetric truncate, could you refer to other truncate pattern > to refine your naming (maybe something like > avx10_2_sym_truncatev4siv4qi2) and patterns? At least make it clearer to > maintain just like I mentioned previously. Sure. > > Thx, > Haochen Thanks, Dipesh
