-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/943/
-----------------------------------------------------------

(Updated 2012-01-06 06:10:22.217839)


Review request for Default.


Summary
-------

MEM: Add port proxies instead of non-structural ports

Port proxies are used to replace non-structural ports, and thus enable
all ports in the system to correspond to a structural entity. This has
the advantage of accessing memory through the normal memory subsystem
and thus allowing any constellation of distributed memories, address
maps, etc. Most accesses are done through the "system port" that is
used for loading binaries, debugging etc. For the entities that belong
to the CPU, e.g. threads and thread contexts, they wrap the CPU data
port in a port proxy.

The following replacements are made:
FunctionalPort      > PortProxy
TranslatingPort     > SETranslatingPortProxy
VirtualPort         > FSTranslatingPortProxy


Diffs (updated)
-----

  configs/common/FSConfig.py 58885e2e8a88 
  configs/ruby/Ruby.py 58885e2e8a88 
  src/arch/alpha/freebsd/system.cc 58885e2e8a88 
  src/arch/alpha/linux/process.cc 58885e2e8a88 
  src/arch/alpha/linux/system.hh 58885e2e8a88 
  src/arch/alpha/linux/system.cc 58885e2e8a88 
  src/arch/alpha/linux/threadinfo.hh 58885e2e8a88 
  src/arch/alpha/remote_gdb.cc 58885e2e8a88 
  src/arch/alpha/stacktrace.cc 58885e2e8a88 
  src/arch/alpha/system.hh 58885e2e8a88 
  src/arch/alpha/system.cc 58885e2e8a88 
  src/arch/alpha/tru64/process.cc 58885e2e8a88 
  src/arch/alpha/tru64/system.cc 58885e2e8a88 
  src/arch/alpha/utility.cc 58885e2e8a88 
  src/arch/alpha/vtophys.hh 58885e2e8a88 
  src/arch/alpha/vtophys.cc 58885e2e8a88 
  src/arch/arm/linux/process.cc 58885e2e8a88 
  src/arch/arm/linux/system.cc 58885e2e8a88 
  src/arch/arm/process.cc 58885e2e8a88 
  src/arch/arm/stacktrace.cc 58885e2e8a88 
  src/arch/arm/system.hh 58885e2e8a88 
  src/arch/arm/system.cc 58885e2e8a88 
  src/arch/arm/utility.cc 58885e2e8a88 
  src/arch/arm/vtophys.cc 58885e2e8a88 
  src/arch/mips/linux/process.cc 58885e2e8a88 
  src/arch/mips/linux/system.cc 58885e2e8a88 
  src/arch/mips/linux/threadinfo.hh 58885e2e8a88 
  src/arch/mips/stacktrace.cc 58885e2e8a88 
  src/arch/mips/utility.cc 58885e2e8a88 
  src/arch/power/linux/process.cc 58885e2e8a88 
  src/arch/power/process.cc 58885e2e8a88 
  src/arch/sparc/linux/syscalls.cc 58885e2e8a88 
  src/arch/sparc/process.cc 58885e2e8a88 
  src/arch/sparc/solaris/process.cc 58885e2e8a88 
  src/arch/sparc/system.hh 58885e2e8a88 
  src/arch/sparc/system.cc 58885e2e8a88 
  src/arch/sparc/utility.cc 58885e2e8a88 
  src/arch/sparc/vtophys.cc 58885e2e8a88 
  src/arch/x86/bios/intelmp.hh 58885e2e8a88 
  src/arch/x86/bios/intelmp.cc 58885e2e8a88 
  src/arch/x86/bios/smbios.hh 58885e2e8a88 
  src/arch/x86/bios/smbios.cc 58885e2e8a88 
  src/arch/x86/linux/syscalls.cc 58885e2e8a88 
  src/arch/x86/linux/system.cc 58885e2e8a88 
  src/arch/x86/process.cc 58885e2e8a88 
  src/arch/x86/stacktrace.cc 58885e2e8a88 
  src/arch/x86/system.cc 58885e2e8a88 
  src/base/loader/elf_object.hh 58885e2e8a88 
  src/base/loader/elf_object.cc 58885e2e8a88 
  src/base/loader/hex_file.hh 58885e2e8a88 
  src/base/loader/hex_file.cc 58885e2e8a88 
  src/base/loader/object_file.hh 58885e2e8a88 
  src/base/loader/object_file.cc 58885e2e8a88 
  src/base/remote_gdb.cc 58885e2e8a88 
  src/cpu/checker/thread_context.hh 58885e2e8a88 
  src/cpu/inorder/cpu.hh 58885e2e8a88 
  src/cpu/inorder/cpu.cc 58885e2e8a88 
  src/cpu/inorder/resources/cache_unit.hh 58885e2e8a88 
  src/cpu/inorder/resources/cache_unit.cc 58885e2e8a88 
  src/cpu/inorder/thread_context.hh 58885e2e8a88 
  src/cpu/inorder/thread_context.cc 58885e2e8a88 
  src/cpu/o3/cpu.hh 58885e2e8a88 
  src/cpu/o3/cpu.cc 58885e2e8a88 
  src/cpu/o3/lsq.hh 58885e2e8a88 
  src/cpu/o3/lsq_impl.hh 58885e2e8a88 
  src/cpu/o3/thread_context.hh 58885e2e8a88 
  src/cpu/o3/thread_context_impl.hh 58885e2e8a88 
  src/cpu/ozone/cpu.hh 58885e2e8a88 
  src/cpu/ozone/cpu_impl.hh 58885e2e8a88 
  src/cpu/simple/atomic.hh 58885e2e8a88 
  src/cpu/simple/atomic.cc 58885e2e8a88 
  src/cpu/simple/timing.hh 58885e2e8a88 
  src/cpu/simple/timing.cc 58885e2e8a88 
  src/cpu/simple_thread.hh 58885e2e8a88 
  src/cpu/simple_thread.cc 58885e2e8a88 
  src/cpu/thread_context.hh 58885e2e8a88 
  src/cpu/thread_state.hh 58885e2e8a88 
  src/cpu/thread_state.cc 58885e2e8a88 
  src/dev/simple_disk.cc 58885e2e8a88 
  src/kern/tru64/tru64.hh 58885e2e8a88 
  src/kern/tru64/tru64_events.cc 58885e2e8a88 
  src/mem/SConscript 58885e2e8a88 
  src/mem/fs_translating_port_proxy.hh PRE-CREATION 
  src/mem/fs_translating_port_proxy.cc PRE-CREATION 
  src/mem/port.hh 58885e2e8a88 
  src/mem/port_proxy.hh PRE-CREATION 
  src/mem/port_proxy.cc PRE-CREATION 
  src/mem/ruby/system/RubyPort.cc 58885e2e8a88 
  src/mem/ruby/system/RubyPortProxy.hh PRE-CREATION 
  src/mem/ruby/system/RubyPortProxy.cc PRE-CREATION 
  src/mem/ruby/system/SConscript 58885e2e8a88 
  src/mem/ruby/system/Sequencer.py 58885e2e8a88 
  src/mem/se_translating_port_proxy.hh PRE-CREATION 
  src/mem/se_translating_port_proxy.cc PRE-CREATION 
  src/mem/translating_port.hh 58885e2e8a88 
  src/mem/translating_port.cc 58885e2e8a88 
  src/mem/vport.hh 58885e2e8a88 
  src/mem/vport.cc 58885e2e8a88 
  src/sim/arguments.hh 58885e2e8a88 
  src/sim/process.hh 58885e2e8a88 
  src/sim/process.cc 58885e2e8a88 
  src/sim/process_impl.hh 58885e2e8a88 
  src/sim/syscall_emul.hh 58885e2e8a88 
  src/sim/syscall_emul.cc 58885e2e8a88 
  src/sim/system.hh 58885e2e8a88 
  src/sim/system.cc 58885e2e8a88 
  src/sim/vptr.hh 58885e2e8a88 
  tests/configs/inorder-timing.py 58885e2e8a88 
  tests/configs/memtest.py 58885e2e8a88 
  tests/configs/o3-timing-mp.py 58885e2e8a88 
  tests/configs/o3-timing.py 58885e2e8a88 
  tests/configs/simple-atomic-mp.py 58885e2e8a88 
  tests/configs/simple-atomic.py 58885e2e8a88 
  tests/configs/simple-timing-mp-ruby.py 58885e2e8a88 
  tests/configs/simple-timing-mp.py 58885e2e8a88 
  tests/configs/simple-timing-ruby.py 58885e2e8a88 
  tests/configs/simple-timing.py 58885e2e8a88 

Diff: http://reviews.m5sim.org/r/943/diff


Testing
-------

util/regress all passing (disregarding t1000 and eio)


Thanks,

Andreas

_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev

Reply via email to