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Ship it!



src/mem/SimpleDRAM.py
<http://reviews.gem5.org/r/1927/#comment4150>

    Is 'burst length' a standard term for those who dabble with drams? May be 
the 
    comment can be expanded to explain what is meant by a burst.



src/mem/SimpleDRAM.py
<http://reviews.gem5.org/r/1927/#comment4151>

    Ok, I am confused here. What is the difference between a dram page and a 
    row buffer? It seems to me that you are assuming something more than what 
    has been stated here as 128 * 64 != 1024.



src/mem/SimpleDRAM.py
<http://reviews.gem5.org/r/1927/#comment4152>

    Assuming BL stands for burst length, can you explain why do we need this 
    to be fixed to 5ns and not make it a function of the burst length? 
    Secondly, why is this not a function of the clock frequency?



src/mem/SimpleDRAM.py
<http://reviews.gem5.org/r/1927/#comment4153>

    Now I am confident that some thing is wrong either with the comment 
    here or the one in DDR3's definition.



src/mem/simple_dram.cc
<http://reviews.gem5.org/r/1927/#comment4154>

    Typo in length. Actually, I was not aware that you can write comments after 
the if() statement without using braces.



src/mem/simple_dram.cc
<http://reviews.gem5.org/r/1927/#comment4155>

    Looking at how it is incremented, this was really shady.


- Nilay Vaish


On June 17, 2013, 4:13 a.m., Amin Farmahini wrote:
> 
> -----------------------------------------------------------
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/1927/
> -----------------------------------------------------------
> 
> (Updated June 17, 2013, 4:13 a.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> -------
> 
> This patch gets rid of bytesPerCacheLine parameter and makes the DRAM 
> configuration separate from cache line size. 
> Instead of bytesPerCacheLine, I define a parameter for DRAM called 
> burst_length. The burst_length parameter shows the size of a DRAM burst in 
> bytes and is 64 bytes for all current DRAM configurations. Note, this 
> parameter is coupled with tBURST. 
> Also, I replace lines_per_rowbuffer with bursts_per_rowbuffer, because 
> lines_per_rowbuffer is defined based on 64-byte cache lines which makes the 
> code unportable.
> 
> Next patch could be to add support for requests larger than burst length.
> 
> 
> Diffs
> -----
> 
>   src/mem/SimpleDRAM.py UNKNOWN 
>   src/mem/simple_dram.hh UNKNOWN 
>   src/mem/simple_dram.cc UNKNOWN 
> 
> Diff: http://reviews.gem5.org/r/1927/diff/
> 
> 
> Testing
> -------
> 
> None
> 
> 
> Thanks,
> 
> Amin Farmahini
> 
>

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