On Wed, 19 Jun 2013, Andreas Hansson wrote:
----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1927/#review4448 ----------------------------------------------------------- src/mem/SimpleDRAM.py <http://reviews.gem5.org/r/1927/#comment4174> Hi Nilay, You cannot compute this from params as the cache line size is determined in the C++ code.
This means that you are assuming what the cache line size is. In that case, I would rather have the cache line size as a param.
-- Nilay _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
