Then they will be locked into predefined architecture and will take
path of Intel or AMD hacking around unforeseen limitations.
No way they will do it if they are smart.
Not sure what you're getting at... The interface for an x86 CPU is the
instruction set. AMD don't seem to have a problem innovating within
these parameters. (e..g AMD64 being the arch that has gotten around
the 'unforseen' 32bit address limitation).
RISC instruction set has no x86-specific problems, like
accumulator-based integer arithmetic, stack-based FPU and large decoder.
I think that by locking the interface, and very specific interface like
instruction set architecture, Intel locked itself (and its followers)
into the trap. They now need to spend energy twice - first for
innovation and second for soldering innovation and legacy.
By changing inteface to better suit the implementation (as RISC
designers did) you reduce energy spent to develop something new. By
locking inteface you lock out a good part of you total energy.
That's why none of the AIT and NVidia will open their intefaces or agree
on open one.
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