On Tue, 13 Nov 2007 16:51:58 +0100
Reimar Döffinger <[EMAIL PROTECTED]> wrote:
> On Tue, Nov 13, 2007 at 03:50:42PM +0100, Attila Kinali wrote:
> > On Mon, 5 Nov 2007 13:38:01 -0500
> > "Timothy Normand Miller" <[EMAIL PROTECTED]> wrote:
> >
> > > Here's an idea! Can someone who kinda gets the schematic do a phone
> > > interview with me where we walk through it page-by-page? Maybe you
> > > can put the recording online or transcript it.
> >
> > I think i understood a big part of the schematics.
> > If someone would make a proper page out of it, i could produce
> > some annotated version of the schematics with the information
> > that i think is missing for EE newbies and scan them. But as
> > i'm currently a bit tight on time earliest would be in 2-3 weeks.
>
> Well, IMO the only real problem is that it is hard to get the overview
> what connection goes where actually.
Well, that's normal with schematics. Ok, the OGD1 schematics
are not the nicest, but they are clean and not badly structured.
The schematics are in the complexity of maybe a program with 10-30k loc
of C code. You don't expect to read that like a book and imediatly
know which function is calling which and where they finaly end up, do you?
> Also page 15 of the schematics has quite a few missing or misplaced
> connection dots.
Where? I don't see any such mistakes.
> IMO also for the power supply schematics, isn't there a connection dot
> missing as well at those double diodes (which looks a bit weird with one
> unconnected, what is the reason here?)?
It's a dual diode device with only one diode used, nothing strange
about this. What is strange there is the labeling of the pins (3,4,5
instead of 1,2,3) but that might be due to the packaging (which i
haven't checked)
Attila Kinali
--
Linux ist... wenn man einfache Dinge auch mit einer kryptischen
post-fix Sprache loesen kann
-- Daniel Hottinger
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