At 03:06 PM 3/15/01 +1100, Ian Wilson wrote:
[I had written:]
>>  course our experience differs. However, I think that if we could 
>> collect statistics on the designs actually being made with Protel all 
>> over the world, the majority would be single supply (or dual-supply 
>> analog, which amounts to much the same thing, only it is V+, V-  and 
>> GND). Yes, I also do plenty of designs which are multiple-supply, but 
>> multiple "VCC" designs are more rare.
>In the last 30 designs I have been part of, over the last 5 years, none 
>have been simple unswitched single supply designs.  Almost all of these 
>were multiple VCC designs - that is logic running at multiple voltages or 

I am not particularly busy, but in five years, I would see many hundreds of 
designs. Mr. Wilson's experience is skewed by the kind of work he does. 
Mine may also be skewed a bit, but I do general printed circuit design for 
all kinds of companies, including quite a bit of 2-sided, very simple 
stuff. I'd say that perhaps 30% of my load is multiple-supply.

[I also wrote:]

>>Tango Schematic allowed sheetwise renaming of nets; a particular 
>>structure was exempt from the net renaming warning (A power port plus a 
>>short piece of track with a net label was always considered to be a 
>>deliberate renaming). Thus one could assign VCC on one page to, say, +5V, 
>>and on another to +3.3V. This was more flexible than what is created by 
>>inflexible, global-always-when-hidden power pins.
>What a nightmare!  I would be *hugely* against Protel worsening the 
>situation with this concept. Goes completely against the grain of what I 
>teach all the new engineers I see - the schematic *must* be as complete a 
>document as possible.

Some of us, however, think that a document *is* complete if it includes all 
the correct data. If I were an engineer trying to slap out a digital design 
quickly, I'd be very tempted to use hidden pins with all the standard logic.

In spite of Mr. Wilson's vehemence, the hidden pin issue is not going to go 
away. As I mentioned, we must not only be compatible with legacy designs, 
but also OrCAD and other CAD imports must be able to accomodate hidden pins.

The only objection to hidden pins that Mr. Wilson makes, really, is that 
the pins are hidden. But if we all know that a 14 pin 7400 series part has 
power on pins 7 and 14, it may be good documentation but is not essential 
to show those pins. If a page has a different supply, net renaming as I 
mentioned is explicit and quite easy to understand.

>   It must document the design to the maximum possible extent.

Sure. But the word "possible" must include issues like the time available.

It might be argued that "there is no time to do it right but there is 
always time to go back and fix it," as if it were somehow intrinsically 
*wrong* to use clearly understandable hidden pins, and, further, that it is 
also always wrong to cut corners to get the job to fab today instead of 
tomorrow. I'd say that it is *usually* wrong to cut corners, but not 
always. There may indeed be time later that one does not have now.

Hidden pins can really bite you if you don't know how they work, and 
somehow manage to overlook the usually obvious problems of incorrect power 
supply assignment with a blind trust in DRC. Most of the danger of working 
with hidden pins would disappear if we had the reporting tools suggested.

So why try to force everyone to work the same way? Rather, I would suggest 
developing clear methods of using hidden pins that avoid the dangers, plus 
reports that warn the user when there are potential problems. I think we 
would all agree that testing a nets for some kind of power source, such as 
a regulator pin defined as a power driver or a connector pin, would be 
useful even if we had no hidden pins. It would be much more useful in 
dealing with hidden pins.

The power pins are there in a hidden pin schematic. They are merely on the 
next page. I.e., you can get to that page by globally showing hidden pins. 
Some way of doing that and then restoring the hidden state without any fuss 
would make this a more practical reality.

I.e., Mr Wilson wants full, explicit documentation; he has no problem with 
power pins being on a different sheet; he should therefore be satisfied 
with a way of uncovering the power assignments of a part quickly and 
easily, as if one were turning a page.

>   If I can't see a pin on a schematic then as far as I am concerned that 
> pin does not exist and I do not want to see the pin on the PCB.

But, of course, one can see hidden power pins any time one wishes. Mr. 
Wilson is correct, though, if he is only thinking of printed schematics.

>   It is a simple rule and has saved the day on many designs - especially 
> where there are a number of people/companies involved. Individual 
> designers can do what they like - until they walk through our door.
>Ian Wilson

Of course. Every company must have standards. But any engineer who is 
confused by hidden pins is either new or has not been paying attention.

We've had this discussion before. Mr. Wilson has previously, if I remember 
correctly, expressed his view that hidden pins are a creature of the Devil 
(without using those words, of course). I agree that schematics without 
hidden pins are superior to schematics with hidden pins. But they can, 
sometimes, take more work, so they are not necessarily more cost-effective 
in all situations.

Abdulrahman Lomax
P.O. Box 690
El Verano, CA 95433

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