Forgive me if you already know this:

If any buss connects to a port make sure the busses have net labels.

For example an 8 way buss with lines D0 to D7 connected to a port needs a
net label "[D0..D7]" without the quotes placed on it for connectivity also
the port must have the same name (that is [D0..D7]).

See Schematic Help topic "Bus (Schematic electrical design object)"

There is also an example on p99 of the manual.



> -----Original Message-----
> From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
> Sent: Thursday, 28 November 2002 13:37
> To: Protel EDA Forum
> Subject: [PEDA] Connectivity Nightmares
> 
> 
> Hi all:
> 
> I usually use a hierarchical structure for my schematic 
> documents, with a
> main document with all the connectors on it, then below that a block
> diagram, and then the actual circuitry on one or more levels 
> below that. 
> 
> I'm currently doing a reasonable-sized board, with lots of 
> digital lines,
> and have amalgamated those lines into busses for the most 
> part, however when
> I try to synchronise my PCB, I get lots of errors due to the 
> net labels I've
> chosen not being mapped across separate sheets. I have tried 
> to connect the
> busses through the ports on the sheet symbol/port connectivity, but
> apparently it doesn't work. Is the only solution here to change to net
> labels/ports global (with a corresponding edit of all the 
> sheets in the
> schematic - 25 or so pages), or is there a way to get rid of 
> these errors
> using the current methodology? I've tried checking the add 
> sheet suffixes to
> local nets box, but this results in no connectivity, which is 
> clearly not
> what I want.
> 
> Cheers,
> Matthew van de Werken
> Electronics Engineer
> CSIRO Exploration & Mining - Gravity Group
> 1 Technology Court - Pullenvale - Qld - 4069
> ph:  (07) 3327 4685     fax:  (07) 3327 4455
> email:  [EMAIL PROTECTED]
> 

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